JPH06326409A - Surface emission element - Google Patents

Surface emission element

Info

Publication number
JPH06326409A
JPH06326409A JP11082193A JP11082193A JPH06326409A JP H06326409 A JPH06326409 A JP H06326409A JP 11082193 A JP11082193 A JP 11082193A JP 11082193 A JP11082193 A JP 11082193A JP H06326409 A JPH06326409 A JP H06326409A
Authority
JP
Japan
Prior art keywords
type gaas
layer
film
active layer
alas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11082193A
Other languages
Japanese (ja)
Inventor
Takaaki Numai
貴陽 沼居
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP11082193A priority Critical patent/JPH06326409A/en
Publication of JPH06326409A publication Critical patent/JPH06326409A/en
Pending legal-status Critical Current

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  • Led Devices (AREA)

Abstract

PURPOSE:To obtain a surface emission element in which the direction of polarization is prescribed in one direction. CONSTITUTION:After an n-type GaAs/AlAs multilayer reflection film 20, an n-type GaAs layer 11, an In0.2Ga0.8AS active layer 12, a P-type GaAs clad layer 13, and a P-type GaAs/AlAs multilayer reflection film 21 have grown successively on an n-type GaAs substrate 10, an etching treatment is conducted in such a manner that a square is formed when a part of the P-type GaAs/AlAs multi- layer film 21, the P-type GaAs clad layer 13, the In0.2Ga0.8 active layer 12, the n-type GaAs layer 11 and the n-type GaAs/AlAs multilayer reflection film 20 are viewed from above the element. After an insulating film 22 has been selectively formed, a gold film 23, as a film having the thermal expansion coefficient different from a semiconductor layer is selectively formed on the upper part of the element. An anode electrode 31 is formed covering the P-type GaAs clad layer 12 and the P-type GaAs/AlAs multilayer reflection film, and also a cathode electrode 30 is formed on the n-type GaAs/AlAs multilayer reflection film 20.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、光伝送や光情報処理用
の面発光素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface emitting device for optical transmission and optical information processing.

【0002】[0002]

【従来の技術】光伝送や光情報処理用の光源である半導
体レーザの研究が進められている。その中で、面型半導
体レーザは、(1)モノリックな共振器形成が可能、
(2)素子分離前のウェハー単位の検査が可能、(3)
動的単一波長動作、(4)大放射面積、狭出射円形ビー
ム、(5)高密度2次元レーザアレー、(6)積層によ
る3次元アレーデバイスの集積化が可能、などの特徴が
ある。面型半導体レーザについては、伊賀らによって先
駆的な研究が行われ、彼らの一連の研究結果は1988
年発行伊賀他著のジャーナル・オブ・カンタム・エレク
トロニクス(Journal of Quantum
Electronics)第24巻1845ページ記載
の論文に歴史的な経緯を含めてまとめられている。
2. Description of the Related Art Research on a semiconductor laser, which is a light source for optical transmission and optical information processing, is under way. Among them, the surface-type semiconductor laser (1) is capable of forming a monolithic resonator,
(2) Wafer-by-wafer inspection before element separation is possible, (3)
It features dynamic single-wavelength operation, (4) large emission area, narrow emission circular beam, (5) high-density two-dimensional laser array, and (6) integration of three-dimensional array device by stacking. A pioneering research was conducted by Iga et al. On the surface-type semiconductor laser, and the results of their series of research are 1988.
Published by Iga et al., Journal of Quantum Electronics (Journal of Quantum)
(Electronics) Vol. 24, page 1845, including historical background.

【0003】更に面型光機能素子は、前述の面型半導体
レーザの長所を活かした光情報処理を行う素子であり、
大容量の情報処理を目指した2次元並列光情報処理を可
能にすると期待されている。このような面型光機能素子
の1つとして、垂直共振器型面入出力光電融合素子があ
り、この文献として1991年発行の沼居他著のアプラ
イドフィジックス・レターズ(Applied Phy
sics Letters)第58巻1250ページ記
載の論文をあげることが出来る。
Further, the surface-type optical functional element is an element for performing optical information processing by making use of the advantages of the surface-type semiconductor laser described above.
It is expected to enable two-dimensional parallel optical information processing aiming at large-capacity information processing. As one of such surface-type optical functional elements, there is a vertical resonator type surface-input / output optoelectronic device, which is referred to by Numai et al., Applied Physics Letters (Applied Phy).
Sics Letters) Volume 58, page 1250 can be cited.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、従来の
面発光素子には次のような課題が存在する。従来の面発
光素子では、光導波路が光の進行方向に沿って形成され
ていないため、出射されるレーザ光の偏波方向は素子構
造のわずかな非対称性による共振器内の損失や利得の違
いによって定まり、素子毎に偏波方向が異なっていた。
一方、他の光回路素子と出射光を結合する場合、結合効
率を高めるためには、出射光の偏波方向を特定の方向に
規定しておくことが必要である。
However, the conventional surface emitting device has the following problems. In conventional surface-emitting devices, the optical waveguide is not formed along the traveling direction of the light, so the polarization direction of the emitted laser light is different due to slight asymmetry of the device structure. The polarization direction was different for each element.
On the other hand, when the emitted light is coupled with another optical circuit element, it is necessary to define the polarization direction of the emitted light in a specific direction in order to improve the coupling efficiency.

【0005】そこで、本発明は、偏波方向が1つの方向
に規定された面発光素子を実現することを目的とする。
Therefore, an object of the present invention is to realize a surface emitting device in which the polarization direction is defined in one direction.

【0006】[0006]

【課題を解決するための手段】本発明の面発光素子は、
活性層の上方に、前記活性層と熱膨張係数の異なる層あ
るいは、前記活性層と格子定数の異なる層が、選択的に
または非対称に形成されていることを特徴とする。
The surface emitting device of the present invention comprises:
A layer having a thermal expansion coefficient different from that of the active layer or a layer having a lattice constant different from that of the active layer is selectively or asymmetrically formed above the active layer.

【0007】[0007]

【作用】活性層の上方に、前記活性層と熱膨張係数の異
なる層、例えば誘電体や金属膜を選択的に形成する場合
を考える。誘電体膜や金属膜を形成するときに200℃
以上の高温になるが、膜形成後、室温まで素子温度が下
がると膨張係数の違いにより、歪が生じる。しかも、膜
が選択的に形成されているために、結晶にかかる歪が非
対称となる。この結果、軌道一歪演算子に従ってバンド
ギャップが変形し、光学遷移に対する偏波に方向依存性
が生じる。
Consider a case where a layer having a coefficient of thermal expansion different from that of the active layer, for example, a dielectric or a metal film is selectively formed above the active layer. 200 ℃ when forming dielectric film or metal film
Although the temperature becomes high as described above, when the element temperature is lowered to room temperature after forming the film, distortion occurs due to the difference in expansion coefficient. Moreover, since the film is selectively formed, the strain applied to the crystal becomes asymmetric. As a result, the bandgap is deformed according to the orbit-distortion operator, and the polarization is directionally dependent on the optical transition.

【0008】前記活性層と格子定数の異なる層が選択的
に形成されている場合も、上記の説明と同様に結晶にか
かる歪が非対称となるので、偏波が制御される。
Even when a layer having a lattice constant different from that of the active layer is selectively formed, the strain applied to the crystal is asymmetrical as in the above description, so that the polarization is controlled.

【0009】[0009]

【実施例】図面を参照して、本実施例を詳細に説明す
る。図1は、本発明の第1の実施例の面発光素子の構造
を示す図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS This embodiment will be described in detail with reference to the drawings. FIG. 1 is a diagram showing a structure of a surface emitting device according to a first embodiment of the present invention.

【0010】以下、製作手順にしたがって本実施例の構
造について説明する。まず第1の実施例の構造について
図1を参照しながら説明する。図1(A)は上面図
(B)は断面図である。n形GaAs基板10上に分子
線ビームエピタキシー(以下MBEと略す)によりn形
GaAs/AlAs多層反射膜20、n形GaAs層1
1、In0 . 2 Ga0 . 8 As活性層12、p形GaA
sクラッド層13、p形GaAs/AlAs多層反射膜
21を順次成長する。その後、p形GaAs/AlAs
多層膜21、p形GaAsクラッド層13、In0 . 2
Ga0 . 8 As活性層(厚み80オングストローム)1
2、n形GaAs層11、n形GaAs/AlAs多層
反射膜20の1部を素子上部からみたときに正方形とな
るようにエッチングする。絶縁体22として窒化シリコ
ン膜を選択的に側壁部に形成した後、素子上部に選択的
に金、Au23を高温で蒸着する。蒸着後、室温まで冷
却してから、p形GaAsクラッド層12とp形GaA
s/AlAs多層反射膜21を覆うようにアノード電極
31を形成する。このp形GaAs/AlAs多層反射
膜21上のアノード電極31は金属反射膜として機能す
る。またn形GaAs/AlAs多層反射膜20上にカ
ソード電極30を形成する。
The structure of this embodiment will be described below in accordance with the manufacturing procedure. First, the structure of the first embodiment will be described with reference to FIG. 1A is a top view and FIG. 1B is a cross-sectional view. An n-type GaAs / AlAs multilayer reflection film 20 and an n-type GaAs layer 1 are formed on an n-type GaAs substrate 10 by molecular beam epitaxy (hereinafter abbreviated as MBE).
1, In 0. 2 Ga 0 . 8 As active layer 12, p-type GaA
The s clad layer 13 and the p-type GaAs / AlAs multilayer reflective film 21 are sequentially grown. After that, p-type GaAs / AlAs
Multilayer film 21, p-type GaAs cladding layer 13, In 0. 2
Ga 0.8 As active layer (thickness 80 Å) 1
2. Part of the n-type GaAs layer 11 and the n-type GaAs / AlAs multilayer reflection film 20 is etched so as to have a square shape when viewed from above the element. After a silicon nitride film is selectively formed on the side wall as the insulator 22, gold and Au 23 are selectively vapor-deposited at a high temperature on the upper part of the device. After vapor deposition, after cooling to room temperature, the p-type GaAs cladding layer 12 and p-type GaA
An anode electrode 31 is formed so as to cover the s / AlAs multilayer reflective film 21. The anode electrode 31 on the p-type GaAs / AlAs multilayer reflective film 21 functions as a metal reflective film. Further, the cathode electrode 30 is formed on the n-type GaAs / AlAs multilayer reflective film 20.

【0011】図2は、第1の実施例の測定結果を示す図
である。発振閾電流は1mA以下である。出射光の偏波
は選択的に形成した金23の短辺に平行であり、これに
直交する偏波との間の光強度の比(P(平行)/P(直
交))は1:100と良好な直線偏波になっている。
FIG. 2 is a diagram showing the measurement results of the first embodiment. The oscillation threshold current is 1 mA or less. The polarization of the emitted light is parallel to the short side of the selectively formed gold 23, and the ratio of the light intensity with the polarization orthogonal to this (P (parallel) / P (orthogonal)) is 1: 100. And it is a good linear polarization.

【0012】図3は、本発明の第2の実施例の面発光素
子の構造を示す図である。第1の実施例との違いは素子
上部に全23を高温で蒸着する代わりに歪半導体層24
としてIn0 . 2 Ga0 . 8 As100オングストロー
ムを選択的に形成してあることである。この場合でも第
1の実施例と同様の効果がある。
FIG. 3 is a diagram showing the structure of a surface emitting element according to the second embodiment of the present invention. The difference from the first embodiment is that the strained semiconductor layer 24 is deposited on the upper part of the device instead of depositing the whole 23 at a high temperature.
As an In 0. 2 Ga 0. Is to the 8 AS100 Angstroms are selectively formed. Even in this case, the same effect as the first embodiment is obtained.

【0013】なお、上記の第1の実施例では、半導体層
と膨張率の異なる層として金を用いたが、半導体と膨張
率の異なる層であればなんでもよい。半導体材料につい
ても上述のGaAs系に限定する必要はなく、例えばI
nP系の材料であってもよい。また、多層反射膜も反射
率さえ大きくできる材料であれば半導体に限らず誘電体
などでもよい。
Although gold is used as the layer having a different expansion coefficient from that of the semiconductor layer in the first embodiment, any layer having a different expansion coefficient from that of the semiconductor may be used. It is not necessary to limit the semiconductor material to the above-mentioned GaAs system, either.
It may be an nP-based material. Further, the multilayer reflective film is not limited to a semiconductor and may be a dielectric or the like as long as the material can even increase the reflectance.

【0014】また、本実施例では、素子の上部に、金2
3や歪半導体層24を部分的に形成して、非対称性を作
り出したが、異なる熱膨張率の層や歪半導体層を素子上
部に複数形成して非対称性を出してもよい。例えば素子
上部の半分に金23を形成し、残りの半分に歪半導体層
24を形成してもよい。
Further, in this embodiment, gold 2 is formed on the upper part of the element.
3 and the strained semiconductor layer 24 are partially formed to create asymmetry, but a plurality of layers or strained semiconductor layers having different thermal expansion coefficients may be formed on the upper part of the element to generate asymmetry. For example, gold 23 may be formed in the upper half of the element and the strained semiconductor layer 24 may be formed in the other half.

【0015】[0015]

【発明の効果】面発光素子として、偏波方向が1つの方
向に規定された素子を実現することができる。これによ
り、他の光回路素子との結合効率を改善できる。更に光
集積素子や、光論理素子への適用に有効である。
As the surface emitting element, it is possible to realize an element in which the polarization direction is defined in one direction. This can improve the coupling efficiency with other optical circuit elements. Further, it is effective for application to an optical integrated device and an optical logic device.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の面発光素子の構造を示
す図である。
FIG. 1 is a diagram showing a structure of a surface emitting element according to a first embodiment of the present invention.

【図2】本発明の第1の実施例の測定結果を示す図であ
る。
FIG. 2 is a diagram showing measurement results of the first example of the present invention.

【図3】本発明の第2の実施例の面発光素子の構造を示
す図である。
FIG. 3 is a diagram showing a structure of a surface emitting element according to a second embodiment of the present invention.

【符号の説明】[Explanation of symbols]

10 半導体基板 11 n半導体層 12 歪量子井戸活性層 13 p半導体層 20 n半導体多層膜 21 p半導体多層膜 22 絶縁体膜 23 金 24 歪半導体層 30 電極 31 電極 10 semiconductor substrate 11 n semiconductor layer 12 strained quantum well active layer 13 p semiconductor layer 20 n semiconductor multilayer film 21 p semiconductor multilayer film 22 insulator film 23 gold 24 strained semiconductor layer 30 electrode 31 electrode

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 面発光半導体素子において、活性層の上
方に、前記活性層と熱膨張係数の異なる層または前記活
性層と格子定数の異なる半導体層が選択的に形成されて
いることを特徴とする面発光素子。
1. A surface emitting semiconductor device, wherein a layer having a thermal expansion coefficient different from that of the active layer or a semiconductor layer having a lattice constant different from that of the active layer is selectively formed above the active layer. Surface emitting element.
【請求項2】 矩形又は円形の形状の活性層を有する面
発光半導体素子において、熱膨張係数の異なる層または
前記活性層と格子定数の異なる半導体層が、前記活性層
の形状に対して非対称な形状に形成されていることを特
徴とする面発光素子。
2. In a surface emitting semiconductor device having a rectangular or circular active layer, a layer having a different thermal expansion coefficient or a semiconductor layer having a lattice constant different from that of the active layer is asymmetric with respect to the shape of the active layer. A surface-emitting device having a shape.
JP11082193A 1993-05-13 1993-05-13 Surface emission element Pending JPH06326409A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11082193A JPH06326409A (en) 1993-05-13 1993-05-13 Surface emission element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11082193A JPH06326409A (en) 1993-05-13 1993-05-13 Surface emission element

Publications (1)

Publication Number Publication Date
JPH06326409A true JPH06326409A (en) 1994-11-25

Family

ID=14545517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11082193A Pending JPH06326409A (en) 1993-05-13 1993-05-13 Surface emission element

Country Status (1)

Country Link
JP (1) JPH06326409A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999007043A1 (en) * 1997-07-29 1999-02-11 Seiko Epson Corporation Surface emission semiconductor laser
JP2003332685A (en) * 2003-05-30 2003-11-21 Seiko Epson Corp Surface emission semiconductor laser and surface emission semiconductor laser array
CN100379043C (en) * 2005-04-30 2008-04-02 中国科学院半导体研究所 Full angle reflector structure GaN base light emitting diode and producing method
JP2008098338A (en) * 2006-10-11 2008-04-24 Furukawa Electric Co Ltd:The Surface emitting laser element and surface emitting laser element array
JP2009259857A (en) * 2008-04-11 2009-11-05 Furukawa Electric Co Ltd:The Surface emitting laser element and surface emitting laser element array
JP2013030735A (en) * 2011-06-24 2013-02-07 Ricoh Co Ltd Plane emission laser array and image formation apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0265284A (en) * 1988-08-31 1990-03-05 Fujitsu Ltd Semiconductor surface light emitting device and light processing method
JPH053369A (en) * 1991-06-25 1993-01-08 Sanyo Electric Co Ltd Surface emission type semiconductor laser device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0265284A (en) * 1988-08-31 1990-03-05 Fujitsu Ltd Semiconductor surface light emitting device and light processing method
JPH053369A (en) * 1991-06-25 1993-01-08 Sanyo Electric Co Ltd Surface emission type semiconductor laser device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999007043A1 (en) * 1997-07-29 1999-02-11 Seiko Epson Corporation Surface emission semiconductor laser
US6134251A (en) * 1997-07-29 2000-10-17 Seiko Epson Corporation Surface emission semiconductor laser
US6603783B1 (en) 1997-07-29 2003-08-05 Seiko Epson Corporation Surface emitting type semiconductor laser
JP2003332685A (en) * 2003-05-30 2003-11-21 Seiko Epson Corp Surface emission semiconductor laser and surface emission semiconductor laser array
CN100379043C (en) * 2005-04-30 2008-04-02 中国科学院半导体研究所 Full angle reflector structure GaN base light emitting diode and producing method
JP2008098338A (en) * 2006-10-11 2008-04-24 Furukawa Electric Co Ltd:The Surface emitting laser element and surface emitting laser element array
JP2009259857A (en) * 2008-04-11 2009-11-05 Furukawa Electric Co Ltd:The Surface emitting laser element and surface emitting laser element array
JP2013030735A (en) * 2011-06-24 2013-02-07 Ricoh Co Ltd Plane emission laser array and image formation apparatus

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