JPS62245886A - Dropout compensation device - Google Patents

Abstract

PURPOSE:To attain accurate dropout compensation by controlling a reproduced video signal level via a 1H (1 horizontal period) delay circuit in following the fluctuation of an average level of the reproduced video signal. CONSTITUTION:A reproduced luminance signal demodulated by an FM demodulation circuit 2 is extracted from an output terminal 7 via an LPF 3, an amplifier 4, a switch circuit 5 and an amplifier 6. The reproduced video signal via a 1H elay circuit 8 is fed to a switch circuit 5, and if dropout takes place, the switch circuit 5 is controlled by an output of a dropout detection circuit 12 and a reproduced video signal before 1H is outputted from the output terminal 7. A monostable multivibrator 19 forms a timing pulse corresponding to the period of a pedestal level of a prescribed width from the synchronizing signal and the output of an AND gate 15 sample and holds the output of the amplifier 4 by using a sample-and-holding circuit 20, the switch circuit 21 is turned on and the output of the 1H delay circuit 8 is clamped in response to the level held by the circuit 20.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dropout compensation device for a VTR.

[Summary of the invention]

In a VTR dropout compensation device, the present invention detects the sync tip level or pedestal level of a reproduced video signal and clamps the output signal of a delay circuit to this level, thereby adjusting the average level of the input video signal. It is possible to control the output signal via the delay circuit by following the change, and also to prevent the occurrence of sink clogging.

[Conventional technology]

Conventionally, a dropout compensation circuit of a VTR uses a dropout detection circuit to detect a dropout in a reproduced video signal, and when a dropout is detected, the dropout compensation circuit of a VTR uses a dropout detection circuit to detect a dropout in a reproduced video signal. It is configured to output a playback video signal. In other words, the playback video signal and the playback video signal passed through the IH delay circuit are supplied to the switch circuit, and when a dropout is detected in the playback video signal by the dropout detection circuit, the playback video signal passed through the IH delay circuit is supplied. It is configured to output a playback video signal.

Incidentally, the average level of the reproduced video signal varies from IH to IH. For this reason, as shown in FIG. 3, variations occur in the DC level for each IH.

In this way, since the DC level of the reproduced video signal fluctuates for each IH, the switch circuit
If the reproduced video signal that has passed through the delay circuit is supplied as is, the brightness level will change and dropout compensation cannot be performed correctly. Further, in the case of a dropout of several H, this DC level difference is added up and becomes a cause of synchronization disturbance.

Therefore, the conventional dropout compensation circuit is provided with a clamp circuit that clamps the reproduced video signal and the reproduced video signal before IH to a predetermined level. For example, the pedestal level of the reproduced video signal and the reproduced video signal before IH is clamped to a predetermined level to equalize the DC levels.

[Problems to be Solved by the Invention] In this way, the reproduced video signal and the reproduced video signal before IH are clamped and supplied to the switch circuit, and the output of the dropout detection circuit switches the switch circuit to perform dropout compensation. In this case, the reproduced video signal will always be output clamped, regardless of the presence or absence of dropouts. When the reproduced video signal is passed through the clamp circuit, the sink becomes clogged, and the zinc level becomes smaller than the video signal level.

If the sink is clogged in this way, a problem arises in that the characteristics during dubbing deteriorate. In other words, the recording side VTR
In the sink AGC circuit, when the sink level is small, control is performed in the direction of increasing the gain, assuming that the input signal level is small. Therefore, the gain of the video signal increases too much, which tends to cause waveform distortion and overmodulation due to white clipping.

It is also disadvantageous in terms of moiré.

Therefore, an object of the present invention is to provide a dropout compensation device that can perform accurate dropout compensation by controlling the level of a reproduced video signal passed through an IH delay circuit in accordance with fluctuations in the average level of the reproduced video signal. It's about doing.

Another object of the present invention is to provide a dropout compensator that does not cause sink clogging.

[Means for solving problems]

In this invention, the reproduced video signal is supplied to one input terminal 5A of the switch circuit 5, and the output signal of the switch circuit 5 is passed through the delay circuit 8 to the other input terminal 5A of the switch circuit 5.
In the dropout compensation device, the switch circuit 5 is controlled by the output of the dropout detection circuit 12, and the level detection circuit 20 detects the sync chimp level or pedestal level of the reproduced video signal.
and a clamp circuit 9 that clamps the output signal of the delay circuit 8 to the detection level of the level detection circuit 20.

[Effect]

The reproduced video signal and the reproduced video signal passed through the IH delay circuit 8 are supplied to the switch circuit 5. The switch circuit 5 is controlled by the output of the dropout detection circuit 12. When dropout does not occur, the input terminal 5A and output terminal 5C of the switch circuit 5 are connected, and the reproduced video signal is output from the output terminal 7. When dropout occurs, the switch circuit 50 input terminal 5B
and the output terminal 5C are connected, and the reproduced video signal before IH is output from the output terminal 7.

The output of the IH delay circuit 8 is clamped by a clamp circuit 9. This clamp level is a level obtained by sampling and holding the sync chimp level or pedestal level of the manually reproduced video signal.

Therefore, the DC level of the output signal of the IH delay circuit is
Always equal to the DC level of the input playback video signal.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 indicates an input terminal, and an FM modulated luminance signal reproduced by a rotary head is supplied to the input terminal 1. This FM modulated luminance signal is supplied to the FM demodulation circuit 2. The output of the FM demodulation circuit 2 is passed through a low pass filter 3. The signal is supplied to the input terminal 5A of the switch circuit 5 via the amplifier 4.

The output of the output terminal 5C of the switch circuit 5 is output from the output terminal 7 via the amplifier 6, and is also supplied to the IH delay circuit 8. The output of the IH delay circuit 8 is supplied to the input terminal 5B of the switch circuit 5 via the clamp circuit 9.

An FM modulated luminance signal reproduced by a rotary head is supplied to an input terminal 10, and this reproduced luminance signal is supplied to a dropout detection circuit 12 via a limiter 11. The dropout detection circuit 12 detects dropout by peak detection. The output of the dropout detection circuit 12 is supplied to the comparator 13, and the output of the comparator 13 is supplied to the switch circuit 5 as a switch control signal.
It is also supplied to the AND gate 15 via the inverter 14.

When dropout occurs, the output of the comparator 13 becomes high level. When the output of the comparator 13 is at a low level, the input terminal 5A and the output terminal 5C of the switch circuit 5 are connected. When the output of the comparator 13 becomes high level, the input terminal 5B and the output terminal 5C of the switch circuit 5 are connected.

When the input terminal 5A and output terminal 5C of the switch circuit 5 are connected, the reproduced luminance signal demodulated by the FM demodulation circuit 2 is passed through the low-pass filter 3. Amplifier 4. The signal is supplied to the amplifier 6 via the switch circuit 5 and taken out from the output terminal 7. Input terminal 5B and output terminal 5C of switch circuit 5
is connected, L H output from the IH delay circuit 8
The reproduced luminance signal of the previous line is transferred to the clamp circuit 9. The signal is supplied to the amplifier 6 via the switch circuit 5 and taken out from the output terminal 7.

A demodulated reproduced luminance signal is supplied to the input terminal 16, and this reproduced luminance signal is supplied to the sync separation circuit 17. A synchronization separation circuit 17 separates the synchronization signal. The separated synchronizing signal is supplied to a monomulti (mono stable multi-by-break) 19 after the equalization pulse in the vertical blanking section is removed via a half H killer circuit 18 . A timing pulse of a predetermined width at a predetermined timing is formed from the synchronization signal by the monomulti 19. This timing pulse corresponds to the pedestal level section. The output of the mole multi 19 is supplied to the AND gate 15.

The output of the AND gate 15 is supplied to a sample hold circuit 20 and also to a switch circuit 21 . A
When the output of the ND gate 15 becomes high level, the amplifier 4
The output is sampled and held by the sample and hold circuit 20, and the switch circuit 21 is turned on. When the switch circuit 21 is turned on, the output of the IH delay circuit 8 is clamped according to the level sampled and held by the sample and hold circuit 20.

Assuming that the luminance signal shown in FIG. 2A is reproduced, the timing pulse shown in FIG. 2B is formed by the monomulti 19 from the synchronization signal of this reproduced luminance signal.

When the output of the comparator 13 (FIG. 2C) is at a low level, the output of the AND gate 15 becomes a high level corresponding to the pedestal level section of the reproduced luminance signal, as shown in the second diagram. Output of AND gate 15 (Fig. 2D
) becomes high level, the pedestal level of the reproduced luminance signal output from the amplifier 4 is sampled and held as shown in FIG. 2F. The pedestal level of this reproduced luminance signal is supplied to the clamp circuit 9 via the switch circuit 21. Therefore, the pedestal level of the output of the IH delay circuit 8 is clamped by the clamp circuit 9 to the pedestal level of the input reproduced luminance signal.

When noise due to dropout occurs, as shown by N in FIG. 2, the output of the comparator 13 becomes high level, as shown in FIG. 2C.

When the output of the comparator 13 becomes high level, the input terminal 5B and the output terminal 5C of the switch circuit 5 are connected, and the 1
f (The output of the delay circuit 8 is supplied to the amplifier 6 via the clamp circuit 9 and the switch circuit 5, and taken out from the output terminal 7. It is clamped to be equal to the signal pedestal level.
Even if the average level of the reproduced video signal varies, the brightness level does not vary.

Note that the timing pulse output from the monomulti 19 is passed through an AND gate 15 to a sample hold circuit 20.
And what is supplied to the switch circuit 21 is:
This is to automatically enter the hold mode when a dropout occurs to suppress fluctuations in the clamp potential due to noise.

In the above embodiment, the sample and hold circuit 20 samples and holds the pedestal level, but it is also possible to sample and hold the sync tip level and clamp the sync tip level of the output of the delay circuit 8. .

Furthermore, although the above-mentioned embodiment describes processing of a luminance signal, processing of a composite video signal can also be performed in the same manner. Furthermore, R
It is also possible to replace the trassient part with an integrated signal, as in the F-switching transient removal circuit.

〔Effect of the invention〕

According to this invention, the sync tip level or pedestal level of the reproduced video signal is sampled and held, and the sync tip level or pedestal level of the video signal passed through the IH delay circuit 8 is clamped to this sampled and held level. . Therefore, the switch circuit 5
The DC levels of the inputs become equal, and accurate dropout compensation can be performed even if the average level of the video signal fluctuates. In this way, since the DC level of the video signal passed through the IH delay circuit 8 always follows the DC level of the input reproduced video signal, it is stable against temperature changes.

Further, according to the present invention, when no dropout occurs, the reproduced video signal is output without passing through the clamp circuit. Therefore, sink clogging does not occur, and dubbing characteristics are improved.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a waveform diagram of various parts used to explain an embodiment of the invention, and Fig. 3 is a route diagram used to explain a conventional dropout compensation circuit. . Explanation of the main symbols in the drawings: Input terminal, 5: Switch circuit, 7: Output terminal,
8: IH delay circuit, 9: Clamp circuit, 12 nitro tube out detection circuit, 20: Sample hold circuit.

Claims (1)

[Claims] A reproduced video signal is supplied to one input terminal of a switch circuit, an output signal of the switch circuit is supplied to the other input terminal of the switch circuit via a delay circuit, and the switch circuit is dropped. A dropout compensation device controlled by the output of the out detection circuit includes a level detection circuit for detecting the sync tip level or pedestal level of the reproduced video signal, and an output signal of the delay circuit set to the detection level of the level detection circuit. A dropout compensator with a clamp circuit that clamps the .