JP2508819B2 - Video signal circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal circuit, and more particularly to a video signal circuit having a clamp circuit.

[Conventional technology]

Conventionally, for example, in a home-use television video magnetic recording / reproducing apparatus (hereinafter referred to as VTR), in order to prevent the brightness level of the video signal from changing during recording and reproduction, the horizontal synchronization signal in the video signal during recording and reproduction is A clamp circuit is used which clamps a tip portion (hereinafter referred to as a sync tip) to a predetermined DC potential.

FIG. 3 is a block diagram showing the configuration of a conventional video signal circuit.

As shown in FIG. 3, a video signal is output from a signal processing circuit 1 for inputting a video recording signal or a reproduction FM signal and performing YC separation or FM demodulation, and is input to a clamp circuit 2. The output of the clamp circuit 2 is a low pass filter (hereinafter referred to as LPF).
A sync pulse signal which is input to the sync signal separation circuit 5 via 4 and is synchronized with the horizontal sync signal in the input video signal is output. The sync pulse signal output from the sync signal separation circuit 5 is input to the clamp circuit 2 to set the operating period of the clamp circuit. That is, the clamp circuit 2 clamps the input video signal to a predetermined DC potential while the sync pulse signal is input to the control input of the clamp circuit 2. Therefore, a signal in which the sync tip level of the input video signal is clamped to a predetermined DC potential is output from the clamp circuit 2.

FIG. 4 is a waveform diagram for explaining the operation of the conventional example shown in FIG.

In FIG. 4, A is the output of the signal processing circuit 1, and B is LP.
The output of F4, C is the output of the sync signal separation circuit (horizontal sync pulse), and D is the output of the clamp circuit 2. The sync signal separation circuit 5 compares the horizontal sync signal portion in the video signal delayed by LPF4 with a comparison value of V _TH, and the DC potential of the input signal is V
_The synchronizing pulse signal as shown in the period C when it becomes _TH or less is generated. Therefore, the clamp circuit 2 keeps the input video signal at a predetermined V _{C while the} sync pulse signal is generated.
Clamps to a DC potential and outputs. The output of the clamp circuit 2 is input to the signal processing circuit 3 at the next stage. here,
In the case of VTR, the recorded video signal is recorded in the signal processing circuit 1 during recording.
The signal processing circuit 1 separates a luminance signal and a chrominance signal, and the signal processing circuit 3 performs emphasis processing, FM modulation processing and the like. On the other hand, during reproduction, the FM-modulated video signal is input to the signal processing circuit 1 and FM demodulation processing and the like are performed. Further, the signal processing circuit 3 performs de-emphasis processing and the like.

As described above, the conventional example has a function of clamping the sync tip level in the mutual video signals to the same DC potential so that the level fluctuation of the luminance signal at the time of recording and reproducing in the VTR does not occur.

[Problems to be Solved by the Invention]

In the conventional video signal circuit described above, in order to stably generate the sync pulse signal by the sync signal separation circuit, the horizontal sync signal portion in the video signal is set to a predetermined level V _TH.
In, the video signal is delayed by LPF4 before slicing. Therefore, since the sync pulse signal output from the sync signal separation circuit is also delayed, as a result, the clamp circuit 2 not only clamps the sync tip level in the input video signal, but also a part of the back porch as well. And damage the video signal. In the case of VTR, since the color sub-carrier reference signal (color burst signal) is superimposed on the back porch later, it also affects the color burst signal, and there is a drawback that an accurate video signal cannot be reproduced. is there.

[Means for solving the problem]

A clamp circuit for inputting the video signal of the present invention to clamp the sync tip level of the video signal to stabilize the brightness level, a low-pass filter for inputting the output of the clamp circuit to delay the phase, and the low-pass filter. A sync signal separation circuit for inputting an output of the filter and outputting a sync pulse signal synchronized with a horizontal sync signal; a subtractor for inputting an input signal and an output signal of the low-pass filter and outputting a difference signal thereof; A comparator that is driven by the sync pulse signal output from the sync signal separation circuit and compares the difference signal of the subtractor in the sync pulse signal period with a reference level set lower than the clamp potential of the clamp circuit, A signal in which the pulse width of the synchronization pulse signal is controlled by the output signal of the comparator is input to the clamp circuit to change the operating period of the clamp circuit. Gosuru and a switch circuit.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. As shown in FIG. 1, the video signal processed by the signal processing circuit 1 in the same manner as in the conventional example is input to the clamp circuit 2, and the sync tip is clamped to a predetermined potential V _C to stabilize the brightness level, It is output to the signal processing circuit 3 connected to the clamp circuit 2. The output of the clamp circuit 2 is LP
The signal input to F4 and delayed in phase is output, and the output of LPF4 is input to the sync signal separation circuit 5 to generate a sync pulse signal. The input signal and output signal of the LPF 4 are input to the subtractor 6 and the difference signal thereof is output. A comparator 7 which operates dependently on the sync pulse signal receives a difference signal from the subtracter 6 and compares it with a predetermined reference level _V'TH to output a signal obtained as a sync pulse signal to a switch circuit 8. Input to the control input terminal to control the pulse width of the sync pulse signal. The sync pulse signal whose pulse width is controlled by the switch circuit 8 is input to the clamp circuit 2 and controls the operation period of the clamp circuit 2.

FIG. 2 is a waveform chart for explaining the operation of the embodiment of FIG.

In FIG. 2, A is the output of the signal processing circuit 1 and B is LP.
The output of F4, C is the output of the horizontal sync signal separation circuit 5 (sync pulse signal), D is the output of the subtractor 6, E is the output of the comparator 7, and F is the output of the clamp circuit 2. Input the differential signal between LPF4 input signal and output signal, and clamp circuit 2
The sync tip clamp potential V _{C in the above is} compared by a comparator 7 having a comparison value of V ′ _TH <V _C, whereby the delay period for the trailing edge of the horizontal synchronizing signal in the input video signal of the synchronizing pulse output signal. A signal E for detecting is output. The switch circuit 8 is controlled by the output E of the comparator 7,
By cutting off the sync pulse signal in the period in which the output signal of the comparator 7 is generated, the operation period of the clamp circuit 2 can be kept within the sync tip period of the input video signal, and the clamp operation can be performed in the back porch. It has an effect that it can be controlled so as not to enter the period.

〔The invention's effect〕

As described above, the present invention is a clamp circuit for clamping a sync tip level in a video signal to a predetermined DC potential by a sync pulse signal delayed with respect to a horizontal sync signal period of an input video signal. By detecting the delay between the horizontal sync signal and the sync pulse signal and controlling the pulse width of the sync pulse signal by this output to keep the clamp operation period of the clamp circuit within the sync tip period of the video signal, There is an effect that the clamp operation can be reproduced without damaging the pack pouch. Therefore, in addition to preventing the level fluctuation of the luminance signal,
In the case of VTR, there is no influence on the color burst signal superimposed on the back porch portion as post-processing.

The video signal circuit of the present invention can be applied to a television video device other than a VTR to obtain the same effect.

[Brief description of drawings]

1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a waveform diagram showing the operation of the embodiment of FIG. 1, FIG. 3 is a block diagram showing the configuration of a conventional video signal circuit, FIG. 4 is a waveform diagram showing the operation of the conventional example shown in FIG. 1,3 …… Signal processing circuit, 2 …… Clamp circuit, 4 …… LP
F, 5 ... Sync signal separation circuit, 6 ... Subtractor, 7 ... Comparator, 8 ... Switch circuit.

Claims (1)

(57) [Claims] 1. A clamp circuit for inputting a video signal to clamp a sync tip level of the video signal to stabilize a luminance level, a low-pass filter for inputting an output of the clamp circuit to delay a phase, A sync signal separation circuit that inputs the output of the low-pass filter and outputs a sync pulse signal that is synchronized with the horizontal sync signal; and a subtractor that inputs the input signal and the output signal of the low-pass filter and outputs the difference signal thereof. A comparator which is driven by the sync pulse signal output from the sync signal separation circuit and compares the difference signal of the subtractor in the sync pulse signal period with a reference level set lower than the clamp potential of the clamp circuit. When,
A video signal circuit, comprising: a switch circuit for controlling the operation period of the clamp circuit by inputting a signal in which the pulse width of the synchronizing pulse signal is controlled by the output signal of the comparator to the clamp circuit.