JPS62237808A - Waveform shaping circuit - Google Patents

Abstract

PURPOSE:To convert an AC input signal properly to a pulse signal over the entire range of an input frequency by changing the holding time constant of a circuit holding the upper limit peak value and the lower limit peak value of the AC input signal. CONSTITUTION:The upper limit peak value and the lower limit peak value of the AC input signal S1 are held respectively by the upper limit peak holding circuit 4 and the lower limit peak holding circuit 5. The peak holding signals S4, S5 of the circuits 4,5 are inputted to an averaging circuit and the result is outputted to a comparison circuit 2 as a slice level signal S2. The circuit 2 forms a pulse signal S3 from the signals S1, S2 and outputs the signal S3. When the frequency of the signal S1 is high, a time constant change circuit 8 receiving the signal S3 gives a control to decrease the holding time constant of the circuits 4,5 and when the frequency of the signal S1 is low, the circuit 8 applies a control to increase the time constant of the circuits 4, 5. As a result, the signal S2 tracing the variation is obtained regardless of the frequency of the signal S1 and the stable output signal S3 without missing pulse is obtained.

Description

Detailed Description of the Invention [Technical Field of the Invention 1] The present invention relates to a waveform shaping circuit that converts an alternating current signal having a low frequency fluctuation component into a pulse signal. This can be applied to totals, etc.

[Technical background of the invention and its problems] When waveform shaping an AC signal having a low frequency fluctuation component into a pulse signal at a fixed slice level, the frequency is equal to the AC signal frequency due to the low frequency fluctuation component (noise component). There is a possibility that a high-frequency pulse signal cannot be obtained, so the slice level is set to a low-frequency fluctuation component (noise component).
A waveform shaping circuit has already been proposed that converts the AC signal into a pulse signal without losing the information (frequency, period, etc.) it has by changing the AC signal according to ).

As shown in FIG. 4, this waveform shaping circuit 1 consists of a comparator circuit 2 and a slice level forming circuit 3, and the AC input signal S1 is applied to the comparator circuit 2 and the slice level forming circuit 3. A slice level signal S2 formed from QS1 is applied to a comparator circuit 2 and converted into a pulse signal S3. here,
The slice level forming circuit 3 includes an upper limit peak holding circuit 4 having an integral circuit configuration to hold the upper limit beat value of the AC input signal S1, a lower limit peak holding circuit 5 having an integrating circuit configuration to hold the lower limit peak value, and each peak holding circuit. 4.5 peak holding signal 84. The average circuit 6 has a voltage dividing circuit configuration using resistors, for example, and obtains the average level of S5 and sends it out as a slice level signal @S2.

Thus, when an AC input signal S1 having a fluctuation component as shown in FIG. S2 also has a fluctuation component, so that even if the AC input signal S1 has a fluctuation component, an appropriately waveform-shaped output pulse signal S3 can be obtained.

By the way, the AC input signal S1, such as that obtained by a Karman eddy current meter, has a frequency component that changes depending on the flow rate, and its fluctuation component (noise component) also changes more greatly as the frequency becomes higher.

Therefore, if the time constants of the upper limit peak holding circuit 4 and the lower limit peak holding circuit 5 are selected too large, they will operate properly when the AC input signal S1 has a low frequency, but as shown in FIG. When the frequency becomes high and the fluctuation suddenly becomes large, the upper limit peak that is not held,
There has been an inconvenience that a lower limit peak occurs and a pulse is missing in the output pulse signal S3 in the period To in the vicinity thereof.

Therefore, it is conceivable to select the time constants of the upper limit peak holding circuit 4 and the lower limit peak holding circuit 5 to be as small as shown in FIG. 7 so that pulse dropout does not occur even if the frequency of the AC input signal S1 becomes high. . However, in this case, when the frequency of the AC input signal S1 is low, as shown in FIG.
may discharge too quickly and match the AC input signal @S1, resulting in the output pulse signal S3 becoming unstable and causing pulse dropouts. Furthermore, since the time constant is small, it also has the disadvantage of responding to spike-like noise.

[Object of the Invention] The present invention has been made in view of the above, and its purpose is to provide a waveform that can appropriately convert an AC input signal into a pulse signal over the entire frequency range in which the AC input signal can change. The purpose is to provide a shaping circuit.

[Summary of the Invention] The present invention has been made to achieve the above object, and is capable of holding the upper limit peak and lower limit peak of the AC input signal S1 in the upper limit peak holding circuit 4 and the lower limit peak holding circuit 5. In a waveform shaping circuit that uses an intermediate value between the upper limit peak and lower limit peak as a slice level signal S2 and shapes the waveform of an AC input signal S1 in a comparator circuit 2, the upper limit peak holding circuit 4 and the lower limit peak holding circuit 4 correspond to the frequency of the AC input signal S1. By providing a time constant changing circuit 8 for changing the holding time constant of the circuit 5, an attempt is made to obtain a stable output signal without missing pulses.

[Embodiment 1 of the invention Hereinafter, one embodiment of the present invention will be described in detail using the drawings.

In FIG. 1, in which parts corresponding to those in FIG. An output pulse signal S3 is given to the time constant change circuit 8, and when the frequency of this output pulse signal @S3, in other words, the frequency of the AC input signal S1 is high, the upper limit peak holding circuit 4 and the lower limit peak holding circuit 5 Time constant control signals S6 and S7 are applied to both peak holding circuits 4 and 5 to make the constants smaller and to thicken the time constants of both peak holding circuits 4 and 5 when the frequency of output pulse signal S3 is low.

Therefore, in the configuration of FIG. 1, when an AC input signal S1 having a high frequency is applied, the time constant changing circuit 8 controls the time constants of the upper limit peak holding circuit 4 and the lower limit peak holding circuit 50 to become smaller. Conversely, when the AC input signal S1 having a low frequency is applied, the time constant changing circuit 8 controls the time constants of the peak holding circuits 4 and 5 to become large. As a result, the output pulse signal S3
The values of the peak holding signals S4 and S5 can be varied so as to have an optimal time constant according to the frequency of the AC input signal S1, and thus, regardless of the frequency of the AC input signal S1, the slice level signal S2 that follows fluctuations can be used as the slice level signal S2. A stable output pulse signal S3 having no pulse dropout is output.

FIG. 2 shows a specific circuit according to an embodiment of the present invention. In Figure 2, the AC input signal is connected to the coupling capacitor C+
The signal is applied to an amplifier circuit 9 consisting of resistors R1 to R4 and an amplifier OP1 through which it is amplified, and then applied to a comparator circuit 2, an upper limit peak holding circuit 4, and a lower limit peak holding circuit 5.

The upper limit peak holding circuit 4 is an orifice amplifier OP4. Diode D2. Capacitor C3, transistor Tr1, first resistor R
Consists of 12. Here, the transistor Tr1 is used as a variable resistance element, and a series circuit consisting of the transistor Tr1 and the resistor R12 and a parallel circuit with the capacitor C3 constitute a time constant circuit, and the discharge time constant of the upper limit peak holding circuit 4 is stipulate.

As the base potential of the transistor Tr1 rises, more base current flows and more collector current flows, so as mentioned above, it can be used as a variable resistance element that uses the base potential as a control signal. Therefore, the resistor R1 is connected between the base and ground.
The resistance value is varied by the voltage across the capacitor C5 of the time constant changing circuit 8, which is connected in series with the capacitor C5.

The time constant changing circuit 8 includes an external resistor R+a and a capacitor '
It is equipped with a monostable multi-vibrator MM having an IC chip configuration having a time constant circuit R+eCa consisting of IJC6. It is grounded via R14 and capacitor C5. Therefore, the third
When an output pulse signal S3 as shown in Figure (A) is given, it is converted into a pulse signal (Q output) SQ (Figure 3 (B)) having a pulse IT determined by the time constant circuit R+sCe and is sent to the capacitor C5. is given and charges the capacitor C5 to change the variable resistance value of the transistor Tr1.

If the frequency of the output pulse signal @S3 is high, the capacitor C
The number of pulse signals SQ given to the transistor Tr5 per unit time also increases, and thus the resistance value of the transistor Tr1 decreases, and the time constant of the upper limit peak holding circuit 4 decreases. Conversely, if the frequency of the output pulse signal S3 is low, the pulse signal @SQ also decreases, and the resistance value of the transistor Tr1 increases, which greatly impairs the time constant.

Similar to the upper limit peak holding circuit 4, the lower limit peak holding circuit 5 includes an operational amplifier OP3. Diode D1゜Capacitor C2
, a resistor R9, and a transistor Tr2, and in order to vary the resistance value of the transistor Tr2, a resistor R+o is provided in the time constant changing circuit 8 in the same way as for the transistor Tri.
, R++ and a capacitor C4 are provided. This capacitor C4 is charged and discharged by the output SQ of a monostable multivibrator MM as shown in FIG. 3(C).

Therefore, the time constant of the lower limit peak holding circuit 5 also becomes smaller as the frequency of the output pulse signal S3 becomes higher, and becomes larger as the frequency of the output pulse signal S3 becomes lower.

The output @ (output voltage) of both peak holding circuits 4 and 5 is divided and averaged by an averaging circuit 6 made up of resistors R7 and Rs having the same resistance value, and is applied to the comparator circuit 2 as a slice level signal S2.

Comparison circuit 2 includes operational amplifier OP2. AC input signal S1 consisting of low 2°s, R6 and given from the amplifier circuit 10.
is received at the non-inverting input terminal, and the slice level signal $2 is also received at the non-inverting input terminal.
is received at its inverting input terminal, and outputs an output pulse signal S3 that rises to logic "1" when the AC input signal S1 is greater than the slice level signal QS2.

The dash-dotted line in FIG. 6 shows the peak-holding signal 840.850 applied to this circuit. As is clear from this figure, according to the above configuration, the frequency of the output pulse signal S3,
That is, since the time constant of the peak holding circuit 4.5 can be optimally varied according to the frequency of the AC input signal S1, a slice level signal 9S20 that follows fluctuations can be obtained, and the output pulse signal $3 As a result, a stable device without pulse dropout can be obtained.

By the way, above! According to the embodiment, information regarding the frequency of the AC input signal $1 to the time constant changing circuit 8 is obtained from the output pulse signal S3, but it may be obtained from other parts.

Furthermore, although the above example shows a circuit having an operational amplifier configuration as a specific example, the present invention is not limited to this, and the point is to use a circuit having a configuration in which the time constant of the peak holding circuit can be varied according to the frequency. That's fine.

[Effect of the invention 1 As described above, according to the present invention, the time constants of the upper limit peak holding circuit and the lower limit peak holding circuit are varied according to the frequency of the AC input signal, so that the frequency of the AC input signal can be changed. Even if there is a sudden change in fluctuation, there will be no pulse dropout.Also, even if the frequency becomes very low, a slice level signal that can be distinguished from an AC input signal will be obtained, and an output pulse signal will be sent out without pulse dropout. A waveform shaping circuit can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of this invention, FIG. 2 is a circuit diagram showing a specific circuit according to an embodiment of this invention,
Figure 3 is a signal waveform diagram of each part of the circuit in Figure 2, Figure 4 is a block diagram showing the conventional circuit, Figure 5 is a signal waveform diagram of each part, and Figures 6 to 8 are disadvantages of the conventional circuit. FIG. 2 is a signal waveform diagram for explaining. 2... Comparison circuit 4... Upper limit peak holding circuit 5
... Lower limit peak holding circuit 6 ... Average circuit 8 ... Time constant changing circuit Patent applicant Nissan Motor Co., Ltd. No. 11 No. 3rM Fig. 4 Fig. 5

Claims (1)

[Claims] The upper limit peak and the lower limit peak of the AC input signal are held in an upper limit peak holding circuit and the lower limit peak holding circuit, and the intermediate value of the held upper limit peak and lower limit peak is used as a slice level signal for the AC input signal. The waveform shaping circuit performs a comparison process and shapes the waveform, comprising a time constant changing circuit that changes the holding time constants of the upper limit peak holding circuit and the lower limit peak holding circuit according to the frequency of the AC input signal. Waveform shaping circuit.