JPS62235808A - Frequency converting circuit - Google Patents

Frequency converting circuit

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Publication number
JPS62235808A
JPS62235808A JP7954986A JP7954986A JPS62235808A JP S62235808 A JPS62235808 A JP S62235808A JP 7954986 A JP7954986 A JP 7954986A JP 7954986 A JP7954986 A JP 7954986A JP S62235808 A JPS62235808 A JP S62235808A
Authority
JP
Japan
Prior art keywords
phase
signal
frequency
phase difference
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7954986A
Other languages
Japanese (ja)
Inventor
Takao Shima
島 隆雄
Yoshiharu Tozawa
義春 戸澤
Katsuya Tagami
田上 勝也
Hideto Furukawa
秀人 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7954986A priority Critical patent/JPS62235808A/en
Publication of JPS62235808A publication Critical patent/JPS62235808A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To simplify the circuit constitution by using one FET to apply two operations such as frequency multiplication and frequency conversion. CONSTITUTION:After a local oscillation signal is divided into two by signals having a phase difference of 90 deg. by a 90 deg. distributer 5, they are doubled by field effect transistors (TRs) 6,7, then a two multiple signal having a phase difference by 180 deg. is obtained but it is not ideally outputted because being cancelled by an in-phase synthesizer 9. The input signals, however, are fed to the field effect TRs by a phase difference of 180 deg., and when they are mixed by double-frequency signals having a phase difference of 180 deg., the in-phase frequency conversion signal is obtained and combined in phase by an in-phase synthesizer 9 and the result is outputted. That is, since the frequency multiplication and the frequency conversion are applied by the field effect TRs 6,7, the circuit constitution is simplified.

Description

【発明の詳細な説明】 〔概要〕 周波数変換回路において、90度位相差のある局部発振
信号をソース接地された2つの電界効果トランジスタの
ゲートに入力してそれぞれ2週倍してドレインに現れた
2逓倍信号と、2つのドレインに注入された180度位
相差のある入力信号とを混合して得られた周波数変換信
号を同相合成して取出す様にして、回路構成を簡単にす
ると共に。
[Detailed Description of the Invention] [Summary] In a frequency conversion circuit, a local oscillation signal with a phase difference of 90 degrees is input to the gates of two field effect transistors whose sources are grounded, and a signal multiplied by two weeks appears at the drain of each field effect transistor. A frequency-converted signal obtained by mixing a double signal and an input signal having a 180 degree phase difference injected into two drains is synthesized in phase and extracted, thereby simplifying the circuit configuration.

局部光rX信号の漏洩を抑圧したものである。This suppresses leakage of the local optical rX signal.

[産業上の利用分野〕 本発明は、例えばマイクロ波帯の送信機のアップコンバ
ータに使用する周波数変換回路の改良に関するものであ
る。
[Industrial Application Field] The present invention relates to an improvement in a frequency conversion circuit used, for example, in an up-converter of a microwave band transmitter.

半導体技術の進歩により超高周波帯で動作する電界効果
トランジスタ(以下FETと省略する)が開発され、超
高周波帯用ダイオードの代わりに超高周波帯の周波数変
換素子として用いられることが可能となった。そこで、
このFETを使用して回路構成が簡単で、しかも局部発
振信号の漏洩が抑圧された周波数変換回路が要望されて
いる。
Advances in semiconductor technology have led to the development of field effect transistors (hereinafter abbreviated as FETs) that operate in ultra-high frequency bands, which can now be used as frequency conversion elements in ultra-high frequency bands instead of diodes for ultra-high frequency bands. Therefore,
There is a need for a frequency conversion circuit that uses this FET, has a simple circuit configuration, and suppresses leakage of local oscillation signals.

〔従来の技術〕[Conventional technology]

第3図は従来例のブロック図を示す。 FIG. 3 shows a block diagram of a conventional example.

図において、1はラフトレース形ハイブリッドで、この
ハイブリッドは次の様な性質を持っている。即ち、 (1)  端子■に加えられた信号の電力は半分づつに
分配されて端子■と■に180度の位相差で現れるが、
端子■には現れない。
In the figure, 1 is a rough trace type hybrid, and this hybrid has the following properties. That is, (1) The power of the signal applied to terminal ■ is divided in half and appears at terminals ■ and ■ with a phase difference of 180 degrees,
It does not appear on terminal ■.

(2)  端子■と端子■から入力した信号は端子■で
同相合成されるが、端子■には現れない。
(2) Signals input from terminal ■ and terminal ■ are combined in phase at terminal ■, but do not appear at terminal ■.

次に、端子lN−1より入力した例えば6.5GHzの
局部発振信号は2週倍器4で2週倍されて13Gtlz
の信号に変換された後、ラフトレース形ハイブリッドl
の端子■から端子■及び端子■を通って互いに逆方向に
接続されたダイオード2及び3に180度の位相差で加
えられる。
Next, the local oscillation signal of, for example, 6.5 GHz inputted from the terminal lN-1 is multiplied by 2 weeks by the 2-week multiplier 4 and becomes 13 Gtlz.
After being converted into a signal of rough trace type hybrid l
The signal is applied from the terminal (2) through the terminal (2) and the terminal (2) to the diodes 2 and 3, which are connected in opposite directions to each other, with a phase difference of 180 degrees.

一方2周波数変換すべき例えばI GHzの中間周波信
号もダイオード2,3に加えられるので614G)lz
、 12GHz等の周波数変換信号が端子■より同相合
成されて出力される。そこで、帯域通過型フィルタ(図
示せず)で希望の14GHzの成分のみを取出す。
On the other hand, the intermediate frequency signal of, for example, I GHz, which should be converted into two frequencies, is also applied to diodes 2 and 3, so 614G)lz
, 12 GHz, etc., are in-phase synthesized and output from terminal (2). Therefore, only the desired 14 GHz component is extracted using a band pass filter (not shown).

尚、ラフトレース形ハイブリッドを用いるので上記の様
に理想的には局部発振信号は出力側には現れないが実際
は多少漏洩する。しかし、漏洩電力は小さいので希望の
周波数変換信号を取出す帯域通過型フィルタの構成が比
較的簡単になる。
Note that since a rough trace type hybrid is used, ideally the local oscillation signal does not appear on the output side as described above, but in reality it leaks to some extent. However, since the leakage power is small, the configuration of the band-pass filter for extracting the desired frequency-converted signal is relatively simple.

叉、局部発振信号として直接発振した13GHzをラフ
トレース形ハイブリッドに入力しないのは、高い周波数
安定度の局部発振信号が要求される場合、発振周波数の
低い方が周波数安定化回路の構成が簡単になる為である
However, the reason why the 13 GHz directly oscillated local oscillation signal is not input to the rough trace type hybrid is that when a local oscillation signal with high frequency stability is required, the configuration of the frequency stabilization circuit is easier when the oscillation frequency is lower. It is for the sake of becoming.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、上記で説明した様に2週倍器を別に必要とする
ので周波数変換回路の回路構成が複雑になると云う問題
点がある。
However, as explained above, since a two-week multiplier is required separately, there is a problem that the circuit configuration of the frequency conversion circuit becomes complicated.

〔問題点を解決する為の手段〕[Means for solving problems]

上記の問題点は第1図に示す様に、局部発振信号を90
度の位相差を持つ2つの信号に分配する90度分配器5
と、入力信号を180度の位相差を持つ2つの信号に分
配する180度分配器8と、該90度分配器の出力をそ
れぞれゲートに加えて2i!1倍してそれぞれのドレイ
ンに現れた″2逓倍信号と、該それぞれのドレインに注
入された該180度分配器8の出力とを混合して周波数
変換信号を取出すソース接地型の電界効果トランジスタ
6.7と、該電界効果トランジスタのそれぞれのドレイ
ン出力を同相で合成する同相合成器9とで構成された本
発明の周波数変換器回路により解決される。
The above problem is as shown in Figure 1, when the local oscillation signal is
90 degree divider 5 that divides into two signals with a phase difference of degrees
, a 180 degree divider 8 which divides the input signal into two signals having a phase difference of 180 degrees, and the outputs of the 90 degree divider are added to the respective gates to generate 2i! A source-grounded field effect transistor 6 that mixes the 1-multiplied signal that appears at each drain and the output of the 180-degree divider 8 that is injected into each drain to obtain a frequency-converted signal. .7, and an in-phase synthesizer 9 that combines the respective drain outputs of the field effect transistors in the same phase.

〔作用〕[Effect]

本発明は局部発振信号を90度分配器5で90度の位相
差を持つ信号に2分配した後、それぞれの電界効果トラ
ンジスタ6.7で2逓倍すると180 変位相差のある
2逓倍信号が得られるが、これば理想的には同相合成器
9で打消されて出力されない。
In the present invention, a local oscillation signal is divided into two signals with a phase difference of 90 degrees by a 90 degree divider 5, and then doubled by each field effect transistor 6.7 to obtain a doubled signal with a phase difference of 180 degrees. However, if this happens, ideally it will be canceled by the in-phase synthesizer 9 and not output.

しかし、入力信号は180度の位相差で電界効果トラン
ジスタに加えられ、ここで前記の180度の位相差のあ
る2遍倍信号と混合されると同相の周波数変換信号が得
られ、同相合成器9で同相合成されて出力される。即ち
、電界効果トランジスタ6.7で周波数逓倍と周波数変
換を行うので回路構成が簡単になる。
However, the input signal is applied to the field effect transistor with a phase difference of 180 degrees, and when mixed here with the above-mentioned double signal with a phase difference of 180 degrees, an in-phase frequency converted signal is obtained, and the in-phase synthesizer 9, the signals are in-phase combined and output. That is, since the field effect transistors 6 and 7 perform frequency multiplication and frequency conversion, the circuit configuration becomes simple.

〔実施例〕〔Example〕

第2図は本発明の実施例のブロック図を示す。 FIG. 2 shows a block diagram of an embodiment of the invention.

尚、全図を通じて同一記号は同一対象物を示し、61、
71は入力側整合回路、 62.72は出力側整合回路
、 C1,C2は直流阻止用コンデンサである。
In addition, the same symbols indicate the same objects throughout the figures, 61,
71 is an input side matching circuit, 62 and 72 are output side matching circuits, and C1 and C2 are DC blocking capacitors.

以下、入出力の周波数は従来例と同じとして第2図によ
り動作の説明を行う。
Hereinafter, the operation will be explained with reference to FIG. 2 assuming that the input and output frequencies are the same as in the conventional example.

図において、6.5 GHzの局部発振信号は90度ハ
イブリッド(以下90度11YBと省略する)で90度
の位相差を持つ2つの信号に分配された後、入力側整合
回路61を介してソース(S)が接地された電界効果ト
ランジスタ(以下PETと省略する)6のゲ−ト(G)
に加えられる。そこで、PE76のゲート側の整流作用
及び相互コンダクタンスgmの非線形により2逓倍され
た13GHzの信号がドレイン(D)に現れる。
In the figure, a 6.5 GHz local oscillation signal is divided into two signals with a 90 degree phase difference by a 90 degree hybrid (hereinafter abbreviated as 90 degree 11YB), and then sent to the source via an input side matching circuit 61. Gate (G) of field effect transistor (hereinafter abbreviated as PET) 6 with (S) grounded
added to. Therefore, due to the rectification effect on the gate side of the PE 76 and the nonlinearity of the mutual conductance gm, a signal of 13 GHz, which is doubled, appears at the drain (D).

一方、l GHzの入力信号は180度HYB 8で1
80度位相差のある2つの信号に分配された後、1つの
信号はPH76のドレインに加えられ、13GHzで変
化しているFET 6のドレイン−ソース間のドレイン
抵抗で振幅変調されて12GH2,14GH2等の周波
数変換された信号がドレイン側に現れる。そこで、14
GHz等の周波数変換信号は出力側整合回路62゜直流
阻止用コンデンサC1を介して同相合成器9に加えられ
る。
On the other hand, the l GHz input signal is 180 degrees HYB 8 and 1
After being divided into two signals with a phase difference of 80 degrees, one signal is applied to the drain of PH76 and amplitude modulated by the drain resistance between the drain and source of FET 6 varying at 13 GHz to 12 GH2 and 14 GH2. Frequency-converted signals such as , etc. appear on the drain side. Therefore, 14
A frequency conversion signal such as GHz is applied to the in-phase synthesizer 9 via an output matching circuit 62 and a DC blocking capacitor C1.

尚、FET 7についても上記と同じ動作をして14G
Hzの周波数変換信号が同相合成器9に加えられて、F
ET 6で発生したものと同相合成されて中力されるが
、FETで逓倍9周波数変換を行うので回路構成が簡単
になる。
In addition, the same operation as above is performed for FET 7 to obtain 14G.
The frequency converted signal of Hz is applied to the in-phase synthesizer 9 and F
It is in-phase combined with that generated by ET 6 and fed to a neutral power, but the circuit configuration is simplified because the frequency is multiplied by 9 and converted using FET.

叉、局部発振信号については上記の様にこの同相合成器
9で漏洩が抑圧される。
Furthermore, leakage of the local oscillation signal is suppressed by the in-phase synthesizer 9 as described above.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明した様に本発明によれば、1つのFET
で周波数逓倍と周波数変換の2つの動作を行う様にした
ので、回路構成が簡単になると云う効果が得られる。
As explained in detail above, according to the present invention, one FET
Since the two operations of frequency multiplication and frequency conversion are performed, the effect of simplifying the circuit configuration can be obtained.

尚、局部発振信号の漏洩が抑圧されるので希望信号を取
出すフィルタの構成が簡単になる。
Note that since the leakage of the local oscillation signal is suppressed, the configuration of the filter for extracting the desired signal is simplified.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の原理ブロック図、 第2図は本発明の実施例のブロック図、第3図は従来例
のブロック図を示す。 図において、 5は90度分配器、 6.7は電界効果トランジスタ、 8は180度分配器、 9は同相合成器を示す。
FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional example. In the figure, 5 is a 90 degree divider, 6.7 is a field effect transistor, 8 is a 180 degree divider, and 9 is an in-phase combiner.

Claims (1)

【特許請求の範囲】 局部発振信号を90度の位相差を持つ2つの信号に分配
する90度分配器(5)と、入力信号を180度の位相
差を持つ2つの信号に分配する180度分配器(8)と
、 該90度分配器の出力をそれぞれゲートに加えて2逓倍
してそれぞれのドレインに現れた2逓倍信号と、該それ
ぞれのドレインに注入された該180度分配器(8)の
出力とを混合して周波数変換信号を取出すソース接地型
の電界効果トランジスタ(6、7)と、 該電界効果トランジスタのそれぞれのドレイン出力を同
相で合成する同相合成器(9)とで構成されたことを特
徴とする周波数変換回路。
[Claims] A 90 degree divider (5) that divides a local oscillation signal into two signals with a phase difference of 90 degrees, and a 180 degree divider (5) that divides an input signal into two signals with a phase difference of 180 degrees. The outputs of the divider (8) and the 90-degree divider are applied to the respective gates and multiplied by 2, and the doubled signals appear at the respective drains, and the outputs of the 180-degree divider (8) are injected into the respective drains. ), and a common-source field effect transistor (6, 7) that mixes the outputs of the field-effect transistors to obtain a frequency-converted signal, and an in-phase synthesizer (9) that combines the drain outputs of the field-effect transistors in the same phase. A frequency conversion circuit characterized by:
JP7954986A 1986-04-07 1986-04-07 Frequency converting circuit Pending JPS62235808A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7954986A JPS62235808A (en) 1986-04-07 1986-04-07 Frequency converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7954986A JPS62235808A (en) 1986-04-07 1986-04-07 Frequency converting circuit

Publications (1)

Publication Number Publication Date
JPS62235808A true JPS62235808A (en) 1987-10-16

Family

ID=13693087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7954986A Pending JPS62235808A (en) 1986-04-07 1986-04-07 Frequency converting circuit

Country Status (1)

Country Link
JP (1) JPS62235808A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02217007A (en) * 1989-02-17 1990-08-29 Nippon Telegr & Teleph Corp <Ntt> Balance type multiplying circuit and balance type harmonic mixer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02217007A (en) * 1989-02-17 1990-08-29 Nippon Telegr & Teleph Corp <Ntt> Balance type multiplying circuit and balance type harmonic mixer

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