JPS62235748A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the drop in the withstand voltage of a diffused layer for junction isolation due to a high-voltage wiring without increasing a manufacturing process by providing a diffused layer of the same conductivity type as that of the diffused layer at least one piece around the diffused layer for junction isolation whereon the high-voltage wiring crosses. CONSTITUTION: A diffused layer 3 of one conductivity type for junction isolation is formed in the conductivity type epitaxial layer 2 formed on semiconductor substrate 1 of a one conductivity type and an element region is isolated. The other conductivity type diffused layers 7 and B are provided around the diffused layer 3 and formed using the base diffusion of an N-P-N transistor of a constitution wherein the substrate 1 is a P-type, the epitaxial layer 2 is an N-type and the junction isolation layer 3 is a P-type. The distances between the diffused layer 3 for junction isolation and the diffused layers 7 and 8 are set in such a way that the diffused layers 7 are included in the interiors of depletion layers 4 though the depletion layers are curved inside at the surface by the effect of the electric field of a high-voltage wiring 6 on an insulating film 5. Moreover, the diffused layers 8 are provided in such a way that the diffused layers 6 are included in the interiors of the depletion layers to be extended from the diffused layers 7, which are similarly curved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a structure for preventing a drop in breakdown voltage at a junction isolation portion of a high breakdown voltage integrated circuit.

[Conventional technology]

Conventionally, as this type of high voltage integrated circuit, there is one shown in FIG. In this structure, a reverse conductivity type epitaxial layer 2 is formed on a semiconductor substrate IK of a negative conductivity type, and a junction isolation diffusion layer 3 of one conductivity type is formed in the epitaxial layer 2 to isolate element regions. Here, since the high voltage wiring 6 passes over the junction isolation diffusion layer 3 via the oxide film 5, the depletion layer 4 is near the surface and inside (on the junction isolation diffusion layer side) the withstand voltage of the K-curved junction isolation part decreases. occurs. In order to prevent the breakdown voltage of this junction isolation part from decreasing, the concentration of the epitaxial layer 2 may be lowered or
Alternatively, a structure is adopted in which the thickness of the oxide film 5 is increased.

[Problem that the invention seeks to solve]

In the above-mentioned conventional semiconductor device, if the structure is such that the thickness of the layer is reduced, the expansion of the depletion layer becomes large and the layer thickness must be increased, resulting in increased cost and the need for a diffusion layer for junction isolation. There are disadvantages such as a long heat treatment time. In addition, if the structure has an increased oxide film thickness, the manufacturing conditions will be different from those for other low-voltage integrated circuits.
The disadvantage is that it increases the complexity of manufacturing controls.

[Means for solving problems]

The present invention relates to a diffusion layer for junction isolation through which high-voltage wiring passes.

The semiconductor device of the present invention is characterized in that at least one diffusion layer of the same conductivity type as the junction isolation diffusion layer is provided around the junction isolation diffusion layer crossed by the high voltage wiring.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a longitudinal sectional view of an embodiment of the present invention.

An epitaxial layer 2 of an opposite conductivity type is formed on a -conductivity type semiconductor substrate, and a -conductivity type junction isolation diffusion layer 3 is formed in the epitaxial layer 2 to isolate element regions.

Here, a reverse conductivity type diffusion layer 7 is provided around the diffusion layer 3 for junction isolation.
．． 8 is provided, and this layer is, for example, NPN, which is commonly used in integrated circuits in which the substrate 1 is P type, the epitaxial layer 2 is N type, and the junction isolation layer is P type.
It may be formed using transistor base diffusion. In addition,
The distance between the junction isolation diffusion layer 3 and the diffusion layer 7.8 is determined by the fact that the depletion layer 4 is bent inward at the surface due to the influence of the electric field of the high voltage wiring 6 on the insulating film 5; Make sure that the diffusion layer 7 is included. Further, the diffusion layer 8 may be configured such that the depletion layer extending from the diffusion layer 7 enters the inside which is similarly bent.

〔Effect of the invention〕

As explained above, the present invention provides a diffusion layer of the same conductivity type as the junction isolation diffusion layer around the junction isolation diffusion layer, thereby eliminating the need for increasing the number of manufacturing steps. This has the effect of reducing the drop in breakdown voltage.

[Brief explanation of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1...Semiconductor substrate, 2...Epitaxial layer, 3...Diffusion layer for junction isolation, 4...
... Depletion layer, 5 ... Oxide film, 6 ... High voltage wiring, 7, 8 ... Diffusion layer.

Claims (1)

[Claims] A semiconductor device characterized in that at least one diffusion layer of the same conductivity type as the diffusion layer is provided around a junction isolation diffusion layer crossed by a high voltage wiring.