JPS6223124A - Film carrier lsi - Google Patents

Film carrier lsi

Info

Publication number
JPS6223124A
JPS6223124A JP16339685A JP16339685A JPS6223124A JP S6223124 A JPS6223124 A JP S6223124A JP 16339685 A JP16339685 A JP 16339685A JP 16339685 A JP16339685 A JP 16339685A JP S6223124 A JPS6223124 A JP S6223124A
Authority
JP
Japan
Prior art keywords
terminals
film base
lsi
film carrier
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16339685A
Other languages
Japanese (ja)
Other versions
JPH0424858B2 (en
Inventor
Koki Taniguchi
谷口　弘毅
Nobuhiko Miyazaki
宮崎　伸彦
Nobutaka Takahashi
信貴 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP16339685A priority Critical patent/JPS6223124A/en
Publication of JPS6223124A publication Critical patent/JPS6223124A/en
Publication of JPH0424858B2 publication Critical patent/JPH0424858B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits

Abstract

PURPOSE:To facilitate the connection of fine-pitch terminals by a method wherein a region, positioned facing LSI element lead terminals on a film base, is constituted of two portions, one provided with through-holes and the other not. CONSTITUTION:Through-holes 3 provided in a film base 1 are positioned facing lead terminals groups 7-1 with gasp between the terminals relatively wide as shown in the left-side portion of the figure. No through-holes or slits are provided in the other portion facing a lead terminals group 7-2 with gaps between the terminals very fine. It is so designed that, when the film base 1 is cut along lines 4, the terminals belonging to the lead terminals groups 7-1 may protrude from an edge of the film base 1 while those belong to the lead terminal groups 7-2 remain contained within the film base 1.

Description

【発明の詳細な説明】 く技術分野〉 本発明はテープに一定ピッチでＬＳＩを搭載してなるフ
ィルムキャリアＬＳＩに関するものである。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a film carrier LSI in which LSIs are mounted on a tape at a constant pitch.

〈従来技術〉 従来のフィルムキャリアＬＳＩは、たとえば第６図に示
すように構成されている。すなわち、■はポリエステル
あるいはポリイミド等のフィルム基材、２ばＬＳＩ検査
用パッド、３はスリット（又は透孔）、４はカットライ
ン、５はスズロケット用の穴、６はＬＳＩモールド部、
７はＬＳＩリード端子部を示し、前記カットライン４の
ところで切断してフィルム基材ＩからＬＳＩ素子を分離
するように形成されている。<Prior Art> A conventional film carrier LSI is configured as shown in FIG. 6, for example. That is, ■ is a film base material such as polyester or polyimide, 2 is an LSI inspection pad, 3 is a slit (or through hole), 4 is a cut line, 5 is a hole for a tin rocket, 6 is an LSI mold part,
Reference numeral 7 indicates an LSI lead terminal portion, which is formed so as to be cut at the cut line 4 to separate the LSI element from the film base material I.

しかしながら、上記従来の場合はＬＳＩ素子を分離した
とき、スリット（又は透孔）３のためにＬＳＩ素子の全
てのリード端子はフィルム基材Ｉの端部から突出した状
態となり、このためリード端子のファインピッチ化に伴
って端子間並びに端子幅が非常に狭くなった場合に、リ
ード端子のフォーミング時に切断し易くなり、かつリー
ド端子の半田付が著しく困難となるとともに、リード端
子が曲り易く工程でのハンドリングが困難になるという
大きな問題を有していた０ 〈目　的〉 本発明はかかる従来の問題点に鑑みて成されたもので、
フィルム基材上のＬＳＩ素子のリード端子に対向する領
域を透孔を有する部分と透孔を有しない部分とに分ける
ことにより、上記従来のファインピッチ化に伴なう問題
点を解消することができるとともに、リード端子を大電
流端子として又接続にあたって圧着できないような場合
にも対処することができるフィルムキャリアＬＳＩを提
供せんとするものである。However, in the conventional case described above, when the LSI element is separated, all the lead terminals of the LSI element protrude from the edge of the film base material I due to the slit (or through hole) 3. When the distance between terminals and the width of the terminals become extremely narrow due to finer pitch, it becomes easier to cut the lead terminals during forming, and it becomes extremely difficult to solder the lead terminals. The present invention has been made in view of such conventional problems.
By dividing the area facing the lead terminals of the LSI element on the film base material into a part with through holes and a part without through holes, the problems associated with the conventional fine pitch formation can be solved. It is an object of the present invention to provide a film carrier LSI which can cope with the case where lead terminals can be used as large current terminals or cannot be crimped for connection.

〈実施例〉 以下図にもとづいて本発明の詳細な説明する。<Example> The present invention will be explained in detail below based on the drawings.

第１図は本発明に係るフィルムキャリアＬＳＩの平面図
である。FIG. 1 is a plan view of a film carrier LSI according to the present invention.

図において、１はポリイミド若しくはポリエステル等か
らなるフィルム基材、２はＬＳＩ検査用パッド、３１ｄ
フイルム基材１に設けた透孔であシ、この透孔は図中左
側の端子間と端子幅とが比較的広く形成されたリード端
子群７−１に対向して設けられている。４はカットライ
ン、５はフィルム基材１を搬送するスズロケットの爪に
嵌り込む穴、６はＬＳＩ素子のモールド部である。また
、７−２はファインピッチ化したもう一方のリード端子
群であシ、このリード端子群７−２に対向するフィルム
基村上の部分には上記したようなスリット（又は透孔）
は設けられていない。すなわち、このフィルムキャリア
ＬＳＩはカットライン４のところで切断したとき、リー
ド端子群７−１の方はフィルム基材ｌの端部から突出し
、今一つのリード端子群７−２の方はフィルム基材Ｉに
一体化されるように考慮されている。In the figure, 1 is a film base material made of polyimide or polyester, 2 is an LSI testing pad, and 31d
This is a through hole provided in the film base material 1, and this through hole is provided facing the lead terminal group 7-1 on the left side in the figure, in which the distance between the terminals and the terminal width are relatively wide. 4 is a cut line, 5 is a hole into which the claw of a tin rocket for transporting the film base material 1 is fitted, and 6 is a molded portion of the LSI element. In addition, 7-2 is the other fine-pitch lead terminal group, and the above-mentioned slit (or through hole) is provided on the upper part of the film base facing this lead terminal group 7-2.
is not provided. That is, when this film carrier LSI is cut at the cut line 4, the lead terminal group 7-1 protrudes from the edge of the film base material I, and the other lead terminal group 7-2 protrudes from the edge of the film base material I. It is being considered that it will be integrated into the

次に上記したフィルムキャリアＬＳＩの使用例について
説明する。Next, an example of use of the above film carrier LSI will be explained.

第２図は本発明のフィルムキャリアＬＳＩをＬＣＤドラ
イバーとして使用した例、第３図はその断面図である。FIG. 2 shows an example in which the film carrier LSI of the present invention is used as an LCD driver, and FIG. 3 is a sectional view thereof.

図中、８は液晶表示セル、９はフィルムキャリアＬＳＩ
（セグメント側）、１０はプリント配線基板、１１はフ
ィルムキャリアＬＳＩ（コモン側）、１２は有機フレキ
シブルＥＬ１６の電極コネクター、１３は同ＥＬのシー
ル部、１４は同ＥＬの発光部、Ｉ５は同ＥＬの挿入用ガ
イドレールであシ、この例ではフィルムキャリアＬＳＩ
の幅及び間隔共に広く形成され且つフィルム基材から突
出したリード端子群７−１はプリント配線基板１０の端
子部に半田付され、また他方のリード端子７−２は図に
示す如くフォーミングし、ファインピッチ化された液晶
表示セル８の接続端子に金属粒子を含んだヒートシール
材で接続することが出来る０すなわち、まずリード端子
群７−２の方をフォーミングして液晶表示セル８に接続
したのち、リード端子群７−１の方をストローク調整し
圧力が余りかからないようにした治具又は平材にてプリ
ント配線基板１０の端子に半田接続する。この場合、リ
ード端子群７−１はフィルム基材ｌの端部から突出して
いるので熱の伝わりが良く、このため液晶及びＥＬに大
きな圧力を加えることなく接続可能である。なお、１７
は裏側偏光板、Ｉ８は表側偏光板である。In the figure, 8 is a liquid crystal display cell, 9 is a film carrier LSI
(segment side), 10 is a printed wiring board, 11 is a film carrier LSI (common side), 12 is an electrode connector of organic flexible EL 16, 13 is a seal part of the same EL, 14 is a light emitting part of the same EL, I5 is the same EL In this example, there is a guide rail for inserting the film carrier LSI.
The lead terminal group 7-1, which is formed wide in both width and interval and protrudes from the film base material, is soldered to the terminal portion of the printed wiring board 10, and the other lead terminal 7-2 is formed as shown in the figure. The connection terminals of the fine-pitch liquid crystal display cell 8 can be connected with a heat sealing material containing metal particles. In other words, the lead terminal group 7-2 was first formed and connected to the liquid crystal display cell 8. Thereafter, the lead terminal group 7-1 is connected to the terminals of the printed wiring board 10 by soldering using a jig or a flat material whose stroke is adjusted so as not to apply too much pressure. In this case, since the lead terminal group 7-1 protrudes from the end of the film base material l, heat conduction is good, and therefore connection can be made without applying large pressure to the liquid crystal and the EL. In addition, 17
is a back side polarizing plate, and I8 is a front side polarizing plate.

第４図は有機フレキシブルＥＬを有しない反射型のＬＣ
Ｄに使用した例であシ（第５図は第４図の断面図）、図
中８−１は表側ＬＣＤガラス、８−２は裏側ＬＣＤガラ
ス、Ｉ９は接着剤を示し、特にフィルムキャリアＬＳＩ
９．１＋の接続方法は前述の例と同じである。Figure 4 shows a reflective LC without organic flexible EL.
In this example, 8-1 is the front LCD glass, 8-2 is the back LCD glass, and I9 is the adhesive, especially for the film carrier LSI.
The connection method for 9.1+ is the same as in the previous example.

く効　果〉 以上詳細に説明したように、本発明のフィルムキャリア
ＬＳＩはフィルム基材上のＬＳＩ素子のリード端子に対
向する領域を透孔を有する部分と透孔を有しない部分と
に分けて成るから次のような効果を奏することが出来る
。Effects> As explained in detail above, the film carrier LSI of the present invention divides the area on the film base material facing the lead terminals of the LSI element into a part with a through hole and a part without a through hole. As a result, the following effects can be achieved.

（イ）接続すべき部分の端子がファインピッチであるに
もかかわらず接続が容易である。(a) Connection is easy even though the terminals of the parts to be connected are fine pitch.

（ロ）工程でのリード端子のノ・ンドリングが容易でき
る。(b) Lead terminals can be easily connected during the process.

（ハ）　リード端子のフォーミングが容易であるＯに）
　リード端子の修理が容易である。(C) For O, which makes it easy to form lead terminals)
Lead terminals are easy to repair.

（ホ）大電流端子として、又半田付によって圧力を加え
ることなく接続することが出来る。(E) It can be used as a high current terminal and can be connected without applying pressure by soldering.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明に係るフィルムキャリアＬＳＩの平面図
、第２図は本発明フィルムキャリアＬＳＩをＬＣＤドラ
イバーとして使用した例を示す図、第３図は第２の断面
図、第４図は本発明フィルムキャリアＬＳＩを反射型Ｌ
ＣＤに使用した例を示す図、第５図は第４図の断面図、
第６図は従来のフィルムキャリアＬＳＩの平面図である
。 １はフィルム基材、２はＬＳＩ検査用パッド、３はスリ
ット（透孔）、４はカットライン、６はＬＳＩモールド
部、７−１．７−２はリード端子代理人　弁理士　福　
士　愛　彦（他２名）第１図 ＄２図 第３　図FIG. 1 is a plan view of a film carrier LSI according to the present invention, FIG. 2 is a diagram showing an example in which the film carrier LSI of the present invention is used as an LCD driver, FIG. 3 is a second sectional view, and FIG. Invented film carrier LSI into reflective type L
A diagram showing an example of use in a CD, Figure 5 is a cross-sectional view of Figure 4,
FIG. 6 is a plan view of a conventional film carrier LSI. 1 is a film base material, 2 is a pad for LSI inspection, 3 is a slit (through hole), 4 is a cut line, 6 is an LSI mold part, 7-1.7-2 is a lead terminal agent, patent attorney Fuku
Aihiko Shi (and 2 others) Figure 1 $2 Figure 3

Claims (1)

【特許請求の範囲】 １、フィルム基材上に集積回路（ＬＳＩ）素子を搭載し
たフィルムキャリアＬＳＩに於て、 前記フィルム基材上の前記集積回路（ＬＳＩ）素子のリ
ード端子に対向する領域を透孔を有する部分と透孔を有
しない部分とに分けて成ることを特徴とするフィルムキ
ャリアＬＳＩ。[Claims] 1. In a film carrier LSI in which an integrated circuit (LSI) element is mounted on a film base material, a region facing the lead terminal of the integrated circuit (LSI) element on the film base material is A film carrier LSI characterized in that it is divided into a part with a through hole and a part without a through hole.
JP16339685A 1985-07-23 1985-07-23 Film carrier lsi Granted JPS6223124A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16339685A JPS6223124A (en) 1985-07-23 1985-07-23 Film carrier lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16339685A JPS6223124A (en) 1985-07-23 1985-07-23 Film carrier lsi

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP6170682A Division JP2509804B2 (en) 1994-07-22 1994-07-22 Display device

Publications (2)

Publication Number Publication Date
JPS6223124A true JPS6223124A (en) 1987-01-31
JPH0424858B2 JPH0424858B2 (en) 1992-04-28

Family

ID=15773092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16339685A Granted JPS6223124A (en) 1985-07-23 1985-07-23 Film carrier lsi

Country Status (1)

Country Link
JP (1) JPS6223124A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63128527U (en) * 1987-02-13 1988-08-23
JPH0915355A (en) * 1995-07-03 1997-01-17 Toshiba Home Technol Corp Device with timer

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54124675A (en) * 1978-03-22 1979-09-27 Matsushita Electric Ind Co Ltd Semiconductor device and its mounting method
JPS5753951A (en) * 1980-09-17 1982-03-31 Hitachi Ltd Assembling method of semiconductor device
JPS58188684U (en) * 1982-06-10 1983-12-15 セイコーエプソン株式会社 electronic display device
JPS59119477A (en) * 1982-12-27 1984-07-10 Omron Tateisi Electronics Co Transaction processor
JPS59159553A (en) * 1983-03-01 1984-09-10 Matsushita Electric Ind Co Ltd Film carrier
JPS59210419A (en) * 1983-05-13 1984-11-29 Seiko Epson Corp Liquid crystal display body device
JPS616832A (en) * 1984-06-20 1986-01-13 Matsushita Electric Ind Co Ltd Material to be loaded

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54124675A (en) * 1978-03-22 1979-09-27 Matsushita Electric Ind Co Ltd Semiconductor device and its mounting method
JPS5753951A (en) * 1980-09-17 1982-03-31 Hitachi Ltd Assembling method of semiconductor device
JPS58188684U (en) * 1982-06-10 1983-12-15 セイコーエプソン株式会社 electronic display device
JPS59119477A (en) * 1982-12-27 1984-07-10 Omron Tateisi Electronics Co Transaction processor
JPS59159553A (en) * 1983-03-01 1984-09-10 Matsushita Electric Ind Co Ltd Film carrier
JPS59210419A (en) * 1983-05-13 1984-11-29 Seiko Epson Corp Liquid crystal display body device
JPS616832A (en) * 1984-06-20 1986-01-13 Matsushita Electric Ind Co Ltd Material to be loaded

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63128527U (en) * 1987-02-13 1988-08-23
JPH0712972Y2 (en) * 1987-02-13 1995-03-29 セイコーエプソン株式会社 Liquid crystal device
JPH0915355A (en) * 1995-07-03 1997-01-17 Toshiba Home Technol Corp Device with timer

Also Published As

Publication number Publication date
JPH0424858B2 (en) 1992-04-28

Similar Documents

Publication Publication Date Title
KR960036879A (en) Circuit board connection structure and connection method, and liquid crystal device
JPH09152621A (en) Liquid crystal display device and its production
US4842373A (en) Connecting structure for connecting a liquid crystal display and a flexible flat cable
JPS6223124A (en) Film carrier lsi
JPH11186684A (en) Heat seal connection article and heat seal connection method
JP3509573B2 (en) Flexible substrate tape material, flexible substrate manufacturing method, semiconductor device manufacturing method, and liquid crystal device manufacturing method
JP2509804B2 (en) Display device
JP3321660B2 (en) Board structure with terminal strip
JPS61231797A (en) Mounting of small electronic component
JPH03225890A (en) Printed wiring board
KR200301795Y1 (en) Alignment device for bonding TPC and PCB
JPH08293671A (en) Connection of circuit board
KR0127689Y1 (en) Electrical connecting device of mark panel
JPH0815717A (en) Liquid crystal display device
JPH02273725A (en) Connecting structure for liquid crystal display element
JPS62182790A (en) Liquid crystal display unit
JPS6097325A (en) Display device
JPH01229228A (en) Liquid crystal display device
JPS5834487A (en) Flat plate display
KR960011507A (en) Liquid Crystal Display Module and Manufacturing Method Thereof
JP2557764Y2 (en) LCD display
JPH01293592A (en) Connector
JPH11311801A (en) Liquid crystal display device
JPH06204630A (en) Apparatus on which printed board is mounted
JP2002171040A (en) Structure of electrode terminal of flexible wiring board

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term