JPS62223630A - Load cell scale - Google Patents

Abstract

PURPOSE:To decrease the number of components of a scale and to reduce the cost by setting a relation R1>R2 between the impedance R2 from a zero-point setting circuit to a signal amplifier and the impedance to the gain setting resistance R1 of a signal amplifier. CONSTITUTION:When the impedance of a variable resistance R6 is varied by DELTAR6, current impedance R2' is R5(R6+DELTAR6+R7)/(R5+R6+DELTAR6+R7) and the quantity DELTAR2 of variation in impedance is R2'-R2. The gain G of the signal amplifier 14, on the other hand, is G=1+(R1+R2)/R2 on condition that R1+R2=R4, R2-R3; when the impedance R2 varies by DELTAR2, the gain G' is G'=1+(R1+R2+DELTAR2)/R2. In this case, it is considered that a resistance R4 varies to R1+R2+DELTAR2. When the condition of R1/R2 is considered, the gain G is 1+R1/R2 and the gain of the amplifier 14 is not affected by variation in R2, so the influence of the gain of the amplifier 14 is prevented from being affected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a load cell scale that amplifies an electrical signal from a load cell via a signal amplifier to which a zero point setting voltage is applied from a zero point setting circuit.

[Prior Art] The one shown in FIG. 2 has been known as this type of load cell scale. This connects a load cell 2 to a DC power source 1, and also connects a zero point setting circuit 3 consisting of a series circuit of a resistor R5, a variable resistor R6, and a resistor R7. The load cell 2 outputs an electric signal between a and b in accordance with the load, and supplies the electric signal to the signal amplifier 4. The signal amplifier 4 includes a first operational amplifier 5 and a second operational amplifier 6, and inputs the point a voltage of the load cell 2 to the non-inverting input terminal (+) of the first operational amplifier 5, and inputs the voltage at point a of the second operational amplifier 6. The voltage at point b of the load cell 2 is input to the non-inverting input terminal (+). The first operational amplifier 5 is provided with gain setting resistors R1 and RZ, one end of the resistor R1 and one end of the resistor RZ are connected, and the connection point is the inverting input terminal (- ), and the other end of the resistor RZ is connected to the output terminal of the operational amplifier 5.

The other end of the resistor R1 is connected to the output terminal of a buffer 7 composed of an operational amplifier. The input terminal of this buffer 7 is the resistor R5 of the zero point setting circuit 3 and the variable resistor R.
It is connected to the connection point with 6.

Further, the second operational amplifier 6 has a gain setting resistor R3.
, R4 are provided, one end of the resistor R3 and one end of the resistor R4 are connected, the connection point thereof is connected to the inverting input terminal (-) of the second operational amplifier 6, and the other end of the resistor R4 is connected to the inverting input terminal (-) of the second operational amplifier 6. It is connected to the output terminal of amplifier 6. and resistance R
The other end of 3 is connected to the output terminal of the first operational amplifier 5.

The signal amplifier 4 outputs an amplified electrical signal from the output terminal of its second operational amplifier 6 and supplies it to the A/D converter 8. This A/D converter 8 converts the input electrical signal into a digital signal and outputs the digital signal.

In this circuit, when the variable resistor R6 of the zero point setting circuit 3 is variably operated, the zero point setting voltage input to each operational amplifier 5, 6 of the signal amplifier 4 changes, and as a result, the electrical signal output from the signal amplifier 4 is changed. The level of is variable.

In other words, the level of the electrical signal relative to the load changes, making it possible to set the zero point of the scale. Moreover, since there is a buffer 7 whose output impedance is approximately zero between the zero point setting circuit 3 and the signal amplifier 4, the effect that the impedance change of the zero point setting circuit 3 due to the variable operation of the variable resistor R6 has on the signal amplifier 4 is small. This prevents the gain of the signal amplifier 4 from changing.

[Problems to be Solved by the Invention] However, in this conventional device, a buffer 7 consisting of an operational amplifier is used to prevent impedance changes in the zero point setting circuit 3 from affecting the gain of the signal amplifier 4. However, there was a problem that the number of parts used increased and the cost increased.

This invention was made to solve such problems, and it is possible to prevent impedance changes in the zero point setting circuit from affecting the gain of the signal amplifier without using a buffer, and it is possible to prevent the impedance change of the zero point setting circuit from affecting the gain of the signal amplifier without using a buffer. It is an object of the present invention to provide a load cell type scale that can reduce the number and cost.

[Means for solving the problem] The present invention directly inputs an electrical signal corresponding to the load from the load cell to an operational amplifier of a signal amplifier, and also inputs the zero point setting voltage from the zero point setting circuit through a gain setting resistor. The input impedance from the zero point setting circuit to the signal amplifier is RZ, and the impedance R when viewed from the input terminal of the operational amplifier is
When the impedance of the gain setting resistor connected in series with Z is R1, it is set so that R1>Rz.

[Function] In the present invention having such a configuration, the relationship between the manual impedance RZ from the zero point setting circuit to the signal amplifier and the impedance of the gain setting resistor R1 of the signal amplifier is expressed as R1.
)Rz, the combined resistance R, +RZ seen from the input terminal of the operational amplifier is always approximately R1. Therefore, even if the input impedance RZ from the zero point setting circuit to the signal amplifier changes by ΔRZ, the effect of this on the gain is almost negligible. Can be ignored. That is, even if the zero point setting voltage output from the zero point setting circuit is varied, there is no possibility that the gain of the signal amplifier will change accordingly.

[Example code] Embodiments of the present invention will be described below with reference to the drawings.

As shown in FIG. 1, a load cell 12 is connected to a DC power source 11, and a zero point setting circuit 13 consisting of a series circuit of a resistor R5, a variable resistor Re, and a resistor R7 is also connected.

The load cell 12 sends electrical signals a and b in accordance with the load.
The electrical signal is outputted between the two terminals and is supplied to the signal amplifier 14. The signal amplifier 4 is provided with first and second operational amplifiers 15 and 16, and the point a voltage of the load cell 12 is inputted to the non-inverting input terminal (+) of the first operational amplifier 15, and the second operational amplifier 16 non-inverting input terminals (
+), the voltage at point b of the load cell 12 is manually applied. The first operational amplifier 15 includes gain setting resistors R1 and RZ.
is provided, one end of the resistor R1 is connected to one end of the resistor RZ, the connection point thereof is connected to the inverting input terminal (-) of the first operational amplifier 15, and the other end of the resistor RZ is connected to the inverting input terminal (-) of the first operational amplifier 15. It is connected to the output terminal of the operational amplifier 15. The other end of the resistor R1 is connected to a connection point between the resistor R5 and the variable resistor R6 of the zero point setting circuit 13.

Further, the second operational amplifier 16 has a gain setting resistor R.
3, R4 is provided, one end of the resistor R3 and one end of the resistor R4 are connected, the connection point thereof is connected to the inverting input terminal (-) of the second operational amplifier 16, and the resistor R4 is connected to the inverting input terminal (-) of the second operational amplifier 16.
The other end of 4 is connected to the output terminal of the operational amplifier 16. The other end of the resistor R3 is connected to the output terminal of the first operational amplifier 15.

The signal amplifier 14 outputs an amplified electrical signal from the output terminal of the second operational amplifier 16 and supplies it to the A/D converter 18 . This A/D converter 18 converts a human-powered electrical signal into a digital signal and outputs the digital signal.

The impedance Rz seen from the signal amplifier 14 to the zero point setting circuit 13, that is, Rs(Ra+R7)/(
The relationship between R5+Re +R7) and the gain setting resistor R1 is set to be R+)Rz.

In this embodiment with such a configuration, if the impedance of the variable resistor R6 is changed by ΔR6, the impedance RZ' at that time is R5 (Re+ΔRa +R7).
/ (R5+R6+ΔR6+R7). Therefore, the amount of change in impedance ΔRZ becomes RZ' - RZ.

On the other hand, the gain G of the signal amplifier 14 is R1+RZ=
R4, RZ” If R3, then G-1+(RH+Rz
) / RZ, and the gain G' when the impedance RZ changes by ΔRZ is G'm1 + (R1 + RZ + ΔR
Z)/RZ. In this case, the resistor R4 is also R4-R
It is assumed that the change is 4+Rz+ΔRZ.

Here, considering the conditions of Rs)Rz, the gain G is G =
1+Rt/RZ, and the gain of the signal amplifier 14 is not affected by changes in RZ.

Therefore, even if the variable resistor R6 of the zero point setting circuit 13 is varied for zero point setting, there is no possibility that the gain of the signal amplifier 14 will change.

In this way, it is possible to prevent the influence of the gain of the signal amplifier 14 due to the change in the impedance of the zero point setting circuit 13 without using a buffer, so that the number of parts can be reduced and costs can also be reduced.

[Effects of the Invention] As detailed above, according to the present invention, it is possible to prevent impedance changes in the zero point setting circuit from affecting the gain of the signal amplifier without using a buffer, and the number of components can be reduced. Therefore, it is possible to provide a load cell type scale that can reduce the amount of noise and reduce costs.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional example. 12...Load cell, 13...Zero point setting circuit, 1
4...Signal amplifier, 18...A/D conversion section, R1-
R4... Gain setting resistor, 15.16... Operational amplifier.

Claims (1)

[Claims] A load cell outputs an electric signal corresponding to the load, a zero point setting circuit outputs a zero point setting voltage, and the electric signal from the load cell is directly input, and the zero point setting voltage from the zero point setting circuit is used as a gain. A signal amplifier that includes an operational amplifier that is input via a setting resistor and amplifies an electrical signal by taking into account the zero point setting voltage, and an A/D converter that converts the electrical signal from the signal amplifier into a digital signal. In the load cell scale, the input impedance from the zero point setting circuit to the signal amplifier is R_Z.
A load cell type balance, characterized in that the impedance of the gain setting resistor connected in series with the impedance R_Z when viewed from the input terminal of the operational amplifier is set to be R_1, and R_1>R_Z.