JPS62219551A - Semiconductor memory - Google Patents
Semiconductor memoryInfo
- Publication number
- JPS62219551A JPS62219551A JP61063467A JP6346786A JPS62219551A JP S62219551 A JPS62219551 A JP S62219551A JP 61063467 A JP61063467 A JP 61063467A JP 6346786 A JP6346786 A JP 6346786A JP S62219551 A JPS62219551 A JP S62219551A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- groove
- diameter
- semiconductor substrate
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 239000003990 capacitor Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 239000012535 impurity Substances 0.000 abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- 230000010354 integration Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 3
- 238000009792 diffusion process Methods 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 239000004020 conductor Substances 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 230000002542 deteriorative effect Effects 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、キャパシタの蓄積能力を向上させた半導体
記憶装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor memory device in which the storage capacity of a capacitor is improved.
従来の半導体記憶装置においては、セル面積を増やさず
に電荷蓄積キャパシタ面積を増やすため、第２図（＆）
、（ｂ）に示すようにシリコンからなる半導体基板１に
２〜４ｇｍ程度の溝２を掘り、薄い絶縁膜３を形成した
後、キャパシタ電極形成のため多結晶シリコン膜等の導
体膜４をセルプレートとして形成していた。In conventional semiconductor memory devices, in order to increase the area of the charge storage capacitor without increasing the cell area, the
As shown in (b), a groove 2 of about 2 to 4 gm is dug in a semiconductor substrate 1 made of silicon, a thin insulating film 3 is formed, and a conductive film 4 such as a polycrystalline silicon film is deposited on the cell to form a capacitor electrode. It was formed as a plate.
上記のような従来の溝掘り型キャパシタを有する半導体
記憶装置では、さらに高集積化を図る場合に、キャパシ
タの平面寸法をさらに縮小する必要があるが、その場合
にはキャパシタ容量が減少してしまい、通常の溝掘り型
キャパシタではキャパシタ容量を維持することが困難に
なるという問題点があった。In a semiconductor memory device having a conventional trench-type capacitor as described above, in order to achieve higher integration, it is necessary to further reduce the planar dimensions of the capacitor, but in this case, the capacitance of the capacitor decreases. However, there is a problem in that it is difficult to maintain the capacitor capacity with a conventional grooved capacitor.
この発明は、かかる問題点を解決するためになされたも
ので、電荷蓄積能力を低下させることなく、高集積化を
図れる半導体記憶装置を得ることを目的とする。The present invention was made to solve these problems, and an object of the present invention is to provide a semiconductor memory device that can be highly integrated without reducing the charge storage ability.
この発明に係る半導体記憶装置は、溝掘り型キャパシタ
の溝を開口部の径が内部の径より小さい形状としたもの
である。In the semiconductor memory device according to the present invention, the groove of the trench type capacitor has a shape in which the diameter of the opening is smaller than the diameter of the inside.
この発明においては、半導体基板の表面における溝部領
域を広げることなく、キャパシタの表面積を増やしてキ
ャパシタ容量を大きくできる。In this invention, the capacitor capacitance can be increased by increasing the surface area of the capacitor without expanding the groove region on the surface of the semiconductor substrate.
第１図（ａ）、（ｂ）はこの発明の半導体記憶装置のセ
ルプレートの構造の一実施例を示す斜視図および断面図
である。この図において、第２図（ａ）、（ｂ）と同一
符号は同一部分を示し、５は開口部の径が内部の径より
小さい形状の溝である。FIGS. 1(a) and 1(b) are a perspective view and a sectional view showing an embodiment of the structure of a cell plate of a semiconductor memory device according to the present invention. In this figure, the same reference numerals as in FIGS. 2(a) and 2(b) indicate the same parts, and 5 is a groove whose opening diameter is smaller than the inner diameter.
次にこの発明の半導体記憶装置の製造方法について説明
する。Next, a method for manufacturing a semiconductor memory device according to the present invention will be explained.
まず、半導体基板１に開口部の径が内部の径より小さい
、例えばその底面に円錐状の突起を有する円錐状の溝５
を深さ２〜４ｇｍ程度にドライエツチングにより掘った
後、不純物拡散（図示せず）を形成する。次いで、絶縁
Ｗ３として１００〜２００λ程度の薄い酸化膜（ＳｉＯ
２）を形成した後、不純物をドープした多結晶シリコン
膜等の導体膜４をセルプレートとして形成する。First, a conical groove 5 is formed in the semiconductor substrate 1, the opening diameter of which is smaller than the inner diameter, for example, having a conical protrusion on the bottom surface.
After digging by dry etching to a depth of about 2 to 4 gm, impurity diffusion (not shown) is formed. Next, a thin oxide film (SiO
After forming 2), a conductive film 4 such as a polycrystalline silicon film doped with impurities is formed as a cell plate.
このように開口部の径が内部の径より小さい形状の溝５
を形成することにより、半導体基板１の表面において溝
部領域を広げることなく、キャパシタの表面積を増やし
てキャパシタ容量を大きくできる。In this way, the groove 5 has a shape in which the diameter of the opening is smaller than the diameter of the inside.
By forming this, the surface area of the capacitor can be increased and the capacitor capacity can be increased without expanding the groove region on the surface of the semiconductor substrate 1.
また絶縁膜３としてはシリコン酸化膜に限定されず、高
誘電率絶縁膜であればよく、半導体基板１もシリコン半
導体基板に限定されるものではない。Further, the insulating film 3 is not limited to a silicon oxide film, but may be any high dielectric constant insulating film, and the semiconductor substrate 1 is not limited to a silicon semiconductor substrate either.
この発明は以」二説明したとおり、溝掘り型キャパシタ
の溝を開口部の径が内部の径より小さい形状としたので
、半導体基板の表面における溝部領域を広げることなく
、キャパシタの表面積を増やしてキャパシタ容量を大き
くすることができ、電荷蓄積能力を低下させることなく
、高集積化が図れるという効果がある。As explained below, in this invention, the groove of the trench type capacitor is shaped so that the diameter of the opening is smaller than the diameter of the inside, so that the surface area of the capacitor can be increased without expanding the groove area on the surface of the semiconductor substrate. This has the effect that the capacitor capacity can be increased and high integration can be achieved without reducing the charge storage ability.
第１図（ａ）、（ｂ）はこの発明の半導体記憶装置のセ
ルプレートの構造の一実施例を示す斜視図および断面図
、第２図（ａ）、、（ｂ）は従来の溝掘り型キャパシタ
を有する半導体記憶装置の斜視図および断面図である。
図において、１は半導体基板、３は絶縁膜、４は導体膜
、５は溝である。
なお、各図中の同一符号は同一または相当部分を示す。
代理人 大 岩 増 雄 （ほか２名）第１図
３．１＠琢膜FIGS. 1(a) and 1(b) are perspective views and cross-sectional views showing one embodiment of the structure of a cell plate of a semiconductor memory device of the present invention, and FIGS. 2(a) and 2(b) are conventional grooved 1 is a perspective view and a cross-sectional view of a semiconductor memory device having a type capacitor. In the figure, 1 is a semiconductor substrate, 3 is an insulating film, 4 is a conductive film, and 5 is a groove. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo Oiwa (and 2 others) Figure 1 3.1 @ Takumei
Claims (2)
半導体記憶装置において、前記溝掘り型キャパシタの溝
を開口部の径が内部の径より小さい形状としたことを特
徴とする半導体記憶装置。(1) A semiconductor memory device in which a grooved capacitor is formed on a semiconductor substrate, wherein the groove of the grooved capacitor has a shape in which an opening diameter is smaller than an inner diameter.
特許請求の範囲第（１）項記載の半導体記憶装置。(2) The semiconductor memory device according to claim (1), wherein the groove has a protrusion on its bottom surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61063467A JPS62219551A (en) | 1986-03-19 | 1986-03-19 | Semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61063467A JPS62219551A (en) | 1986-03-19 | 1986-03-19 | Semiconductor memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62219551A true JPS62219551A (en) | 1987-09-26 |
Family
ID=13230070
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61063467A Pending JPS62219551A (en) | 1986-03-19 | 1986-03-19 | Semiconductor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62219551A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62113466A (en) * | 1985-11-13 | 1987-05-25 | Oki Electric Ind Co Ltd | Manufacture of semiconductor memory device |
-
1986
- 1986-03-19 JP JP61063467A patent/JPS62219551A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62113466A (en) * | 1985-11-13 | 1987-05-25 | Oki Electric Ind Co Ltd | Manufacture of semiconductor memory device |
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