JPH0748549B2 - Method for manufacturing semiconductor device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a method for manufacturing a semiconductor device, particularly a semiconductor device having a large capacitance.

[Conventional technology]

FIG. 3 is a sectional view of a memory as an example of a conventional trench capacitor.

In this device, a trench (2) is formed on a silicon substrate (1), and impurities are diffused to improve conductivity. After that, a capacitor dielectric (insulating film) (4) and a field oxide film (5) are formed, and a Poly-silicon electrode (6) is formed. This completes the Trench Capacitor. Next, an insulating film (7) is formed, a gate electrode (8) is formed thereon, and then an insulating film (7) is formed again so as to cover the electrode.
After providing the contact (9), the Al wiring (10) is attached to complete the memory cell.

[Problems to be Solved by the Invention]

Since the conventional trench structure is configured as described above, there is a problem that the trench groove has to be deeply dug in order to increase the capacitance of the capacitor, which is technically and structurally limited. .

The present invention has been made in order to solve the above problems, and an object thereof is to obtain a semiconductor device having a large capacity without digging a trench deep.

[Means for Solving the Problems]

In the method for manufacturing a semiconductor device according to the present invention, an amorphous-silicon layer is formed in a conical shape so as to raise the center of the bottom of the trench, an insulating film and an electrode are formed on the amorphous layer, and the capacitor electrode area in the trench is reduced. By increasing the number, a semiconductor device having a large capacitance can be obtained.

[Action]

In the method of manufacturing a semiconductor device according to the present invention, an amorphous silicon layer is formed so as to raise the center of the bottom of the trench, thereby increasing the electrode area in the trench and obtaining a semiconductor device having a large capacitance.

Example of Invention

An embodiment of the present invention will be described below with reference to the drawings. First
FIG. 1 shows a sectional structure of a semiconductor device according to an embodiment of the present invention, and FIG. 2 shows a change in the sectional structure according to the manufacturing flow thereof.

FIG. 2 (a) shows a trench (2) on a silicon substrate (1).
Is formed, and then the amorphous-silicon layer (3) is formed by anisotropic deposition method such as ECR plasma CVO method. After that, when etching is performed with a (HF ⁺ HMO ₃ ) solution, as shown in FIG.
The silicon layer remains. This is because the film formed by the anisotropic deposition method has a weaker adhesive force in the direction perpendicular to the plane on which the film is formed than in the parallel direction, and therefore the side wall portion is removed faster when etching. As a result, the area of the portion that becomes the electrode of the capacitor increases. After that, according to the same manufacturing flow as the conventional method, impurities are diffused to improve conductivity.

After that, a capacitor dielectric (insulating film) (4) and a field oxide film (5) are formed, and a Poly-silicon electrode (6) is formed.
To form. Further, after forming an insulating film (7) on this, forming a gate electrode (8) on it, forming an insulating film (7) again so as to cover the electrode and providing a contact (9), Al When the wiring (10) is formed, the structure shown in FIG. 1 can be obtained.

Although ECR plasma was used to form the amorphous-silicon layer (3) in the above-mentioned embodiment, any amorphous deposition can be used to form the amorphous-silicon layer.

〔The invention's effect〕

As described above, according to the present invention, an amorphous-silicon layer is formed in a conical shape so as to raise the center of the bottom of the trench, and an insulating film and an electrode are formed on the amorphous layer to form a capacitor electrode area in the trench. Since the number is increased, there is an effect that a semiconductor device having a large capacitance can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view according to the manufacturing process thereof, and FIG. 3 is a cross-sectional view of a conventional semiconductor device. (1) is a silicon substrate, (2) is a trench part, (3) is an amorphous-Si layer, (4) is a capacitor dielectric,
(5) is a field oxide film, (6) is a poly-silicon electrode, (7) is an insulating film, (8) is a gate electrode, (9) is a contact, and (10) is an Al wiring. In the drawings, the same reference numerals indicate the same or corresponding parts.

Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H01L 21/822 21/8242 27/108 H01L 21/306 G

Claims (1)

[Claims] 1. After forming a trench, an amorphous-silicon layer is formed by an anisotropic deposition method, and by etching this, a conical-shaped amorphous-silicon layer is formed and a dielectric layer is formed thereon. A method of manufacturing a semiconductor device, wherein an insulating film as a body and electrodes are further formed to increase the electrode area of the capacitor and obtain a large capacitance.