JPS62213410A - Tuner voltage supply circuit - Google Patents

Abstract

PURPOSE:To avoid mis-use by using a three stage signal as a signal switching three bands such as VHF low band, VHF high band and UHF so as to use a switching control terminal and eliminate the undefined output state. CONSTITUTION:A signal D of three states of high/low/high impedance is inputted to a control signal input terminal 8. When the signal D has a high impedance logic, a voltage at a voltage source terminal 9 is divided by resistors R11, R12 and R13, a transistor (TR) Q4 is not turned on but other TR Q1 is turned on. As a result, the reception of VHF low band bringing a characteristic switching voltage output terminal SW3 and a VHF voltage output terminal BV2 to a high level is attained. Since a TR Q4 is turned on when the signal D is at a high level, only the terminal BV2 is at a high level and the reception of the VHF high band is attained. Further, when the signal D is at a low level, since the TRs Q1, Q4 are turned off, the UHF voltage output terminals BU1, SW3 go to a high level and the reception of UHF is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a tuner operating voltage supply port for supplying an operating voltage to, for example, an electronically tuned tuner.

(Conventional technology) The radio waves used in Japan's television broadcasts are ■
] 1 frequency and UHF frequency, and the same television receiver can receive both VHF and UHF signals. On the other hand, as a tuner for selecting a preview broadcast signal, an electronic tuning tuner that can change the receiving frequency by changing the DC voltage using, for example, a varactor diode has become common. With this type of tuner, it is difficult to compensate for the entire television broadcasting frequency band by changing the reception frequency, and generally, each broadcast wave band is divided into a separate group, for example, VHF is divided into high band and low band, and tJ HF is Reception is performed by switching between the three additional frequency ranges.

FIG. 3 shows the general configuration of an electronically tuned tuner consisting of a VHF tuner and a UHF tuner. The high frequency signal of the VHFHF amplifier is input to the radio frequency (RF) amplifier RA1 via an input tuning circuit R811 including a switching diode SWI for band switching and a varactor diode VDI for input tuning. RF amplifier RA
1 output is mixed (MI
X) Input to circuit M1. The interstage tuning circuit R512 includes band switching switching diodes SW2, SW3 whose switching is controlled in the same manner as the diode SW1 of the input tuning circuit R811, and tuning varactor diodes D2 and VO2. The mixing circuit M1 is supplied with an oscillation output from a local oscillation circuit 01, and this local oscillation circuit 01 also has a switching diode SW4 and a varactor diode VD4, which are controlled in relation to each of the switching diodes and varactor diodes. . The signal from the mixing circuit M1 is led out to the tuner output terminal IFOUT via the VI[circuit V1. On the other hand, the tJHF tuner inputs the RFF signal from the U HF antenna to the RF amplifier RA2 via an input tuning circuit R321 having varactor diodes, and furthermore, the output of this amplifier RA2 is an interstage tuning circuit having varactor diodes VD6 and VO7. The signal is input to the mixing circuit M2 to which the local oscillation circuit 02 is connected via the circuit R322. Then, the output of this mixing circuit M2 is UH)-IF
It is input to the mixing circuit M1 of the VHF tuner via the circuit U1, and is further input to the tuner output terminal IF via the VIP circuit v1.
It is designed to be derived to OUT.

The tuner having the above configuration is configured to be supplied with various operating voltages by a circuit C indicated by a dotted line.

Terminal 6 of this circuit C carries the main voltage (+) 81, and the V
It supplies the power supply voltage of the mixing circuit M1 of the HF tuner. The circuit C outputs each first . Operating voltage BU, [3V] from the 2nd and 3rd output terminals 1 and 2.3.

Derive SW.

The following table shows the status of each of the voltages BV, BU, and SW mentioned above.The voltage BU in the first table is a high level (the voltage at which the UHF tuner becomes operational) when receiving the U I-I F signal, and Vl.]
: It becomes low level when receiving a signal, and operates a predetermined circuit of the UHF tuner when it is high level. Voltage B
V is at a high level (a voltage that puts the VHF tuner into operation) when receiving a VHF signal, and is at a low level when receiving a UHF signal, and when it is at a high level, a predetermined circuit of the VHF tuner is operated. Also, the third output terminal 3
The voltage SW from the VHF low band signal is, for example, a high level voltage when receiving a Vl-IF low band signal, and a low level voltage when receiving a VHF high band signal. Each switching diode SWI to SW4 of the VHF tuner is controlled by this voltage SW.

The signal @A is inputted to the base of the transistor Q1 whose emitter is connected to the ground point through the resistor R1, and the collector of the transistor Q1 is connected to the transistor Q1 through the resistor R2.
Connected to the base of 2. The transistor Q2 has a base connected to the voltage (+) from the voltage source terminal 6 via the resistor R3.
31 is applied, and a voltage from the voltage source terminal 6 is directly applied to the emitter. The transistors 1 to Q2 output voltage BV from their collectors and lead out to the second terminal 2, and are connected to the anode of the diode D1. The diode D1 connects the cathodes of the diode D2, and this connection point is connected to a ground point via a resistor R4. Further, the anode of the diode D2 is connected to the base of the transistor Q3, and is also connected to the emitter of the transistor Q3 via a resistor R5. The emitters of the transistors 1 to Q3 are connected to the voltage source terminal 6, and the collector of the transistor Q3 is connected to the first output terminal 1 to derive the voltage BLI.

Next, the signal B is connected to the bases of the common emitters 1 to Q4 through the resistor R5, and the collectors of the transistors Q1 to Q4 are connected between the voltage source terminal 7, which supplies a voltage of (±)82, and the ground point. It is connected to the intersection of resistors R6 and R7 connected in series to derive a voltage SW.

In FIG. 3, when signal A is set to high level and signal @B is set to low level, transistor Q1→ON, Q2→ON,
Q3→off, voltage BV becomes high level, voltage BU becomes low level, transistors 1 to Q4 are turned off, voltage SW becomes high level, and VHF low band can be received.

Further, when both signals r A and B are set to high level, transistor Q4 is turned on and voltage SW becomes low level, and VH
Can receive F low band. Furthermore, signal A.

When both B are set to low level, transistor Q1→off,
Q2→off, Q3→on, voltage VU becomes high level, and UHF signals can be received.

Table 2 shows the three terminals 1 to 1 for the level of the above input signal.
3 shows the relationship between the output level and the reception band. H indicates high level and L indicates low level.

Table 2 In Table 2, when signals A and B are logic high and high, this is an undefined logic state that does not correspond to any receiving state in the tuner of Fig. 3, and the number of logic states of the input signal. It can be seen that the number of tuner operations and the number of tuner operations do not match.

(Problems to be Solved by the Invention) Conventional circuits have an undefined output state based on the logic of an input signal, and have a problem of being used incorrectly. Furthermore, two terminals are required as switching control voltage input terminals for switching the receiving band, and there is a drawback that the number of pins increases when integrated.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems and provide a tuner voltage supply circuit in which each reception state of the tuner is associated with a logic input to prevent misuse.

[Structure of the Invention] (Means for Solving the Problems) Operating voltage supply means for supplying operating voltages to the VHF receiving section and the Ul-IF receiving section, respectively, and the VHF receiving section and the UIF receiving section.
A band switching voltage supply means for supplying a band switching voltage to a receiving section, a signal in a first state exhibiting either a high level or a low level, a signal in a second state exhibiting the other level, and and signal generating means for generating a signal in a third state exhibiting high impedance, and each state of the signal from this signal generating means is associated with band switching when receiving V I-I F and when receiving UHF. It is characterized by

(Function) In general, a tuner requires an operating voltage that is selectively generated by switching between VHF reception and UHF reception.

Further, when receiving VHF, a band switching voltage different from the above operating voltage is required. The signal generating means according to the present invention includes a first signal generating means exhibiting either a high level or a low level.
a signal in a state and a signal in a second state exhibiting the other level;
A third state signal exhibiting high impedance is then generated. Therefore, while this selective change in high level and low level switching is associated with UHF and VHF reception switching, it is also possible to
- When the IF signal is received, a voltage whose level changes at the end of a high or low level signal is supplied to the band switching circuit. (Embodiments) The present invention will be described below with reference to illustrated embodiments.

FIG. 1 is a circuit diagram showing an embodiment of a voltage generating circuit according to the present invention.

In Figure 1, parts that have the same functions as those in Figure 3 are given the same reference numerals, and 8 is a control signal input terminal to which a switching control signal for switching the reception band according to this embodiment is supplied. , is characterized by the fact that it is only general. This terminal 8 supplies signals to two circuit sections, one circuit section is a circuit for generating voltages BV and BU mainly using transistors Q1 to Q3, and the other circuit section is a circuit for generating voltages BV and BU mainly using transistors Q1 to Q3. is a circuit for generating voltage SW mainly using transistor Q4. Since the former circuit has the same configuration as the circuit shown in FIG. 4, its explanation will be omitted, and the latter circuit will be described.

The terminal 8 is connected to the base of the transistor Q4 via a resistor R11, and is also connected to the voltage source terminal 9 via a resistor R12. The transistor Q4 has a base connected to a ground point via a resistor R13, and
The emitter is also connected directly to ground. The collector of the transistor Q4 is connected to the intersection of the series resistors R6 and R7 and also to the third terminal 3.

Furthermore, in this embodiment, the signal @D supplied to the terminal 8 uses an integrated circuit that generates ternary logic as a logic output.

FIG. 2 shows an example of such an integrated circuit. In this figure, terminal 10 is a DISABLE terminal, and terminal 11 is a terminal (IN) for input data of this circuit. The output terminal 12 is led out from the complementary connection point a'3 of P and N channel transistors Q5, Q6. nand circuit 1
5. It is designed to be driven by a Jj-Nor circuit 16.

Table 3 is a logic table for the above integrated circuit. IN is terminal 11
The logical value of DIS is the logical value of terminal 10, and must be INP.
It is summarized in UTSIIXI. OUT is the logic value of terminal 12, and 1-IZ indicates a high impedance state.

Table 3 As can be seen from this table, by setting the signal applied to the disable terminal at a high level, the output OUT can be made into a high impedance.

This embodiment is configured as described above. In addition, voltage source terminal 9
The voltage applied to (+>83) may be the same as the power supply voltage of the integrated circuit described above.

The operation of the above configuration will be explained in terms of each logical state that the signal takes.

(1) When the signal QD is at high level, in order to make the signal high level, apply a high level signal to terminal 11 using the circuit shown in Figure 2, and apply a 1 level signal to deductus enable terminal 10. and latches the level of terminal 11 with the signal of terminal 10.

If the state of the terminal 11 is at a high level, this is equivalent to short-circuiting the resistor R12, and current flows into the base of the transistor Q4 as the third switch via the resistor R13. When transistor Q4 is turned on in this way, voltage SW becomes low level.

On the other hand, current also flows to the transistor Q1 through the resistor R12, turning on the transistor Q1. As a result, the transistor Q2 turns on and the voltage BV becomes high level, and the operating current of the transistor Q2 is changed to the diode D.
1 and flows through resistor R4. At this time, the voltage across the resistor R4 turns off the diode D2, turns off the transistors 1 to Q3, and the voltage BU becomes low level. When the voltages at the terminals 1 to 3 reach the above state, it is possible to receive, for example, VHF high band.

(2) When the signal @D is high impedance logic, the high impedance state is determined by the disaple terminal 1 from Table 3.
A high level signal is applied to output terminal 12, that is,
This means that the terminal 8 of the circuit of FIG. 1 is in an open state.

In this state, resistors R1 and R12°R1 are set so that transistors 1 to Q1 are turned on and transistors Q4 and 1 are turned off.
The value of 1, R13 is set. When the transistor Q1 is turned on, the voltage BV becomes high level, the voltage BtJ becomes low level, and the voltage SW becomes high level, as in the operation (1), thereby making it possible to receive the VHF low band.

It is not difficult to set the control means for operating the transistors Q1 and Q4, that is, the voltages of the resistors R1, R2, R11 to R13, and the terminal 9, as described above.

(3) When the signal R is at low level, when the signal R becomes low level, the transistor Q4 becomes (
Similarly to the operation 2), it is turned off and the voltage SW is at a high level. On the other hand, since transistor Q1 is turned off, transistors 1 to Q2 are also turned off. Therefore, voltage BV exhibits a low level. Furthermore, since the base current of the transistor Q3 flows through the diode D2 and the resistor R4, the voltage/voltage BU becomes high level. Therefore, it is possible to receive the U I-IF band.

In this embodiment, by changing the state of the terminal 8 to the above three states, it is possible to perform three switchings without creating an undefined state.

Table 4 summarizes the operations (1) to (3>).

Table 4 Note that in a3 of the above embodiment, the means for generating the input signal applied to the terminal 8 is not limited to a three-value logic element.

[Effects of the Invention] According to the present invention as described above, there is an effect that the reception band switching of the tuner can be easily performed with a control signal applied to one terminal.

Furthermore, since it does not have an undefined logical state, it has the advantage of preventing incorrect use.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a tuner voltage supply circuit according to the present invention, FIG. 2 is a circuit diagram showing an example of a logic element used in the above embodiment, and FIG. 3 is a circuit diagram of a conventional voltage supply circuit. A circuit diagram showing an example is required. 1...tJHF voltage output terminal, 2...VHF voltage output terminal, 3...characteristic switching voltage output terminal, 6.7.9...voltage source terminal, 8...control signal input terminal, 01 ~Q4...1~Ransistor, [)1, [)2...Diode, R1-R7, R
11-R13...Resistance. Agent Patent Attorney Noriyuki Yudo Uji
Hiro 1st figure 2nd figure

Claims (1)

[Scope of Claims] A circuit for supplying voltage to a tuner having a VHF receiving section and a UHF receiving section, the VHF receiving section including a band switching circuit, wherein the VHF receiving section and the UHF receiving section each include a first ,
an operating voltage supply means configured to supply an operating voltage through a second switch means such that when one of the first and second switch means is on, the other is off; and the VHF receiving section In order to supply band switching voltage to
band switching voltage supply means which has a third switch means and generates a high band voltage when the third switch means is on or off and generates a low band voltage when the third switch means is on or off; a signal generating means for generating a signal in a first state exhibiting either level or low level, a signal in a second state exhibiting the other level, and a signal in a third state exhibiting high impedance; and the signal generating means receives a signal from the VH, and controls the first, second, and third switch means according to the state of the signal.
When receiving F, an operating voltage is supplied to the VHF receiving section via the first switch means, and band switching is performed according to the on/off of the third switch means, and when receiving UHF, the operating voltage is supplied to the VHF receiver through the first switch means. A tuner voltage supply circuit comprising: control means for supplying an operating voltage to a UHF receiver via a tuner voltage supply circuit.