JPS62209834A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JPS62209834A JPS62209834A JP61051437A JP5143786A JPS62209834A JP S62209834 A JPS62209834 A JP S62209834A JP 61051437 A JP61051437 A JP 61051437A JP 5143786 A JP5143786 A JP 5143786A JP S62209834 A JPS62209834 A JP S62209834A
- Authority
- JP
- Japan
- Prior art keywords
- insulating plate
- plate
- metal plate
- semiconductor element
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 7
- 239000002184 metal Substances 0.000 claims abstract description 55
- 229910052751 metal Inorganic materials 0.000 claims abstract description 55
- 238000000034 method Methods 0.000 claims abstract description 18
- 239000010949 copper Substances 0.000 claims abstract description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052802 copper Inorganic materials 0.000 claims abstract description 10
- 239000000853 adhesive Substances 0.000 claims description 12
- 230000001070 adhesive effect Effects 0.000 claims description 12
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 238000001816 cooling Methods 0.000 claims description 5
- 229910010293 ceramic material Inorganic materials 0.000 claims 1
- 238000005336 cracking Methods 0.000 abstract description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 4
- 230000008602 contraction Effects 0.000 abstract description 4
- 238000010438 heat treatment Methods 0.000 description 5
- 230000035882 stress Effects 0.000 description 5
- 229910000831 Steel Inorganic materials 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000004080 punching Methods 0.000 description 3
- 239000010959 steel Substances 0.000 description 3
- 210000000988 bone and bone Anatomy 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 241000220317 Rosa Species 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000004880 explosion Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61051437A JPS62209834A (ja) | 1986-03-11 | 1986-03-11 | 半導体装置及びその製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61051437A JPS62209834A (ja) | 1986-03-11 | 1986-03-11 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62209834A true JPS62209834A (ja) | 1987-09-16 |
| JPH0476500B2 JPH0476500B2 (enrdf_load_html_response) | 1992-12-03 |
Family
ID=12886906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61051437A Granted JPS62209834A (ja) | 1986-03-11 | 1986-03-11 | 半導体装置及びその製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62209834A (enrdf_load_html_response) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002110986A (ja) * | 2000-09-28 | 2002-04-12 | Fuji Electric Co Ltd | 半導体装置 |
-
1986
- 1986-03-11 JP JP61051437A patent/JPS62209834A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002110986A (ja) * | 2000-09-28 | 2002-04-12 | Fuji Electric Co Ltd | 半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0476500B2 (enrdf_load_html_response) | 1992-12-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR900008665B1 (ko) | 반도체장치의 제조방법 | |
| US4751199A (en) | Process of forming a compliant lead frame for array-type semiconductor packages | |
| US4774635A (en) | Semiconductor package with high density I/O lead connection | |
| JP2929273B2 (ja) | ボールグリッドアレイ半導体パッケージ用ユニットｐｃｂキャリヤフレーム及びこれを用いるボールグリッドアレイ半導体パッケージの製造方法 | |
| US4865193A (en) | Tape carrier for tape automated bonding process and a method of producing the same | |
| WO1991007776A1 (en) | A method for housing a tape-bonded electronic device and the package employed | |
| US5296737A (en) | Semiconductor device with a plurality of face to face chips | |
| USRE37416E1 (en) | Method for manufacturing a modular semiconductor power device | |
| JP2002343911A (ja) | 基 板 | |
| JP2003124262A5 (enrdf_load_html_response) | ||
| JPH0418694B2 (enrdf_load_html_response) | ||
| JPS62209834A (ja) | 半導体装置及びその製造方法 | |
| EP0474224B1 (en) | Semiconductor device comprising a plurality of semiconductor chips | |
| EP0723293B1 (en) | Semiconductor device with a heat sink and method of producing the heat sink | |
| EP0146463B1 (en) | Compliant lead frame for surface mount semiconductor packages | |
| JPS61270850A (ja) | 半導体チツプ実装用パツケ−ジ | |
| KR100250145B1 (ko) | 비지에이반도체패키지와그제조방법 | |
| JPS61272956A (ja) | ハイブリツド型半導体装置 | |
| JPH0319258Y2 (enrdf_load_html_response) | ||
| JPH03238865A (ja) | 半導体素子 | |
| JP2764685B2 (ja) | 半導体装置とその製造方法 | |
| JPH05259365A (ja) | 半導体用リード部材およびこれを用いた半導体装置 | |
| JPH0744190B2 (ja) | パワ−ｉｃ装置の製造方法 | |
| JP2001024138A (ja) | 複合リードフレーム | |
| JPH03276737A (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |