JPS6220588B2 - - Google Patents

Info

Publication number
JPS6220588B2
JPS6220588B2 JP20311282A JP20311282A JPS6220588B2 JP S6220588 B2 JPS6220588 B2 JP S6220588B2 JP 20311282 A JP20311282 A JP 20311282A JP 20311282 A JP20311282 A JP 20311282A JP S6220588 B2 JPS6220588 B2 JP S6220588B2
Authority
JP
Japan
Prior art keywords
channel number
logical channel
flag
control processing
communication control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20311282A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5994129A (ja
Inventor
Tetsuo Ideguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20311282A priority Critical patent/JPS5994129A/ja
Publication of JPS5994129A publication Critical patent/JPS5994129A/ja
Publication of JPS6220588B2 publication Critical patent/JPS6220588B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP20311282A 1982-11-19 1982-11-19 論理チヤネル番号割当て方法 Granted JPS5994129A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20311282A JPS5994129A (ja) 1982-11-19 1982-11-19 論理チヤネル番号割当て方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20311282A JPS5994129A (ja) 1982-11-19 1982-11-19 論理チヤネル番号割当て方法

Publications (2)

Publication Number Publication Date
JPS5994129A JPS5994129A (ja) 1984-05-30
JPS6220588B2 true JPS6220588B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-05-07

Family

ID=16468593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20311282A Granted JPS5994129A (ja) 1982-11-19 1982-11-19 論理チヤネル番号割当て方法

Country Status (1)

Country Link
JP (1) JPS5994129A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63307565A (ja) * 1987-06-09 1988-12-15 Fujitsu Ltd チャネル処理装置

Also Published As

Publication number Publication date
JPS5994129A (ja) 1984-05-30

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