JPS62205667A - Photoelectric conversion element - Google Patents

Abstract

PURPOSE:To enhance photoelectric conversion efficiency, by preventing disappearance of carriers, which are yielded by light having short wavelengths due to recombination, and taking out the carriers, which are yielded at the deep part of a low impurity concentration layer, to the outside effectively. CONSTITUTION:In the surface of a silicon substrate 10 comprising a low impurity concentration layer (i layer), a plurality of grooves are provided at an interval of about 50mum. Charge lead-out electrodes 13 (13a, 13b) comprising Al are formed in the grooves. An n<+> diffused layer 12 is formed at the side surface and the bottom surface part of the groove, in which the electrode 13a is formed. A p<+> diffused layer 14 is formed on the side surface and the bottom surface part of the groove, in which the electrode 13b is formed. A reflection preventing film 15 comprising an SiO film is formed on the surface. Light over a short wavelength to a long wavelength is efficiently inputted into the silicon substrate 10. Yielded carriers are located within 25mum from the charge lead-out electrodes 13. Therefore, the rates of recombination and disappearance of the carriers are few. The carriers reach the electrodes 13 efficiently and are taken out as a current.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a structure of a photoelectric conversion element with high four-light conversion efficiency.

[Conventional technology]

Conventionally, as a photoelectric conversion element, one having the structure shown in FIG. 4, for example, has been put into practical use.

As shown in FIG. 4, a thin n-diffusion layer 2 is formed on the surface onto which light enters a silicon substrate 10 consisting of a low impurity concentration layer (i-layer) 1 exhibiting some n-type conductivity. Then, on this n diffusion layer 2, a grid-like electric image 3 is provided as one of the charge extraction electrodes so that light can be incident well. Also, on the back surface of the i-layer 1, a plate-shaped polarization 5 as the other charge extraction electrode is provided via a thick p+ diffusion/2i4. Note that 6 is an anti-reflection film made of SiO film, 8102 film, etc.

In this conventional photoelectric conversion element configured as J:5, α waves that can be extracted to the external circuit mainly enter layer 1 and are absorbed, corresponding to the amount of light that is absorbed by layer 1. 2 and p
The diffusion layer 4 functions to form an operating region for collecting carriers (electrons and genuine tag pairs) generated by ohmic contact with polarization and connection with a layer 1 having a different electron affinity.

[Problem that the invention seeks to solve]

However, the n-diffusion layer 2 containing a high concentration of n-type impurities such as phosphorus has the drawback of reducing photoelectric conversion efficiency, especially since electrons generated by short-wavelength light and genuine tag pairs are recombined and absorbed. . For this reason.

Attempts have been made to form the n+ diffusion layer 2 as thin as 0.5 μIn or less, but if the n+ diffusion layer 2 is thin, the resistance will be high and power loss will increase. When forming the layer 1, there is a risk that the bond with the layer 1 may be destroyed.

In addition, in order to absorb most of the light that can generate carriers within the silicon substrate, the thickness of 1ja1 must be several tens of μm, but for this purpose, epitaxial growth or long Due to the time diffusion process, i / J l and p
+ It is necessary to form a diffusion layer, which has the disadvantage of high manufacturing cost.

On the other hand, one layer with a thickness of several tens of μm? : When formed, the reach distance of the carriers generated in the deep part to the four poles becomes longer, making it difficult to efficiently extract the electrodes by 1°. Therefore, in general, a structure having an i-layer with a thickness of 1 to 20 μm is often used.

An object of the present invention is to eliminate the above-mentioned drawbacks and provide a photoelectric conversion element with high phototransformation efficiency.

[Failure to solve the problem]

In the photoelectric conversion element of the present invention, a plurality of grooves are provided in a low impurity concentration layer on the surface of a semiconductor substrate, and four electrical outlets for taking out charges are provided in the grooves.

[Effect]

The light converting element according to the present invention is a semiconductor layer consisting of a first (as shown in Fig. 1) a semiconductor layer,
Multiple grooves perpendicular to kt? : is formed, and the +1li13 for unloading is formed in this groove, so there is no need to form a high impurity/removal rate Δ on the semiconductor surface.

Therefore, the recombination of carriers generated by short wavelength light is extremely small. In addition, since multiple single poles are formed almost perpendicularly at intervals convenient for the single generated charge collection, the semiconductor substrate Even if carriers are generated in the thicker parts of the plate, the distance they can reach the electrode will not change, and the carriers can be effectively extracted.

〔Example〕

Next, embodiments of the present invention will be described using the drawings.

FIG. 1 is a sectional view of a first embodiment of the invention.

In FIG. 1, the surface of a silicon substrate 10 consisting of a low impurity concentration layer (i-layer) 11 with a thickness of about 200 to 300 μm has a plurality of grooves each having a width of about 2 μm and a depth of about 20 μm.
There are 8 grooves spaced at m intervals, and in the grooves there are A/'
Four cargo unloading electrodes 13 (13a, 13b) are formed.

And, - The mouth 1 diffusion layer 12 is formed on the side and bottom parts of the groove where the electrode 13a is formed, and the p+ diffusion layer 14 is formed on the side and bottom part of the groove where the electrode 13b is formed. There are four. That is, the n+ diffusion layer R12 and the p+ diffusion layer 14 are formed on the back side of the silicon substrate 10 alternately.
The distance between the carriers generated by light and the 'fJL pole 13 is about 25 μm at maximum.

8.15 is an antireflection film made of SiO film.

In the sixteenth embodiment of the present invention configured in this way, since no n diffusion layer is formed on the surface of the silicon substrate 10, light ranging from short wavelengths to long wavelengths efficiently enters the silicon substrate 10. Generate a carrier. However, the generated carriers are 25 μm from the charge extraction electrode 30.
Since the particles are within the same range, the rate at which they recombine and disappear is small, so they efficiently reach the electrodes and are taken out as a low flow.

Next, the outline of the manufacturing method will be explained.

In order to form grooves substantially perpendicular to the surface of the silicon substrate 100, for example, a dry etching method using a CFA-based reactive gas using a photoresist film with openings in the Ifr constant portion as a mask is suitable.

After forming the grooves, an n-type or p-type impurity is introduced into each three grooves by a diffusion method using n-type and p-type impurity gases to form an n+ diffusion j wound 12 and a p+ diffusion no 14. . At this time, a 5iOz film may be formed on the surface of the silicon substrate 10 as a surface capture pattern.

Next, AJ is deposited on the entire surface by CVD or sputtering to create a groove. : After filling, the surface AA" is removed except for the connection part, and the electrode 13? : is formed.

Finally, an 8i0 film is formed on the surface by sputtering to form an antireflection film 15, thereby completing the photoelectric conversion element.

FIG. 2 is a sectional view of a second embodiment of the invention.

The difference from FIG. 1 is that a p+ diffusion layer and an electrode are also provided on the back surface of the silicon substrate 10.

A silicon substrate 10 with a thickness of approximately 100 μm is shown in FIG.
An anti-reflection film 15 made of an 8i0 film is formed on the surface of one layer 11 of R, and two types of grooves with different depths are formed through this anti-reflection film 15 by dry etching.
formed inside.

Then, n and p+ diffusion holes 14 and n+ diffusion holes 412 are formed on the side and bottom parts of the shallow and deep grooves, respectively, and charge extraction polarization 13b and 1 made of Ai are formed in each groove.
3a is formed.

On the other hand, on the g-plane of the silicon substrate 10, p
A diffusion layer 14a is provided, and a plate-shaped charge extraction electrode 13c made of Al is formed on its surface.

In the second embodiment configured as above, '
IQ? The negative carriers generated in the deep part of the groove are drawn out to the outside of the area by the electrodes 13a and 13+ formed in the groove and the large surface area of the electrode 13a and 13+, which is formed on the back surface. The rate of annihilation is reduced, and the optical dL conversion efficiency is improved.

FIG. 3 is a cross-sectional view of the third embodiment of the present invention, and the difference from FIG. 1 is that metal is used as the 4f for unloading 4 cargoes, which is connected to the silicon layer to form a Schottky barrier. It is.

As shown in FIG. 3, on the surface of a silicon substrate 100 consisting of a single layer 11 with a thickness of about 30 μm, a plurality of grooves @2 μm and a depth of about 25 μm0) are formed by dry etching, and then in the alternate grooves. Tungsten (W) and molybdenum (
Charge extraction electrodes 16 and 17 made of MO) are formed by the CVD method.

The surface of the silicon substrate 100 is covered with an antireflection film 15 made of an 8i0 film.

8 in the third embodiment configured in this way.

The W electrode 17 contacts the first layer 11 to form a Schottky barrier. In other words, the W electrode 16 and the MO1t electrode 17 in FIG.
They are equivalent to each of them. Therefore, in this example, 8
In this case, there is an advantage that the n+ diffusion layer 12 and the p+ diffusion layer 14 are not required. still.

The metals forming the Schottky barrier are W and M.

It is possible to use other P t , AJ, etc. of .

For each of the above examples? The thicknesses of the i-layer and p+ diffusion layer 14a and the width, depth, interval, etc. of each groove are not particularly limited, and various combinations can be used. Further, in the above description, the i-layer is treated as a layer exhibiting n-type conduction, but it goes without saying that it may be a layer exhibiting some n-type conduction.

〔Effect of the invention〕

As described above in detail, according to the present invention, a plurality of grooves are formed in the low impurity concentration layer in which carriers are generated by the incidence of light, and the electrode for charge extraction 5 is formed in the grooves. This is effective because a photoelectric conversion element with high photoelectric conversion efficiency can be obtained that can prevent carriers generated by wavelength light from disappearing due to recombination and can effectively extract carriers generated deep in a low impurity concentration layer to the outside. is big.

[Brief explanation of drawings]

1 to 3 are cross-sectional views of first to third embodiments of the present invention, and FIG. 4 is a cross-sectional view of a conventional photoelectric conversion element. 1...Low impurity concentration layer, 2...0 diffusion layer, 3...Grid electrode, 4...P10 diffusion layer, Death... ... Plate electrode, 6 ... Antireflection film, 10 ... Silicon substrate. 11...Low impurity concentration layer, 12...n
+ Diffusion layer. 13 (13a, 13b, 13C) --- electrode, 14
・-・-1)" Diffusion layer, 15... Anti-reflection film, 16... W4 pole, 17... MO electrode. Agent Patent attorney Uchi Hara Sound I3 electrode !5 Anti-reflection protection 11i layer Fig. 1 Fig. 2 wt lamp Mo electric lamp Fig. 3 Fig. 4 (conventional example)

Claims (2)

[Claims] (1) A photoelectric conversion element comprising a plurality of grooves formed in a surface layer of a semiconductor substrate and a charge extraction electrode formed in the grooves. (2) The photoelectric conversion element according to claim (1), wherein the semiconductor substrate surface layer is a low impurity concentration layer.