JPS62201948U - - Google Patents
Info
- Publication number
- JPS62201948U JPS62201948U JP9005986U JP9005986U JPS62201948U JP S62201948 U JPS62201948 U JP S62201948U JP 9005986 U JP9005986 U JP 9005986U JP 9005986 U JP9005986 U JP 9005986U JP S62201948 U JPS62201948 U JP S62201948U
- Authority
- JP
- Japan
- Prior art keywords
- main wiring
- clock signal
- power supply
- integrated circuit
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 description 1
Description
第１図ａおよびｂは本考案の一実施例を示す平
面図およびＡ―Ａ′線断面図、第２図ａおよびｂ
は従来の例の平面図およびＢ―Ｂ′線断面図であ
る。
１，１１…主幹接地配線、２，１２…第一クロ
ツク信号主幹配線、３，１３…第二クロツク信号
主幹配線、４，１４…一般配線、５…半導体基板
表面。
Figures 1a and b are a plan view and a sectional view taken along line A-A' of an embodiment of the present invention, and Figures 2a and b are
1 is a plan view and a sectional view taken along the line BB' of a conventional example. DESCRIPTION OF SYMBOLS 1, 11... Main ground wiring, 2, 12... First clock signal main wiring, 3, 13... Second clock signal main wiring, 4, 14... General wiring, 5... Semiconductor substrate surface.
Claims (1)
、基準電源の主幹配線の上部に少くとも１本のク
ロツク信号の主幹配線を設け、前記クロツク信号
の主幹配線を前記基準電源の主幹配線と同一方向
に配置したことを特徴とする半導体集積回路。 In a semiconductor integrated circuit having a multilayer wiring structure, at least one clock signal main wiring is provided above the reference power supply main wiring, and the clock signal main wiring is arranged in the same direction as the reference power supply main wiring. A semiconductor integrated circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9005986U JPH0642334Y2 (en) | 1986-06-12 | 1986-06-12 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9005986U JPH0642334Y2 (en) | 1986-06-12 | 1986-06-12 | Semiconductor integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62201948U true JPS62201948U (en) | 1987-12-23 |
| JPH0642334Y2 JPH0642334Y2 (en) | 1994-11-02 |
Family
ID=30949592
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9005986U Expired - Lifetime JPH0642334Y2 (en) | 1986-06-12 | 1986-06-12 | Semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0642334Y2 (en) |
-
1986
- 1986-06-12 JP JP9005986U patent/JPH0642334Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0642334Y2 (en) | 1994-11-02 |