JPS62201559U - - Google Patents

Info

Publication number
JPS62201559U
JPS62201559U JP8855586U JP8855586U JPS62201559U JP S62201559 U JPS62201559 U JP S62201559U JP 8855586 U JP8855586 U JP 8855586U JP 8855586 U JP8855586 U JP 8855586U JP S62201559 U JPS62201559 U JP S62201559U
Authority
JP
Japan
Prior art keywords
circuit
facsimile device
processing unit
image signal
central processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8855586U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8855586U priority Critical patent/JPS62201559U/ja
Publication of JPS62201559U publication Critical patent/JPS62201559U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本考案に係るフアクシミリ装置の一
実施例を示すブロツク図、第２図は、従来のフア
クシミリ装置の構成例を示すブロツク図である。 １……ＣＣＤ、２……感熱ヘツド、３……メカ
ニカル部、４……ＮＣＵ、５……操作パネル、６
……制御部、６００……主制御部回路、６０１…
…外部入出力端子。 FIG. 1 is a block diagram showing an embodiment of a facsimile device according to the present invention, and FIG. 2 is a block diagram showing an example of the configuration of a conventional facsimile device. 1...CCD, 2...Thermal head, 3...Mechanical section, 4...NCU, 5...Operation panel, 6
...Control section, 600...Main control section circuit, 601...
...External input/output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] フアクシミリ装置の動作制御に関するプログラ
ムおよびデータが記憶された記憶装置と、該記憶
装置に記憶されたプログラムおよびデータにもと
づき動作を実行する中央処理装置とを含む多数の
機能回路を高密度集積化するとともに、該高密度
集積化された回路の内部の前記中央処理装置のバ
スと前記回路の外部の画信号バスとの間に、画信
号を高速に処理する高速画信号入出力装置を、前
記回路に対して外付けとなるように接続するため
の外部入出力端子を設けた制御部を具備すること
を特徴とするフアクシミリ装置。 High-density integration of a large number of functional circuits including a storage device storing programs and data related to operation control of a facsimile device and a central processing unit that executes operations based on the programs and data stored in the storage device , a high-speed image signal input/output device for processing image signals at high speed is provided in the circuit between the bus of the central processing unit inside the high-density integrated circuit and the image signal bus outside the circuit. What is claimed is: 1. A facsimile device comprising a control section provided with an external input/output terminal for external connection to the facsimile device.
JP8855586U 1986-06-12 1986-06-12 Pending JPS62201559U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8855586U JPS62201559U (en) 1986-06-12 1986-06-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8855586U JPS62201559U (en) 1986-06-12 1986-06-12

Publications (1)

Publication Number Publication Date
JPS62201559U true JPS62201559U (en) 1987-12-22

Family

ID=30946754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8855586U Pending JPS62201559U (en) 1986-06-12 1986-06-12

Country Status (1)

Country Link
JP (1) JPS62201559U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051059A (en) * 1983-08-30 1985-03-22 Canon Inc Picture processing method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051059A (en) * 1983-08-30 1985-03-22 Canon Inc Picture processing method

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