JPS62201532U - - Google Patents
Info
- Publication number
- JPS62201532U JPS62201532U JP8852786U JP8852786U JPS62201532U JP S62201532 U JPS62201532 U JP S62201532U JP 8852786 U JP8852786 U JP 8852786U JP 8852786 U JP8852786 U JP 8852786U JP S62201532 U JPS62201532 U JP S62201532U
- Authority
- JP
- Japan
- Prior art keywords
- flop
- flip
- input
- nand gate
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8852786U JPH0430815Y2 (de) | 1986-06-12 | 1986-06-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8852786U JPH0430815Y2 (de) | 1986-06-12 | 1986-06-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62201532U true JPS62201532U (de) | 1987-12-22 |
| JPH0430815Y2 JPH0430815Y2 (de) | 1992-07-24 |
Family
ID=30946699
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8852786U Expired JPH0430815Y2 (de) | 1986-06-12 | 1986-06-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0430815Y2 (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1995028037A1 (fr) * | 1994-04-08 | 1995-10-19 | Mars Technology Institute Co., Ltd. | Porte servant a connecter des circuits logiques numeriques |
-
1986
- 1986-06-12 JP JP8852786U patent/JPH0430815Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0430815Y2 (de) | 1992-07-24 |