JPS6219756U - - Google Patents

Info

Publication number
JPS6219756U
JPS6219756U JP11134085U JP11134085U JPS6219756U JP S6219756 U JPS6219756 U JP S6219756U JP 11134085 U JP11134085 U JP 11134085U JP 11134085 U JP11134085 U JP 11134085U JP S6219756 U JPS6219756 U JP S6219756U
Authority
JP
Japan
Prior art keywords
input
output terminal
output
circuit device
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11134085U
Other languages
English (en)
Other versions
JPH0636595Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11134085U priority Critical patent/JPH0636595Y2/ja
Publication of JPS6219756U publication Critical patent/JPS6219756U/ja
Application granted granted Critical
Publication of JPH0636595Y2 publication Critical patent/JPH0636595Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第1図は本考案のLSIの入出力保護回路の一
実施例要部平面パターン図、第2図は本考案のL
SIの配列状態の入出力保護回路の他の実施例の
要部平面パターン図、第3図は一般の入力保護回
路図、第4図は一般の入出力保護回路図、第5図
は従来の入出力保護回路の要部平面パターン図で
ある。 P……パツド、Ri……入力保護抵抗、Ro…
…出力保護抵抗、C,C,C,C……コ
ンタクト。

Claims (1)

    【実用新案登録請求の範囲】
  1. 複数の入出力端子を備えた半導体集積回路装置
    において、該入出力端子を入力端子として使用す
    る時の入力保護抵抗とこれを出力端子として使用
    する時の出力保護抵抗を一体に形成して成り、こ
    れ等一体形成された両抵抗と入出力端子とを1箇
    所のコンタクトに依つて結合したことを特徴とす
    る半導体集積回路装置。
JP11134085U 1985-07-19 1985-07-19 半導体集積回路装置 Expired - Lifetime JPH0636595Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11134085U JPH0636595Y2 (ja) 1985-07-19 1985-07-19 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11134085U JPH0636595Y2 (ja) 1985-07-19 1985-07-19 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS6219756U true JPS6219756U (ja) 1987-02-05
JPH0636595Y2 JPH0636595Y2 (ja) 1994-09-21

Family

ID=30991172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11134085U Expired - Lifetime JPH0636595Y2 (ja) 1985-07-19 1985-07-19 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPH0636595Y2 (ja)

Also Published As

Publication number Publication date
JPH0636595Y2 (ja) 1994-09-21

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