JPS62196426U - - Google Patents
Info
- Publication number
- JPS62196426U JPS62196426U JP8559686U JP8559686U JPS62196426U JP S62196426 U JPS62196426 U JP S62196426U JP 8559686 U JP8559686 U JP 8559686U JP 8559686 U JP8559686 U JP 8559686U JP S62196426 U JPS62196426 U JP S62196426U
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- alternating current
- input means
- current signal
- potential level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Logic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Description
第１図乃至第３図はこの考案の一実施例を示す
もので、第１図は回路構成図、第２図は各点での
信号波形を示す図、第３図はインバータの伝達特
性を示す図、第４図及び第５図は従来のレベルシ
フタの回路構成を示す図である。
１１，１２，１４〜１７，１９，２０，２２，
３１，３４……ＰチヤンネルＭＯＳ型ＦＥＴ、１
３，１８，２１，３２，３５……ＮチヤネルＭＯ
Ｓ型ＦＥＴ、２４，２５……アナログスイツチ、
３３……コンデンサ、３６……インバータ回路、
３７……負帰還抵抗。
Figures 1 to 3 show an embodiment of this invention. Figure 1 is a circuit diagram, Figure 2 is a diagram showing signal waveforms at each point, and Figure 3 is a diagram showing the transfer characteristics of an inverter. 4 and 5 are diagrams showing the circuit configuration of a conventional level shifter. 11, 12, 14-17, 19, 20, 22,
31, 34...P channel MOS type FET, 1
3, 18, 21, 32, 35...N channel MO
S-type FET, 24, 25...Analog switch,
33... Capacitor, 36... Inverter circuit,
37...Negative feedback resistance.
Claims (1)
入力手段と、 この入力手段による交流信号の直流成分をカツ
トするコンデンサと、 このコンデンサが直流成分をカツトした信号の
入力により、電源となる第２の任意の電位レベル
を出力するインバータと、 このインバータの出力を抵抗を介して上記イン
バータに直流帰還する帰還回路とを具備したこと
を特徴とするレベルシフタ。[Claims for Utility Model Registration] A first input means for inputting an alternating current signal of an arbitrary potential level; a capacitor for cutting off the direct current component of the alternating current signal by this input means; A level shifter comprising: an inverter that outputs a second arbitrary potential level that serves as a power source in response to an input; and a feedback circuit that feeds back the output of the inverter as DC feedback to the inverter via a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8559686U JPS62196426U (en) | 1986-06-05 | 1986-06-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8559686U JPS62196426U (en) | 1986-06-05 | 1986-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62196426U true JPS62196426U (en) | 1987-12-14 |
Family
ID=30941148
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8559686U Pending JPS62196426U (en) | 1986-06-05 | 1986-06-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62196426U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003110419A (en) * | 2001-06-26 | 2003-04-11 | Seiko Epson Corp | Level shifter and electro-optical device using the same |
| JP2008527797A (en) * | 2004-12-30 | 2008-07-24 | エージェンシー フォー サイエンス，テクノロジー アンド リサーチ | Fully integrated ultra wideband transmitter circuit and system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60105320A (en) * | 1983-11-14 | 1985-06-10 | Nippon Telegr & Teleph Corp <Ntt> | Level converting circuit |
-
1986
- 1986-06-05 JP JP8559686U patent/JPS62196426U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60105320A (en) * | 1983-11-14 | 1985-06-10 | Nippon Telegr & Teleph Corp <Ntt> | Level converting circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003110419A (en) * | 2001-06-26 | 2003-04-11 | Seiko Epson Corp | Level shifter and electro-optical device using the same |
| JP2008527797A (en) * | 2004-12-30 | 2008-07-24 | エージェンシー フォー サイエンス，テクノロジー アンド リサーチ | Fully integrated ultra wideband transmitter circuit and system |