JPS62189798A - Composition of hybrid ic - Google Patents
Composition of hybrid icInfo
- Publication number
- JPS62189798A JPS62189798A JP3146186A JP3146186A JPS62189798A JP S62189798 A JPS62189798 A JP S62189798A JP 3146186 A JP3146186 A JP 3146186A JP 3146186 A JP3146186 A JP 3146186A JP S62189798 A JPS62189798 A JP S62189798A
- Authority
- JP
- Japan
- Prior art keywords
- board
- circuit
- hybrid
- ceramic substrate
- multilayer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 16
- 239000000919 ceramic Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 7
- 239000012777 electrically insulating material Substances 0.000 claims description 6
- 230000017525 heat dissipation Effects 0.000 description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 238000007789 sealing Methods 0.000 description 5
- 239000010410 layer Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は電子回路で電力を処理する部分を有するハイブ
リッドＩＣの構成方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of configuring a hybrid IC having a portion for processing power in an electronic circuit.
従来の技術
近年、電子機器の分野において回路基板上にはＩＣ，ｊ
ｓＩ、パワートランジスタ、抵抗等の多種多量の部品が
搭載されており、しかも発熱部品と熱の影響を好まぬ部
品とが混在している。これらをいかに効果的に組み合わ
せ高密度に実装するかが大きな問題となっている。そこ
で従来例として電子回路で電力を処理する部分を有する
オーディオアンプ等のハイブリッドＩＣを説明する。第
３図は単層構造のアルミナ基板を用いたパワーモジュー
ル用１（ＩＣを＾ｌの放熱フィンに取り付けた構成の断
面図である。アルミナのセラミック基板１上にＡｇ、
Ａｇ−Ｐｄ等の導体ペーストを印刷乾燥後５００ないし
１０００℃の温度で焼成して導体Ｎ２を形成する。同様
にＲｕＯ□等の抵抗ペーストを印刷乾燥後５００ないし
１０００℃の温度で焼成し抵抗体３を形成する。パワー
トランジスタ５等のディスクリート部品を半田付けによ
り基板上に形成する。その後この回路基板の被覆保護用
の成型ケース６を装着し、熱放散の為、適切な放熱フィ
ン８を接着する。（例えばハイブリッドＩＣ技術 Ｐ２
Ｏ）発明が解決しようとする問題点
しかしながら上記の様な構成では、アルミナの回路基板
とＡＩの放熱フィンの接着、あるいは回路形成部の被覆
用ケースとアルミナの回路基板との接着が必要となり、
それに伴う製造工程の複雑化とコストアップにつながる
。Conventional technology In recent years, in the field of electronic equipment, ICs, j
A large number of various components such as SI, power transistors, and resistors are mounted, and heat-generating components and components that are not affected by heat are mixed together. A major problem is how to effectively combine these and implement them at high density. Therefore, as a conventional example, a hybrid IC such as an audio amplifier having a part that processes electric power using an electronic circuit will be described. Fig. 3 is a cross-sectional view of a configuration in which an IC for power module 1 (IC) is attached to a heat dissipation fin using a single-layer alumina substrate.
After printing and drying a conductor paste such as Ag-Pd, it is fired at a temperature of 500 to 1000°C to form a conductor N2. Similarly, a resistor paste such as RuO□ is printed and dried and then fired at a temperature of 500 to 1000° C. to form the resistor 3. Discrete components such as the power transistor 5 are formed on the substrate by soldering. Thereafter, a molded case 6 for covering and protecting the circuit board is attached, and appropriate heat dissipating fins 8 are bonded for heat dissipation. (For example, hybrid IC technology P2
O) Problems to be solved by the invention However, in the above configuration, it is necessary to bond the alumina circuit board and the AI radiation fin, or to bond the circuit forming part covering case and the alumina circuit board.
As a result, the manufacturing process becomes more complicated and costs increase.
また他の基板へ実装する場合、ＡＩの放熱フィンを取り
付けた状態での実装はアルミナ基板上に半田付けされた
リード端子で行う訳であるが、この場合リード端子の強
度が問題となる。さらに場合によっては他基板（マザー
基板）への実装は不可能となる。Furthermore, when mounting on another board, the mounting with the heat dissipation fins of the AI attached is done using lead terminals soldered onto the alumina board, but in this case, the strength of the lead terminals becomes an issue. Furthermore, in some cases, mounting on another board (mother board) becomes impossible.
本発明は上記問題点に鑑み、他基板（マザー基板）へリ
ード端子なしで直接実装できる。さらにアルミナ基板の
回路形成側に、良熱伝導性の絶縁材料で突起物をもった
形状に封止することにより、回路基板の被覆保護と放熱
板の両方の役割りを兼ねそなえたハイブリッドＩＣの構
成方法。In view of the above-mentioned problems, the present invention allows direct mounting to another board (mother board) without lead terminals. Furthermore, by sealing the circuit forming side of the alumina substrate with a highly thermally conductive insulating material in a shape with protrusions, the hybrid IC can serve both as a protection for the circuit board and as a heat sink. How to configure.
問題点を解決するための手段
上記問題点を解決するために本発明のハイブリッドＩＣ
は、多層配線のセラミック基板の垂直方向に、スルーホ
ールを複数形成し、この多層配線のセラミック基板の下
面に他基板（マザー基板）との接続用の端子導体を形成
する。さらに同基板の上面に部品を搭載し回路部を形成
後、この回路形成面の被覆保護と放熱の目的から全体あ
るいは部分的に突起物をもった形状に良熱伝導性の電気
的絶縁材料で封止する。さらに裏面に形成した接続用導
体で他基板（マザー基板）と接続するという構成を備え
たものである。Means for Solving the Problems In order to solve the above problems, the hybrid IC of the present invention
In this method, a plurality of through holes are formed in the vertical direction of a ceramic substrate of multilayer wiring, and a terminal conductor for connection with another substrate (mother board) is formed on the lower surface of the ceramic substrate of multilayer wiring. Furthermore, after mounting components on the top surface of the same board and forming a circuit section, in order to protect the circuit formation surface and to dissipate heat, the whole or part of the circuit surface is covered with a shape with protrusions and an electrically insulating material with good thermal conductivity is used. Seal. Furthermore, it has a configuration in which it is connected to another board (mother board) using a connecting conductor formed on the back surface.
作用
本発明は上記した構成によって、多層構造のセラミック
基板の下面に、スルーホールにより接続用の端子導体を
形成する。これによりリード端子なしで他基板（マザー
基板）上に実装できる。また上面の回路部品が搭載され
た部分に、全体あるいは部分的に突起物をもった形状に
良熱伝導性の電気的絶縁材料で封止することにより、回
路形成部の被覆保護と放熱フィンの役割りを同時に兼ね
そなえることができる。さらにこの構成により従来の様
に回路基板と放熱フィンあるいは回路基板と被覆保護用
ケースの接着という複雑な工程はなくなり製造工程が簡
単になり、加えてモジュール全体の絶縁性も向上する。Function: According to the present invention, a terminal conductor for connection is formed by a through hole on the lower surface of a multilayered ceramic substrate with the above-described structure. This allows mounting on another board (mother board) without lead terminals. In addition, by sealing the top surface where the circuit components are mounted with an electrically insulating material with good thermal conductivity in a shape that has protrusions in whole or in part, it is possible to protect the circuit forming part and protect the heat dissipation fins. You can fulfill both roles at the same time. Furthermore, this configuration eliminates the conventional complicated process of adhering the circuit board and heat dissipation fins or the circuit board and the protective covering case, simplifying the manufacturing process, and also improves the insulation properties of the entire module.
実施例
以下本発明の実施例のハイブリッドＩＣについて図面を
参照しながら説明する。第１図は本発明の実施例のハイ
ブリッドＩＣの断面図である。１は多層配線用のアルミ
ナのセラミック基板、９はスルーホール、２は内層導体
、２′は外層導体、１０は他基板（マザー基板）に接続
する為の端子導体で、スルーホールにより裏面に導通し
ている。Embodiments Hereinafter, hybrid ICs according to embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a hybrid IC according to an embodiment of the present invention. 1 is an alumina ceramic substrate for multilayer wiring, 9 is a through hole, 2 is an inner layer conductor, 2' is an outer layer conductor, 10 is a terminal conductor for connecting to another board (mother board), and the through hole provides continuity to the back side. are doing.
１１は良熱伝導性の絶縁材料で回路形成部の被覆保護と
放熱フィンの役目を兼ねそなえたもので、良熱伝導性の
絶縁材料からなった突起形状の封止体である。Reference numeral 11 is a protrusion-shaped sealing body made of an insulating material with good thermal conductivity, which serves both to cover and protect the circuit forming part and as a heat dissipation fin.
以上の様に本実施例によればセラミック基板の下面に、
他基板（マザー基板）との接続用の端子導体をスルーホ
ールにより形成することにより、リード端子なしで直接
実装できる。また上面の回路部品が搭載された部分に、
全体あるいは部分的に突起物をもった形状に良熱伝導性
の電気的絶縁材料で封止することにより、回路形成部の
被覆保護と放熱フィンの役割りを同時に兼ねそなえるこ
とができる。さらにこの構成により従来の様に回路基板
と放熱フィンあるいは回路基板と被覆保護用ケースの接
着という複雑な工程はなくなり製造工程が簡単になり、
加えてモジュール全体の絶縁性も向上する。As described above, according to this embodiment, on the bottom surface of the ceramic substrate,
By forming terminal conductors for connection with another board (mother board) through holes, direct mounting is possible without lead terminals. In addition, the part on the top where the circuit components are mounted,
By sealing the whole or part of the shape with protrusions with an electrically insulating material having good thermal conductivity, it can simultaneously serve as covering protection for the circuit forming part and as a heat dissipation fin. Furthermore, this configuration eliminates the conventional complicated process of adhering the circuit board and heat dissipation fins or the circuit board and the protective cover case, simplifying the manufacturing process.
In addition, the insulation of the entire module is improved.
発明の効果
以上の様に本発明は、多層配線のセラミック基板の垂直
方向に、スルーホールを複数形成し、この多層配線のセ
ラミック基板の下面に他基板（マザー基板）との接続用
の端子導体を形成する。さらに同基板の上面に部品を搭
載し回路部を形成後、この回路形成面の被覆保護と放熱
の目的から全体あるいは部分的に突起物をもった形状に
良熱伝導性の電気的絶縁材料で封止する。尚裏面に形成
した接続用導体で他基板（マザー基板）とを接続する構
成を備えたものである。これによりリード端子なしで他
基板（マザー基板）上に実装できる。Effects of the Invention As described above, the present invention forms a plurality of through holes in the vertical direction of a ceramic substrate for multilayer wiring, and provides terminal conductors for connection with another substrate (mother board) on the bottom surface of the ceramic substrate for multilayer wiring. form. Furthermore, after mounting components on the top surface of the same board and forming a circuit section, in order to protect the circuit formation surface and to dissipate heat, the whole or part of the circuit surface is covered with a shape with protrusions and an electrically insulating material with good thermal conductivity is used. Seal. Note that this device is configured to connect to another board (mother board) using a connecting conductor formed on the back surface. This allows mounting on another board (mother board) without lead terminals.
また上面の回路部品が搭載された部分に、全体あるいは
部分的に突起物をもった形状に良熱伝導性の電気的絶縁
材料で封止することにより、回路形成部の被覆保護と放
熱フィンの役割りを同時に兼ねそなえることができる。In addition, by sealing the top surface where the circuit components are mounted with an electrically insulating material with good thermal conductivity in a shape that has protrusions in whole or in part, it is possible to protect the circuit forming part and protect the heat dissipation fins. You can fulfill both roles at the same time.
さらにこの構成により従来の様に回路基板と放熱フィン
、あるいは回路基板と被覆保護用ケースの接着という複
雑な工程はなくなり製造工程が簡単になり、加えてモジ
ュール全体の絶縁性も向上する。Furthermore, this configuration eliminates the conventional complicated process of bonding the circuit board and the heat dissipation fins or the circuit board and the protective cover case, simplifying the manufacturing process, and also improves the insulation properties of the entire module.
第１図は本発明の実施例における断面図、第２図は本発
明のモジュールを他基板に実装した場合の断面図、第３
図は従来例の断面図である。
１・・・・・・セラミック基板、２・・・・・・内Ｎ導
体、２′・・・・・・外層導体、３・・・・・・抵抗体
、４・・・・・・半田、５・・・・・・パワートランジ
スタ、６・・・・・・保護ケース、７゜７′・・・・・
・接着剤、８・・・・・・放熱フィン、９・・・・・・
スルーホール、１０・・・・・・接続導体、１１・・・
・・・良熱伝導性絶縁材料、１２・・・・・・絶縁層、
１３・・・・・・マザー基板。
代理人の氏名 弁理士 中尾敏男 ほか１名１！！３Ｉ
！！Fig. 1 is a cross-sectional view of an embodiment of the present invention, Fig. 2 is a cross-sectional view of the module of the present invention mounted on another board, and Fig. 3 is a cross-sectional view of an embodiment of the present invention.
The figure is a sectional view of a conventional example. 1...Ceramic board, 2...Inner N conductor, 2'...Outer layer conductor, 3...Resistor, 4...Solder , 5...Power transistor, 6...Protective case, 7゜7'...
・Adhesive, 8...Radiation fin, 9...
Through hole, 10... Connection conductor, 11...
...Good thermal conductivity insulating material, 12...Insulating layer,
13...Mother board. Name of agent: Patent attorney Toshio Nakao and 1 other person 1! ! 3I
! !
Claims (1)
ルを複数形成し、この多層配線のセラミック基板の下面
に他基板との接続用の端子導体を形成し、同基板の上面
に部品を搭載し回路部を形成後、この回路形成面の被覆
保護と放熱の目的から全体あるいは部分的に突起物をも
った形状に良熱伝導性の電気的絶縁材料で封止し、裏面
に形成した前記接続用の端子導体で他基板と接続するこ
とを特徴とするハイブリッドＩＣの構成方法。A plurality of through holes are formed perpendicularly through the ceramic substrate for multilayer wiring, terminal conductors for connection with other substrates are formed on the bottom surface of the ceramic substrate for multilayer wiring, and components are mounted on the top surface of the same substrate to form the circuit section. After forming, for the purpose of covering the circuit forming surface and dissipating heat, it is sealed with an electrically insulating material having good thermal conductivity in a shape that has projections in whole or in part, and the connection layer formed on the back side is A method for configuring a hybrid IC characterized by connecting it to another board using a terminal conductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3146186A JPS62189798A (en) | 1986-02-14 | 1986-02-14 | Composition of hybrid ic |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3146186A JPS62189798A (en) | 1986-02-14 | 1986-02-14 | Composition of hybrid ic |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62189798A true JPS62189798A (en) | 1987-08-19 |
Family
ID=12331901
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3146186A Pending JPS62189798A (en) | 1986-02-14 | 1986-02-14 | Composition of hybrid ic |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62189798A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03204997A (en) * | 1989-12-29 | 1991-09-06 | Hitachi Ltd | Multilayer printed board cooling system |
| US7229334B2 (en) | 2002-06-10 | 2007-06-12 | Akiko Ishikawa | Toy house assembly |
| JP2017199752A (en) * | 2016-04-26 | 2017-11-02 | ローム株式会社 | Power module and method for manufacturing the same |
-
1986
- 1986-02-14 JP JP3146186A patent/JPS62189798A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03204997A (en) * | 1989-12-29 | 1991-09-06 | Hitachi Ltd | Multilayer printed board cooling system |
| US7229334B2 (en) | 2002-06-10 | 2007-06-12 | Akiko Ishikawa | Toy house assembly |
| JP2017199752A (en) * | 2016-04-26 | 2017-11-02 | ローム株式会社 | Power module and method for manufacturing the same |
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