JPS6218728A - Manufacture of dielectric isolation substrate - Google Patents

Abstract

PURPOSE:To provide a sufficient withstand voltage in a high voltage circuit and to perform the function of a buried layer in a low voltage circuit by forming single crystal islands having different depths by a dielectric film. CONSTITUTION:An Si oxide film 2 and an Si nitride film 3 are formed on an N-type Si single crystal substrate 1, the number of low voltage circuits to be formed in future are selectively opened, and an N-type high density buried layer 4 is formed. Then, a mask made of an Si oxide film 5 is formed in the hole. Then, the films 2, 3 are removed, and an N-type single crystal layer 6 is epitaxially grown. Then, the portion of the layer 6 is selectively masked, and the substrate 1 is anisotropically etched. At this time, it is etched until the mask 5 is exposed, and thick and shallow single crystal islands 11, 12 are formed. Then, an N-type buried layer 13 and an Si oxide film 14 are formed. A polycrystalline Si layer 15 is accumulated on the substrate 1, and ground to a BB line partly exposed at the layer 15 on the back surface of the substrate 1. Thus, the islands 11, 12 having different depths insulator-separated by the film 14 are obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a dielectric isolation substrate, and in particular to a method for manufacturing a dielectric isolation substrate, in particular, a dielectric substrate supported on polycrystalline silicon with single crystal islands having different depths arranged in a mixed manner. The present invention relates to a method for manufacturing a separation substrate.

[Conventional technology]

Conventionally, a dielectric isolation substrate having a plurality of single crystal islands supported by polycrystalline silicon and insulated from each other has been used in semiconductor integrated circuits. It is formed by the method shown in (d).

That is, first, as shown in FIG.
) N-type silicon single crystal substrate 21 with silicon oxide film 22
The single-crystal islands 23 are selectively masked and anisotropic etching is performed using an alkaline solution.

Next, after removing the mask, N-type impurities are ion-implanted to form a single-crystal island buried layer 24 with a high impurity concentration, as shown in FIG. 0μ
A silicon oxide film 25 having a thickness of about m is formed as an insulating isolation film.

Subsequently, as shown in FIG. 4C, a polycrystalline silicon layer 26 for a support is grown and deposited by epitaxial growth.

Then, after grinding the polycrystalline silicon layer 26 to the AA line, the silicon single crystal substrate 21 is ground to the BB line so that the single crystal islands 24 are separated by the silicon oxide film 25 using this ground surface as a reference. By doing so, the same figure (d)
A dielectric isolation substrate 20 shown in can be obtained.

[Problem that the invention seeks to solve]

Dielectric isolation substrate 20 formed by the conventional manufacturing method described above
Since the formed single crystal islands 23 are all at the same depth, when a high voltage circuit or a low voltage circuit is integrally formed on this substrate 20, the withstand voltage in the high voltage circuit can be satisfied. The depth of the single crystal island 23 is set as follows.

For this reason, when a low voltage circuit is constructed in the single crystal island 23 having the same depth, the depth of the single crystal island becomes larger than necessary, and the distance to the buried layer 24 also becomes large. As a result, the buried layer 24 no longer performs its function sufficiently, causing a problem of deterioration of the element characteristics of the low voltage circuit, particularly the collector resistance.

[Means for solving problems]

The method for manufacturing a dielectric isolation substrate of the present invention involves selectively introducing impurities into a single crystal silicon substrate in order to obtain a substrate structure in which the depths of each single crystal island of a high voltage circuit and a low voltage circuit are different. , and with this impurity introduction part masked, a small amount (
Both include a step of performing epitaxial growth to form a silicon single crystal layer on the substrate, and a step of selectively anisotropically etching the epitaxial growth layer formed on the substrate beyond the area where the mask is exposed to increase the thickness. A step of forming different single crystal islands, a step of sequentially depositing a dielectric film and polycrystalline silicon on the substrate on which these single crystal islands have been formed, and a step of grinding the substrate from the back side to remove the dielectric film, respectively. forming single-crystal islands with different depths separated by

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(f) are cross-sectional views showing an embodiment of the method of the present invention in the order of manufacturing steps.

First, as shown in FIG. selectively opening a portion to be formed, and introducing an N-type impurity such as phosphorus or arsenic into the substrate 1 at a high concentration through this opening,
An N-type high concentration buried N4 is formed. This buried layer 4 is pressed in by heat treatment in a post-process, and is finally made to have a thickness of about 10 μm.

Next, as shown in FIG. 2B, the surface of the substrate 1 is selectively oxidized to form a mask made of silicon oxide film 5 only in the openings. After removing the silicon oxide film 2 and silicon nitride film 3 described above, epitaxial growth is performed by doping N-type impurities at the same concentration as the substrate 1. This epitaxial growth is made to have a thickness of about several tens of micrometers, which is necessary for high voltage circuits, so that the parts other than the mask 5 are covered with N.
A type silicon single crystal layer 6 is grown, a polycrystalline silicon layer 8 is grown on the mask 5, and a single crystal layer 7 with many crystal defects called a transition region is grown between these layers.

Note that due to the difference in growth rate, the polycrystalline silicon layer 8 is formed to be slightly thicker than the single crystal layer 6, but the thickness can be corrected to a uniform thickness as shown in the figure by performing a grinding process later.

Next, after selectively masking the portions on the substrate 1 where the high voltage circuit is to be constructed, that is, on the single crystal layer 6 with a silicon oxide film 9, etc., the substrate 1 is anisotropically etched with an alkaline solution. As a result, a sufficiently deep V-shaped groove 10 is formed as shown in FIG. 2C, and single crystal islands 11 and 12 are defined by this groove. At this time, etching is performed on the mask 5 until the mask 5 is exposed, and thereafter the etching process is stopped. This results in
It is divided into a thick single crystal island 11 outside the mask 5 and a thinner single crystal island 12 under the mask 5.

Thereafter, as shown in FIG. 3(d), an N-type impurity such as arsenic is ion-implanted into the entire surface to form an N-type buried layer 13, and a silicon oxide film 14 as a dielectric isolation film is further formed on the surface of the substrate 1. is formed to have a thickness of 1.0 to 3.0 μm. And the same figure (e
), a polycrystalline silicon layer 15 is deposited as a support on the substrate 1 by an epitaxial growth method, and after grinding from the surface to the line AA shown in the figure, the back surface of the substrate 1 is polished using this surface as a reference. Grinding is performed to the line BB shown in the figure where a part of the crystalline silicon layer 15 is exposed.

As a result, as shown in FIG.
Using this as a support, it is possible to obtain single crystal islands 11 and 12 having different depths, which are insulated and separated from each other by the dielectric isolation film 14.

According to the dielectric isolation substrate formed in this manner, the single crystal islands 11 are configured to be sufficiently deep, so that the high voltage circuit can have sufficient withstand voltage.

In addition, since the single crystal island 12 is formed shallowly and has a thick buried N4 layer with a high concentration, when a low voltage circuit is constructed, the function of the buried layer 4 can be fully demonstrated, and the device characteristics In particular, it is possible to prevent deterioration of the collector resistance of bipolar transistors.

Here, in the above embodiment, the dielectric isolation substrate is constructed using an N-type silicon single crystal substrate, but it is also possible to use a P-type silicon single crystal substrate, and the surface orientation may also be other than those described above. can also be adopted. Of course, it is also possible to configure an element other than bipolar.

〔Effect of the invention〕

As explained above, the present invention selectively introduces impurities into a single-crystal silicon substrate, performs epitaxial growth to form at least a silicon single-crystal layer on the substrate with the impurity-introduced portion in parentheses masked, and The epitaxial layer on the substrate is anisotropically etched beyond the mask exposed above to form single crystal islands having different heights, and a dielectric film and polycrystalline silicon are sequentially deposited on the substrate. Since the substrate is ground to form single-crystal islands with different depths separated by the dielectric film, the high-voltage circuit configured in the deep single-crystal islands can have sufficient withstand voltage, while the low-voltage This has the effect of fully demonstrating the function of the buried layer of the shallow single-crystal island that constitutes the circuit, and improving the device characteristics.

[Brief explanation of the drawing]

FIGS. 1(a) to (f) are cross-sectional views showing the manufacturing method of the present invention in order of steps, and FIGS. 2(a) to (d) are cross-sectional views showing the conventional method in order of steps. DESCRIPTION OF SYMBOLS 1...Silicon single crystal substrate, 2...Silicon oxide film, 3...Silicon nitride film, 4...High concentration buried layer, 5
... silicon oxide film (mask), 6 ... single crystal silicon layer 7 ... transition region, 8 ... polycrystalline silicon layer,
9... Mass (dielectric isolation film), 15... Polycrystalline silicon layer, 21... Silicon single crystal substrate, 22... Silicon oxide film, 23... Single crystal island, 24... Buried layer, 25... silicon oxide film, 26... polycrystalline silicon layer. Figure 1 (d) Figure 1 (e) Figure 1 (f) ]5 Figure 2 (a)

Claims (1)

[Claims] 1. Selectively introducing impurities into a single-crystal silicon substrate, and forming a silicon single-crystal layer on at least a portion of the substrate other than the mask while masking the impurity-introduced portion. a step of performing epitaxial growth on the substrate; a step of selectively anisotropically etching the epitaxial growth layer formed on the substrate beyond the exposure of the mask to form single crystal islands having different thickness; A step of sequentially depositing a dielectric film and polycrystalline silicon on the substrate on which crystal islands have been formed, and grinding the substrate from the back side to form single crystal islands of different depths separated by the dielectric film, respectively. A method for manufacturing a dielectric isolation substrate, comprising the steps of: 2. The method of manufacturing a dielectric isolation substrate according to claim 1, wherein the single crystal islands formed under the mask are made thin, and the single crystal islands formed at other locations are made thick.