JPS62186663A - Halftone digital picture processor - Google Patents

Abstract

PURPOSE:To attain the picture with high quality by discriminating an edge region and a non-edge region automatically and applying a halftone processing suitable for respective regions. CONSTITUTION:Whether or not edge information is included in an input data is discriminated and the content of gradation processing is switched automatically depending on the result. The 1st gradation processing means 156 applies edge emphasis processing to an input data in the unit of picture elements, binary-codes the result by the dither method, and the 2nd gradation processing means 153 binary-codes the data by a processing having a comparatively small gradation error such as the sub matrix method. In case the edge information is included in the input data, the 1st gradation processing means 156 is selected and in case no edge information is included, the 2nd gradation processing means 153 is selected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to a halftone digital image processing device, and in particular to a halftone digital image processing device that expresses halftones using an area gradation method.
Related to improving the resolution of information such as line drawings.

[Prior Art] When recording an image using the dot matrix method, a normal recording device can adjust the density level of each dot in only four levels at most. However, for example, digital color copying machines generally require 64 levels of gradation expression for each basic recording color such as yellow (Y), magenta (M), cyan (C), and black (BK). .

When performing such multi-tone expression, conventionally, a relatively large driver made up of multiple dots (e.g. 8x8) has been used.
- area is the unit area for gradation processing, and each driver (- for each area, the number of recording dots and the number of non-recording dots 1- is:rI4'!l
represents the density level of each gradation processing area. This type of halftone expression method is called area gradation method.

However, if we use, for example, an 8 x 8 dot area as the unit of gradation processing, it will be 1/1
The recording resolution decreases to 8. For example, in an image such as a photograph, even if the resolution is low, if the intermediate tone, that is, the density of each pixel is accurately expressed, the recording quality will be highly evaluated. However, in the case of line drawings and characters, a decrease in resolution immediately leads to a decrease in recording quality.

Generally, for images containing line drawings or text, 1
In many cases, gradation expression is not necessary. Therefore, it has been proposed to switch the image information processing to either binary processing or gradation processing depending on the content of the image being handled. However, for example, when handling multicolor images, each pixel information of characters and line drawings must be treated as halftone data in order to reproduce each color. Furthermore, even in black/white recording, there are cases where it is desired to express characters and line drawings in intermediate tones such as gray.

[Object of the Invention] The first object of the present invention is to improve the quality of an image when expressing gradation using the area gradation method, and to improve the quality of an image when expressing gradation using the area gradation method. The second purpose is to perform adjustment processing.

[Jl! Bright Configuration] In order to achieve the above object, the present invention includes a plurality of gradation processing means having mutually different processing contents, and
It is determined whether or not the input data includes edge information, and the content of gradation processing is automatically switched according to the result.

Specifically, the first gradation processing means performs edge enhancement processing on the input data in pixel units and then binarizes it using a dither method, etc., and the second gradation processing means performs a comparative gradation processing such as a submatrix method. Binarize input data using processing with small adjustment errors. When the input data includes edge information, the first gradation processing means is selected, and when the input data does not include edge information, the second gradation processing means is selected. Therefore.

Information containing edges such as line drawings of two characters in the input image is processed by the first gradation processing means, resulting in high resolution, while information not containing edges is processed by the second gradation processing means, resulting in high resolution. Gradation is obtained, resulting in favorable image quality in both cases.

By the way, for a general image, the presence or absence of edge information can be determined by extracting edge information from input information using, for example, a Laplacian-type 3×3 filter and determining the extraction result in a binary manner.

However, in the case of image data obtained by reading a halftone-processed image, the above processing is likely to cause erroneous determination.

In general printed matter that has been subjected to halftone dot processing, the halftone dot pitch is 1.
The sampling pitch of the image reading scanner used in the image processing apparatus is about 300 to 400 dpi (dots per inch). Therefore, the positional relationship between the halftone dots and each sampled pixel data in this case is, for example, as shown in FIG. 15a (edge information is not included).

In addition, in FIG. 15a, PSl is the sampling pitch,
Pd is the halftone dot pitch. When the data obtained from Fig. 15a is passed through a 3X3 filter for edge extraction, for example, in the nine pixels in the area ARI of Fig. 15a, the center pixel of interest has a density close to the highest density, and the other peripheral pixels have a density close to the maximum density. Since the density is less than half of the maximum density, edge information is extracted even though the original image does not contain edge information.

When this type of misjudgment occurs, edge enhancement is performed even on images that do not contain edge information, and noise components with high spatial frequencies are emphasized and appear throughout the output image, resulting in a decrease in image quality. .

The above misjudgments occur due to the relationship between the size of the edge extraction filter and the sampling pitch of the image data, and can be eliminated by increasing the number of elements in the edge extraction filter and selecting parameters appropriately. It is. However, a filter with a large number of f3 children has a very complicated configuration and is expensive.

Therefore, in one aspect of the present invention, the temperature is determined by using a plurality of pixels (for example, 2×2
) is provided. In this way, even if the edge extraction filter has a size of 3×3, an erroneous determination such as 5J2δ will not occur.

Fig. 151) shows the data shown in Fig. 15a divided into four pixels (blocks) adjacent to each other in the main scanning direction and the sub-scanning direction. Therefore, the pixel block pitch PS2 is twice r-+si.

Here, when each pixel block is associated with each element of the edge extraction filter, the nine pixel blocks that the one-core filter focuses on become one, for example, an area indicated by AR2. In this case, edge information is not extracted because a large number of halftone dots are distributed approximately evenly within each element of the filter. Therefore, no erroneous judgment occurs.

Next, the specific contents of the gradation processing will be explained. Gradation expression using the area scale method can be roughly divided into three types: density pattern method, dither method, and submatrix method.

; In the density pattern method, a predetermined processing area (e.g. 8x8
The average density is calculated for each pixel (pixel), and the result is compared with each point in a threshold table in which thresholds are determined in advance for each pixel in the processing area. Binary data is generated for each pixel.

In the dither method, the input data of each pixel is directly compared pairwise with the data at the corresponding position in the threshold table, and binary data of "1" or "0" is generated based on the result.

In the submatrix method, a predetermined processing area (
That is, the average density of the input data is determined for each submatrix (e.g., 2×2 pixels), and the average density is compared with each threshold value of the four pixel positions corresponding to that submatrix.
Based on the result, binary data of "1" or "0" is generated for each pixel.

The threshold value is generally 0.1, 2, 3, . . . for an 8x8 matrix table. 64 types of threshold values 62 and 63 are arranged at 64 pixel positions, but the arrangement order of the threshold values, that is, the pattern type, can be roughly divided into dot concentrated patterns and dot dispersed patterns. There will be two types.

The pattern shown in FIG. LOc is representative of the dot dispersion type pattern, which is called the Bayer (AvER) type.

The pattern shown in FIG. 10e is representative of a concentrated dot pattern and is generally called a spiral pattern.An example will be given and explained below. The m 10 a diagram is
A certain original image corresponding to an 8×8 pixel area is shown.

In this, the hatched portion has a density of 44, and the other portions have a density of 14. In other words, it shows a portion where the density changes rapidly with the diagonal edge as the boundary. Figure 1 Ob shows density data for each pixel read from the image in Figure 10 a.

Fig. 10d shows the result of processing the density data in Fig. 10b by the dither method using the dot dispersion type pattern shown in Fig. 10c, and Fig. 10f shows the result of processing the density data in Fig. 10b using the dither method.
10g shows the result of processing using the dot concentration pattern of FIG. 10c using the density pattern method. The hatched pixels are data rl
” (recorded pixels), other pixels are data “0”
(non-recorded pixels).

Furthermore, Fig. 10h shows data obtained by averaging the data shown in Fig. 10b for each submatrix of 2 x 2 pixel size, and Fig. 10i and Fig. 10j respectively show data obtained by averaging the data shown in Fig. 10h in Fig. 10c. 10e shows the result of binarization using the threshold matrix shown in FIG. 10e, that is, the result of processing by the submatrix method.

Comparing the results of each process, the average density, that is, the gradation, is 31.5 for the input data (Figure 10b);
Figure 10d is 33, Figure 10f is 32, Figure 10g is 3
1, it can be seen that the dot concentrated pattern is superior to the dot dispersed pattern as a threshold array pattern. In the case of the submatrix method (FIGS. 1O1 and 1Oj), both threshold array patterns are good.

Next, paying attention to the arrangement state of I"11 and rcN in the 8X871-RIX, it can be seen that the distribution of rlJ and "0" is biased with the edge of the original data as the boundary in Figures 10d and 10i. . In other words, information other than the density in the 8×8 matrix, ie, information about neighboring countries of the original data, is reflected in the output data.

However, in Figures 10f, 10g, and 10j, rlJ is distributed in the center according to the threshold array shape of the threshold table, and almost no information about neighboring countries in the original data is included in the output data. It turns out that it's not cursed. In other words, it can be seen that the dot-dispersed pattern is superior to the dot-concentrated pattern in terms of resolution.

Therefore, by using multiple types of patterns, such as using a dot-dispersed pattern for images where resolution is important and a dot-concentrated pattern for images where gradation is important, It is possible to meet the requirements for both resolution and gradation. For images where resolution is important,
For example, since edge information as shown in FIG. 10a is included, by switching the pattern type depending on the presence or absence of image edges, it is possible to automatically select a preferred pattern type.

As mentioned above, even when using a dot-distributed pattern, the gradation difference between the original data and the output data is not so large.1For example, even if character information is input as a halftone, the gradation will change significantly. There's nothing to do. In other words,
For example, even when character information is in multiple colors, the colors can be accurately recorded, and the resolution is high, so it is easy to identify the recorded characters.

In identifying characters and line drawings, the edge areas of the information play an important role. In other words, if the loss of information in the edge area is prevented, the resolution can be substantially improved. For example, for the image shown in FIG. 10a, first . As shown in figure la, ``1'' and ``0'' are placed in the pixels at both ends of the edge area, and 19 ``1'' are placed below the edge for the remaining pixel positions. 5 rl on top
'', the average density of the entire image becomes 32, which is equal to the original data, and the average density of each area at both ends of the edge also becomes close to the original data.

Edge regions can be extracted by spatial filters.

For example, suppose a local area of 3×3 pixels adjacent to each other, and each pixel position [A, B, C, D, E, F.

The weighting of G, H, and I as shown in each pattern in FIG. 12, and the weighting of each density data corresponding to these nine pixels and outputting the sum of the data, are equivalent to the function of a filter. The characteristics of this type of spatial filter are determined depending on the weighting of each pixel. Filter pattern FA shown in FIG.

FB, PC, FD and PE function as edge extraction filters, and other patterns PF, PG and PH.

PI and PJ function as edge enhancement filters.

FIG. 11b shows the data shown in FIG. 10h as a pattern FD.
FIG. 11d shows the results of processing the data shown in FIG. 10b using the edge enhancement filter of pattern PI.

However, in order to process the data at the edge of the 8×8 pixels in FIG. 10b, the results are obtained assuming that the density outside the data at the edge is the same as the data at the edge. In FIG. 11d, negative processing results are replaced with 0, and processing results of 64 or more are replaced with 63.

In Figure 1ie, the data in Figure 11b is combined with a fixed threshold value 32.
Shows the results of binarization. Referring to FIG. 11c, it can be seen that edge information of one image is extracted. however,
Since the average density (the number of hatched pixels) in FIG. 1E is 9, it is far from the original data of 32, and as it is, it cannot be used in terms of gradation.

Therefore, the results of dither processing using the threshold table of the dot distributed pattern (Fig. 10d) and [Fig.
When the logical sum is calculated with the result in figure c, the result is as shown in figure 11g. In other words, by combining the edge information and the result of dither processing, the error in the average gradation is improved and the edge information is reliably reflected in the processing result.

Figure 1ie shows the data obtained by dithering the data in Figures 1+ and d using the threshold table (dot distributed pattern) in Figure 10c and converting it into a binary value.
The data in figure d is the 10th +! The data is dithered and binarized using the threshold table (dot concentration pattern) shown in the figure. Referring to Figures 11e and 11f, 888
It can be seen that the information on the concentration distribution of the original data (Figure IOB) is relatively largely reflected in the distribution of "1" and rOJ in the matrix. In other words, by edge enhancement processing.

The resolution in the unit gradation processing area (8×8 pixels M) is improved. However, when comparing the average density, that is, the gradation, the first
Since the ie figure is 32 and the figure 11f is 25, it is preferable to adopt a dot distributed pattern as the threshold table.

FIG. 11h shows a pattern in which the matrix size of the threshold table is different from that described above. In this,
The size of the table is 4×4, and 16 types of threshold values are arranged in a dot-distributed pattern in each of 16 pixel areas. Note that in the first Lh diagram, four threshold tables are shown arranged consecutively in order to correspond to an 8×8 pixel area.

FIG. 114 shows the result of calculating the logical sum of the result of dithering the data of FIG. 10b using the threshold value table of FIG. 11h and the contents of the Lie diagram. According to this, it can be seen that the edge information of the original data is sufficiently reflected in the processing result, and moreover, the average density within 8×8 pixels is 33, and the gradation is (1).

Based on the above considerations, by selecting a preferable threshold table or combining multiple processing results, it is possible to simultaneously achieve accurate gradation expression and high-resolution rain sounds. I understand.

[Example] The present invention will be explained in detail with reference to the following five drawings. Fig. 1 shows the mechanical components of a digital color copying machine of one type that embodies the invention, and Fig. 2 shows the electrical equipment. An overview of the structure of the department is shown below.

First, referring to FIG. 1, the original l is placed on the platen (contact glass) 2, and the fluorescent lamps 31+3
2, the reflected light is illuminated by a movable first mirror 41. It is reflected by the second mirror 42 and the third mirror 43 and passes through the imaging lens 5.

It enters the dichroic prism 6, where the three wavelengths of light, red (R), green (G) and blue ([3
). The separated light is captured by a solid-state image sensor.
9 incident on CD 7 r , 7 g and 7 b each. That is, the red light enters the CCr) 7r, the green light enters the CCD 7j;, and the blue light enters the CCD 7b.

The fluorescent lamps 31+32 and the first mirror 41 are connected to the first carriage 8.
The second mirror 42 and the third mirror 4J are mounted on the second carriage 9, and the second carriage 9 moves at 1/2 the speed of the first carriage 8.
The optical path length from the CCD to the CCD is kept constant, and when reading an original image, the first and second carriages scan from right to left. The first carriage 8 is connected to a carriage drive wire 12 that is wound around a carriage drive pulley 11 fixed to the shaft of a carriage drive motor 10, and the wire 12 is wound around a movable pulley (not shown) on a second carriage 9. ing. 29, the forward and reverse rotation of the motor 10 causes the first carriage 8 and the second carriage to move forward (original image reading and scanning) and backward (return), and the second carriage 9 moves at a speed of 172 of the first carriage 8. Move with.

When the first carriage 8 is at the home position shown in FIG. 1, the first carriage 8 is detected by a home position sensor 39 which is a reflective photosensor. This detection mode is shown in FIG. When the first carriage 8 is driven to the right during exposure scanning and moves away from the home position, the sensor 39 does not receive light (carriage non-detection). When the first carriage 8 returns to the home position, the sensor 39 receives light ( (carriage detection), and when the state changes from non-light receiving to light receiving, the carriage 8 is stopped and t is reached.

Now referring to FIG. 2, CCD 7 r + 7
The output of g+7b is converted from analog to digital and subjected to the necessary processing in image processing unit +-100 to produce recorded color information of black (BK), yellow (Y), magenta (M) and cyan (C). ) is converted into a binary signal for each recording activation. Each of the binary signals is
Laser driver L121)k.

112y, 112m and 112c, and each laser driver outputs a semiconductor laser 113bk, 113y,
By energizing 113m and 113c, laser light modulated with a recording color signal (binarized signal) is emitted.

Referring again to FIG. The emitted laser beams are reflected by the one-rotation polygon mirrors 13bk, 13y, 13m and 13c, respectively, and are reflected by the f-θ lens 14bk +
14 y.

After passing through 14m and 14c, the fourth mirror 15bk.

'5y+15m and 15c and 5th mirror 16bk.

Reflected by L6y+16m and 16c, polygonal mirror correction cylindrical lenses 17bk and 17y.

After passing through 17m and L7c, photoreceptor drum 18bk.

’8y+18m and 18c are imaged and irradiated.

Rotating polygon m l 3bk, 13y, L 3+o
and L3c.

The polygon mirror drive motors 4 lbk, 41y, 41m, and 41c are fixed to rotating shafts, and each motor rotates at a constant speed to rotate the polygon mirror at a constant speed.

As the polygon mirror rotates, the laser beam is scanned in a direction perpendicular to the rotational direction (clockwise) of the photoreceptor drum, that is, in a direction along the drum axis.

FIG. 4 shows the laser scanning system of the cyan color recording device in detail. 43c is a semiconductor laser. A sensor 44c, which is a light converting element, is arranged to receive the laser beam at one end of the laser scan (double-dashed line) in the direction along the axis of the photoreceptor drum 18c. The starting point of one line running ζt is detected at the time when the detection changes from detection to non-detection. That is, sensor 44
Laser light detection number 43 (pulse) of c is processed as a line synchronization pulse for laser scanning. Magenta recording device.

The configuration of the yellow recording device and the black recording device is also the fourth one.
The configuration is exactly the same as that of the cyan recording apparatus shown in the figure.

Further, referring to FIG. 1, the surface of the photoreceptor drum is connected to charge scorotrons 19bk, 19y, 19n+ and 19 connected to a negative voltage high voltage generator (not shown).
It is uniformly charged by c. When a laser beam modulated by a recording signal is irradiated onto the uniformly charged surface of the photoreceptor, the electric charge on the surface of the photoreceptor flows to the equipment ground of the drum body and disappears due to a photoconductive phenomenon. Here, the laser is not turned on in areas where the original density is high, and the laser is turned on in areas where the original density is low. As a result, the photoreceptor drum 1
8bJ 18yt l On the surface of 8m and 18c, the part corresponding to the 5R original density part is at a potential of -800V, and the part corresponding to the part corresponding to a light density part of the original is -100V.
As a result, an electrostatic latent image is formed corresponding to the density of the document. These electrostatic latent images are imaged by a black developing unit 20bk, a yellow developing unit 20y, a magenta developing unit 20m, and a cyan developing unit 20c, respectively, and the photosensitive drums 181]k, L8y,
Form black, yellow, magenta and cyan toner images on the 18m and 1.8c surfaces, respectively.

The toner in the developing unit is positively charged by stirring, and the developing unit is biased at 1200 V by a developing bias generator (not shown), and the toner adheres to the area where the surface potential of the photoreceptor is higher than the developing bias, and the original A toner image corresponding to the image is formed.

On the other hand, the recording paper 267 stored in the transfer paper cassette 22 is fed out by the paper feeding operation of the feed roller 23, and transferred to the transfer belt 267 by the registration roller 24 at a predetermined timing.
Sent to 5. The recording paper placed on the transfer belt 25 is
Due to the movement of the transfer belt 25, the photosensitive drum 18bk+
18yp passes through the lower part of 18m and 18c sequentially, and each photoreceptor drum 18bk, 18y, 18
While passing through the recording paper 5, black, yellow, magenta, and cyan toner images are sequentially transferred onto the recording paper by the action of the transfer corotron at the lower part of the transfer bell 1-5.

The transferred recording paper is then sent to the thermal fixing unit 36, where the toner is fixed to the recording paper at each location, and the recording paper 5 is transferred to the tray 3.
It is discharged at 7.

On the other hand, the remaining 1-lead on the surface of the photoreceptor after the transfer is removed by cleaner units 2lbk, 21y, 2in and 21c.

Cleaner unit 1-21bk that collects black toner
and black developing unit 20bk is toner collection pipe 4
2, and the black toner collected by the cleaner unit 21bk is collected into the developing unit 20blt. In addition, due to the reverse transfer of black toner from the recording paper to the photosensitive drum 18y during transfer, the yellow, magenta, and cyan toners collected by the cleaner units h21y+21m and 21c have a different color developed in the previous stage of those units 1-. Since the toner in the container is mixed, it will not be collected for reuse.

FIG. 5 shows the inside of the toner recovery pipe 42.

Inside the toner recovery pipe 42, a toner recovery auger 4 is installed.
Contains 3. The auger 43 is formed by a coil spring, and the 1-socket recovery vibe 42 is bent into a channel shape.
It can be freely rotated inside.

The auger 43 is rotationally driven in one direction by a driving means (not shown), and the toner collected in the unit 21bk is transferred to the developing unit 20b by the spiral pump action of the auger 43.
sent to k.

The transfer belt 25, which conveys the recording paper in the direction from the photosensitive drum 8bk to the photosensitive drum 18c, includes an idle roller 26.degree. drive roller 27. It is stretched between an idle roller 28 and an idle roller 30, and is rotated counterclockwise by a drive roller 27. The drive roller 27 is pivotally connected to the left end of a lever 31 that is pivotally connected to a shaft 32 . A plunger 35 of a black mode setting solenoid (not shown) is pivotally attached to the right end of the lever 31. A compression coil spring 34 is disposed between the plunger 35 and 4i1!132, and this spring 34 applies a clockwise rotational force to the lever 31.

When the black mode setting solenoid is de-energized (color mode), as shown in FIG. 1, the transfer belt 25 on which the recording paper is placed is the photosensitive drum 44bk, 44y.

It is in contact with 44m and 44c. In this state, when recording paper is placed on the transfer bell]-25 and toner images are formed on all the drums, each toner image is transferred onto the recording paper as the recording paper moves (color mode). When the black mode setting solenoid is energized (black mode), the compression coil spring 34
The lever 31 rotates counterclockwise against the repulsive force of the drive roller 51, and the transfer belt 25 is moved against the photosensitive drum 44y.

It is separated from 44 and 44c, and is still in contact with the photoreceptor drum 44bk. In this state, the transfer belt 25
Since the upper recording paper only contacts the photosensitive drum 44bk, only the black toner image is transferred to the recording paper (black mode). Recording paper is photosensitive drum 44y, 44f
Since they do not contact fl and 44c, the photosensitive drums = 44y, 44m and 44c are attached to the recording paper!・Na (
There is no residue (1 residual) and no stains such as yellow, magenta, cyan, etc. are cursed at all. That is, when copying in black mode, copies similar to those produced by a normal 11-color black copying machine can be obtained.

The console board 300 has a copy star 1 switch, a color mode/black mode designation switch 302 (immediately after the power is turned on, the switch key is off and the color mode is set; when the switch is closed for the first time, the switch key lights up and the black mode is set). The black mode setting solenoid is energized; when the switch is closed the second time, the switch key goes out, the color mode is set, and the black mode setting solenoid is de-energized), as well as other input key switches, character displays, indicator lights, etc. Equipped.

Next, the operation timing of the main parts of the copying mechanism will be explained with reference to the time chart shown in FIG. FIG. 6 shows the case when two identical full-color copies are made. 1st
U of exposure scan of carriage 8! ! The modulation energization of the laser 43bk based on the recording signal is started at almost the same timing as the start, and the lasers 43y, 43m and 43c are activated from the photoreceptor drum 44bk to 44y, 44m and 44y, respectively.
The moving time Ty, Tn of the transfer belt 25 for a distance of 4c
Modulation energization is started after a delay of 1 and Tc. Corotron for transcription 29 bk+ 29 y-29m and 29
c is respectively laser 43bk, 43y+ 43m
And 43c is energized after a delay of a predetermined time (time for the laser irradiation position on the photosensitive drum to reach the transfer corotron) from the start of modulation energization.

See Figure 2. Image processing unit ■00 is a CCD
The three color image signals read by 7r, 7g and 7b are
It is converted into black (BK), yellow (Y), magenta (M) and cyan (C) recording signals necessary for recording. The BK recording signal is supplied as is to the laser driver 112bk, but the Y, M and C recording signals are each supplied with their respective recorded color gradation data to the papa memory 108.
y, 108n, and 108c, the laser driver 112y is read out and converted into a recording signal after the delay time T V +7m and Tc shown in FIG.

112m and 112c. Note that the image processing unit 100 has a C0D7r as described above in the copying machine mode.
, 7g and 7b. In the graphics mode, the three-color signals are provided from outside the copying machine through the external interface 117.

Shading correction circuit 10 of image processing unit 100
1 is the color gradation data obtained by A/D converting the output signals of CCD 7r+ 7g and 7b into 8 bits, and is corrected for optical illuminance unevenness, sensitivity variations of internal unit elements of CCD 7r+ 7g and 7b, etc. Then, read color gradation data is created.

The multiplexer 102 is a multiplexer that selectively outputs either the output gradation data of the correction circuit 101 or the output gradation data of the interface circuit 117.

The γ correction circuit 103 that receives the output (color gradation data) of the multiplexer 102 not only changes the gradation (input gradation data) according to the characteristics of the photoreceptor, but also changes the gradation arbitrarily using the operation button of the console 300. and further change the input 8-bit data to output 6-bit data. Since the output is 6 bits, data representing one of 64 gradations will be output. Red (R) output from the γ correction circuit 103
), green (G), and blue (B), respectively, are supplied to a complementary color generation circuit 104.

Complementary color generation is the conversion of the name of each color read signal to the recorded color signal, red (R) gradation data becomes cyan (C) gradation data, and green (G) gradation data becomes magenta (M) gradation data. data and also blue gradation data (B)
is converted (read) as yellow gradation data (Y).

The Y, M, and C data output from the complementary color generation circuit 104 are provided to a masking processing circuit 106.

Next, masking processing and UCR processing will be explained. The calculation formula for masking processing is generally Yi, Mi, Ci
: Data before masking.

Vo, MO, Co: data after masking.

Also, UCR processing is also a general formula.

It can be expressed as

Therefore, in this embodiment, a new coefficient is obtained by using these equations and using the product of both coefficients to calculate the following. The coefficients (a, n, etc.) of the above calculation formula that performs both the masking process and the UCR/black generation process simultaneously are calculated in advance and substituted into the two calculation formulas to obtain the scheduled input to the masking processing circuit 106. Y
Calculated values (Yo', etc.: output from the UCR processing circuit 107) associated with i-, Mi, and Cj (6 bits each) are stored in the ROM in advance. Therefore, in this embodiment, the masking processing circuit 106 and the UCR processing/
The black generation circuit is composed of a set of ROMs, and the data at the address specified by inputs Y, M, and C to the masking processing circuit 106 is outputted from the UCR processing/black generation circuit 107 to buffer memories 108y, 108+w, t
08c and the gradation processing circuit 109. In addition,
Generally speaking, the masking processing circuit 10G is set to Y according to the characteristics of the spectral reflection wavelength of the toner for forming a recorded image.

The OCR processing circuit is for correcting the M and C signals, and the OCR processing circuit is for correcting color balance in overlapping toners of each color. After passing through the OCR processing/black generation circuit 107, black component data 13K is generated by combining the input three color data of Y, M, and C, and the output data of each color component of Y, M, and C is as follows.

The value is corrected by subtracting the black component.

Next, the buffer memory LO8y of the image processing unit 100
408m and 108c will be explained. These simply generate a time delay corresponding to the distance between the photoreceptor drums. The writing timing of each memory is the same, but the reading timing is as shown in FIG. The memory 108c is activated in accordance with the modulation energization timing of the laser 43c, and is different from each other.

When the maximum size is A3, the capacity of each memory should be at least 24% for the memory 108y, 48% for the memory 108m, and 72% for the memory 108c. For example, if the reading pixel density of COD is 400 dpi (dots per inch? 15.75 dots/+am), the memory 108y has about 87 bytes, the memory LO8m has about 174 bytes, and
The memory 108C only needs to have a capacity of approximately 261 bytes. In this embodiment, since 64 gradations and 6-bit data are handled, memories 108y, 108m and 10
The capacities of 8e are 87, 174, and 261 bytes, respectively. If the memory address is calculated in 6-bit units instead of byte units (8 bits), the memory address will be: memory 108y: L16K x 6 bits, memory 1.08m: 232K x 6 bits, and memory 108c: 348K x 6 bits.

FIG. 9 shows the configuration of the memory 108c, which has the largest capacity. Note that the other memories 108y and 108m have similar configurations. However, the memory capacity is small.

To explain the outline of the memory configuration with reference to FIG. 9, three 64K x 1-bit memories are used as input data memory.
Six pieces are used to create a 384K x 6 bit configuration.

These are DRAMs 1 to 6 shown in FIG.

The data that has undergone OCR processing is stored in a first-in/first-out (FiFo) memory.

Write to RAMI, 2. This is for correcting the difference between the output timing of the output data of the UCR process and the write timing of the memories DRAMs 1 to 6, and is a buffer of about 1942 minutes. FiF.

The data written to RAMI, 2 is stored in DRAMs 1 to 2 at addresses sequentially determined by counter 1 starting from address O.
6 is written. Next, the address of counter 1 is incremented by 1 and the next data is written. In this manner, data is sequentially written into DRAMs 1 to 6, and when it reaches 384K, it is reset and data is written again starting from address 0. When counter 1 advances the address to 384 at the beginning of writing σσ, DRAM1
~6, data starts to be written to FiFo RAM 1, 2 (reading from DRAMs 1 to 6). At the start, counter 2 is reset and data at address 0 is first written to FiFo RAM 1, 2.
F.

The data is written to RAMI, 2, counter 2 becomes address 1, and the data is sequentially read out in the same manner as writing. This counter 2 is also 384
When it reaches K, it is reset and written starting from address 0. Fi
The data written in FoRAM1,2 is output to the gradation processing circuit 109 based on the synchronization signal from the laser driver 112c. Data selector 1 selects the address (count data) of counter 1 or counter 2, and when writing data to DRAM 1 to 6, the address data of counter 1 is selected, and when reading data, the address data of counter 2 is selected. Address data is output. Data selector 2 selects 64K x 1 bit DRAM1~
Since the address No. 6 is determined by multiplexing the upper 8 bits and the lower 8 bits, it is used for selecting the upper/lower of the 16-bit address. The decoder also stores 6 blocks of DRAM 1 to 6 every 64 to 384 addresses.
This is an address decoder for selecting.

Next, the tone processing circuit 109 of the image processing unit 100 will be explained. This circuit 109 converts each multivalued input data of Y, M, and C into binary data, and performs one-area gradation processing to reflect the gradation of the input data in the output data. .

The 6-bit gradation data can represent density information of 64 gradations. Ideally, if the dot diameter of one dot could be varied in 64 steps, there would be no need to reduce the resolution, but in the laser beam electrophotography method, the dot diameter modulation only stabilizes the gradation by about 4 steps at most, and generally the area There are many combinations of gradation method, area gradation method, and beam modulation. Here, area gradation processing is performed for each 8×8 pixel matrix to express 64 gray levels of halftones.

The gradation processing circuit 109 includes four sets of units that process data of each color component of Y, M, C, and BK. The configuration of each unit is approximately the same, and the schematic configuration of one of them is shown in FIG. 7, and the details of each circuit are shown in FIGS. 8a, 8b,
This is shown in Figures 8d and 8e.

Referring first to FIG. 7, this circuit includes a 2×2 averaging circuit 149. Edge emphasis circuit 151. Edge extraction circuit 15
2. Submatrix processing circuit ■53° edge determination circuit 1
54. A dither processing circuit 156 and the like are provided.

Roughly speaking, this gradation processing unit is equipped with two types of gradation processing systems, and the first processing system automatically selects one of the processing systems according to the state of input data. 2
X2 averaging circuit 149 and submatrix processing circuit 15
It has 3. This processing system performs gradation processing using a submatrix method. In this example, an area of 8 consecutive pixels in each of the main scanning direction and the sub-scanning direction, that is, an 8×8 matrix area, is used as one unit of gradation processing, and one gradation is expressed with 64 pixels.

In the submatrix processing of this embodiment, two
For each x2 pixel area, that is, each submatrix area, find the average density of the input data of the four pixels therein, and make the average density correspond to that submatrix area in the threshold matrix table (8 x 8). Compare the magnitude relationship with each of the four thresholds and set it as "1" or "0" depending on the result.
” to generate binary data. Note that since the average density value of 2×2 pixels required for submatrix processing is obtained at the output of the 2×2 averaging circuit 149, in this embodiment, the input of the submatrix processing circuit 153 is input to the 282 averaging circuit 1.
By connecting to the output terminal of 49, the processing circuit 153
The average density calculation process in is omitted.

The second gradation processing system includes an edge emphasis circuit 151 and a dither processing circuit 156 connected to its output terminal. That is, data input as multivalued data is corrected for edge emphasis and then converted into binary data including gradation information by dither processing. In dither processing, each pixel-based input data is compared one-to-l with the threshold value at the relevant position in the threshold matrix table (8 x 8), and depending on the magnitude relationship, "1" or "0" is determined. ” is output as binary data.

The edge extraction circuit 152 and the edge determination circuit 154 output binary signals depending on whether or not the input data includes edge information. 4 logic gates 157, 158, 15
The circuits 9 and 160 selectively output output data from either the first gradation processing system or the second gradation processing system depending on the presence or absence of edge information.

In the circuit of FIG. 7, only the outline of the main components is shown to make the operation easier to understand. FIG. 8a shows a slightly more frame-like configuration of the circuit of FIG. 7.

A specific configuration of the 2×2 averaging circuit 149 shown in FIG. 8u is shown in FIG. 81, and an outline of its operation timing is shown in FIG. 8c.

The averaging circuit 149 averages images that exist in adjacent positions on the image in the sub-scanning direction (first carriage 8).
(exposure scanning direction) 2 pixels x main scanning direction (direction perpendicular to the n-light scanning direction: CCO electronic circuit scanning direction) 2 pixel data, a total of 4 pixels.

Referring to FIG. 8b, in the averaging circuit 149.

Latch LAI, adder ADI, AD2 . Bus driver B
It is equipped with DI, read/write memory (RAM) ME I, etc.

The operation of the averaging circuit 149 will be explained. In the data input to this circuit, data of pixels adjacent to each other in the main scanning direction appear sequentially as a serial signal. 8th
As shown in figure c, the odd-numbered (1, 3, 5, . . . ) pixel data in the main scanning direction is held in the latch LA, 1 for a time corresponding to about two pixels. Therefore, odd-numbered data is bits 0 to 5 of one input terminal A of the adder ADI.
The even numbered data (2°4.6...) appearing next to that data is directly applied to bits O to 5 of the other input terminal B of the adder ADI.

Therefore, immediately after the even-numbered data is input.

The sum of odd and even data (1+2.3+4.5+6. . . ) appears at the output of the adder ADI. This data is stored in the memory MEI via the bus driver BDI for odd-numbered pixels (all one line) in the sub-scanning direction.

At the timing of even-numbered pixels in the sub-scanning direction (all one line), the sum of the data of two pixels adjacent to each other in the main-scanning direction in that line is applied to bits 0 to 6 of the input terminal A of the adder AD2. At the same time, the data of the pixel located one line before that line in the sub-scanning direction (the sum of the two pixel data in the main-scanning direction is read out from the memory MEL and bits 0 to G of the input terminal B of the addition 1i1AD2 is applied to

Therefore, each pixel is D(t,j) (i is the position in the sub-scanning direction,
j indicates the position in the main scanning direction), the addition fjA
D2 is.

D(n, m)+D(n, m+1)+D(n+ 1,
11) Output the result of +D(n+1.m+1), that is, the sum total of data of four adjacent pixels (2×2). Therefore, the lower two bits (0,
By discarding 1) and taking out the upper 6 bits (2 to 7), a value of 1/4 of the total sum, that is, an average value of the four pixels is obtained.

Referring again to Figure 8a. The edge extraction circuit 152 includes a matrix register Ul, arithmetic units TJ2 and U3, and the edge enhancement circuit 151 includes matrix registers U4. It is composed of arithmetic units U5 and U6.

The edge emphasis circuit 151 is a two-dimensional spatial filter, and when there is a change in density level in the input data, that is, when there is edge information, the edge emphasis circuit 151 amplifies the density change in the data in that area and emphasizes the edge. In this example, the pattern PI in FIG.
is used. That is, A, B, C, D, E, F, G
Assuming a 3x3 pixel matrix area consisting of , I-I, and ■, the data of the center pixel (target pixel) E is expressed as
Change it to a new one.

E' = 13・E-2(B10+F+H)-(A+C
+G+T) Note that when this process is performed, some results may fall outside the range of 0 to 63, but those that are 64 or more are replaced with the fixed value 63, and those that are negative are replaced with 0. For example, the data shown in FIG.
51, the data shown in FIG. 1id is obtained at its output.

In order to configure a 3×3 pixel matrix spatial filter, it is necessary to refer to all 3×3 pixel two-dimensional data at the same timing. But since the data input to the filter is time series.

It is necessary to match the times at which the data of these nine pixels appear. To do this, matrix register U4
It has.

The matrix register U4 and the arithmetic unit U5 have a concrete configuration shown in FIG. 8d.

The matrix register U4 and the arithmetic unit U5 in FIG. 8a are indicated by 210 and 230, respectively, in FIG. 8d. Referring to Figure 8d.

The matrix register 210 has nine latches 211 to 2
19 and two sets of 1-line buffers (memories) 220 and 2
It is equipped with 21.

That is, each of the latches 211 to 219 holds data for one pixel, and the 1-line buffers 220 and 221 each store data for one line. m columns (hereinafter,
(denoted as n, m)), each latch 211 . ,212°213.214,21
6, 217, 218 and 219 outputs, respectively.

(n +t, m+1), (n +L mL (n
+1+ m IL (n, m+ 1), (n, m-1)
, (n-1, m+ 1).

The pixel data of (n-1,'m) and (n-1,m-1) are cursed.

In other words, the data of each pixel A, B, C, D, E, F, G, H, and ■ constituting the 3×3 matrix shown in FIG.
15. Appears at the output terminals of 214, 213, 212 and 211 at the same timing.

The output of the matrix register 210 includes the arithmetic unit 2
30 are connected. This calculation unit 230 has 7
adders 231, 232, 233゜234.235,
236 and 237. Addition 1111!2
The output of latch 211 and the latch 2 are connected to the two input terminals of 31.
13 is connected, the output of latch 214 and the output of latch 216 are connected to two input terminals of adder 232, and the output of latch 217 and the output of latch 219 are connected to two input terminals of adder 233. , the output of latch 212 and the output of latch 218 are connected to two input terminals of adder 234.

Therefore, adders 231, 232, 233 and 234 are
The values of G1I, D1F, A+C and B+H are output respectively. Since the adder 235 adds the output data of the adder 231 and the output data of the adder 233, A+C+G+1
Output the value of . Further, the addition WI 236 is connected to the adder 232.
Since the output data of the adder 234 and the output data of the adder 234 are added, a value of B+D+F+H is output. The outputs of adders 235 and 236 are connected to two input terminals of adder 237. However, the output of the adder 236 is connected to the adder W237 in a state where it is shifted to the upper digit by one bit. Therefore, the output terminal of the adder 5237 has 2.(B+
The value D1F+H)+A+C+G+I appears.

The 6-bit signal line SE connected to the output of the latch 215 and the 10-bit signal line SX connected to the output of the adder@237 are connected to the input terminal of the arithmetic unit U6. The configuration of the arithmetic unit U6 is shown in FIG. 8e.

Referring to FIG. 8e, the arithmetic unit U6 includes a read-only memory (ROM) ME l , ME2 and an adder A
It is equipped with DI. The memory MEI stores in advance a value 13 times the value of the address at each memory address. Therefore, when the data of pixel E is input to the address terminal of memory MEI, the value of 13・E is input to the output terminal of IO
Output as bit data. That data is added to adder A
Since the data of I) is applied to one input terminal of L and the data of X is input to the other input terminal of ADl,
The output terminal of is cursed with the calculation result of 13·E+X, that is, the result of edge emphasis processing. Addition 111i) ADI is 11
Outputs bit data, but uses only the royal 7 bits. Since this 7-bit data may deviate from the range of 0 to 63 required as gradation data, a read-only memory ME2 is provided to keep it within the range of 0 to 63. The memories M and E2 prestore in each address the same value if the address value is within the range of 0 to 63, 0 if the address value is negative, and 63 if the address value is 64 or more. Therefore, memory M
A value in the range of 0 to 63 is output as 6-bit data to the output terminal of E2.

The edge extraction circuit 152B shown in FIG. 8a includes the edge extraction circuit 152 and edge determination circuit 154 shown in FIG. Referring to FIG. 8a, edge extraction circuit 152
B is the 71-risk register U 1 .

It consists of an arithmetic unit U2 and arithmetic units 1-U3. In this example, the matrix register U1 and the arithmetic units 1-U2 have the same configuration as the matrix registers T, J4 and the arithmetic units of the edge enhancement circuit 151, respectively.

The edge extraction circuit 152B is a spatial filter similar to the edge enhancement circuit] 51, but the coefficients assigned to each pixel of the filter are different. When this filter is passed, the processing result becomes almost O in the portions of the 5 data other than the edges, so that only edge information is extracted.

In this example, the pattern PD shown in FIG. 12 is adopted for the edge extraction circuit 152B. Therefore, when passed through this filter, the data on the center side WE is converted to E l+ of the following equation.

E"=+2・E-2([3+D+F+l+)-(A+C
+G+I) Since the edge enhancement circuit and the edge extraction circuit have similar processing contents, their circuit configurations are also similar.

A signal line S connected to the output terminal of the arithmetic unit U2
E and SX are connected to the input terminals of the arithmetic unit U3. The 4+Iff configuration of the arithmetic unit U3 is similar to the arithmetic unit U6. That is, on the circuit diagram, the arithmetic unit U3 is the same as the arithmetic unit U except that the signal line drawn from the output of the memory iE2 in FIG. 8e is changed to one.
It is the same as 6.

Therefore, with reference to FIG. 8e, what is the arithmetic unit U6? The unit U3 will be explained in place of the tri-calculation unit U3. The memory MEI assigns 1 of the value of the address to each memory address.
The double value is stored in advance.

Therefore, when the data of pixel E is input to the address terminal of memory MEI, the value of 12·E is output as 10-bit data to the output terminal. The data is added to the adder AD
Since the data of X is applied to one input terminal of I and the data of . Memory ME2 is a read-only memory, and stores the calculation result of 12·E+X and the fixed threshold value 32.
The comparison result, that is, binary data, is stored in advance at a memory address corresponding to the input data.

Therefore, the output terminal of the edge extraction circuit 152B has 2×
A binary signal depending on the presence or absence of edge information is cursed for every two pixel data.

Referring again to Figure 8a. Submatrix processing circuit 15
3 is a read-only memory (ROM). This memory 153 stores the results of comparing the values of the threshold matrix table described later with the input concentration data, that is, according to their sizes. Binary data of rlJ and "0" are stored in advance. The density data, the main scanning address signal and the sub-scanning address signal are applied to the address terminal of the 5 memory 153.

The threshold matrix table in this example has an 8 x 8 two-dimensional matrix configuration corresponding to the SX8 pixel area of the gradation processing unit, and each pixel constituting the 71 helices is configured as shown in Figure 10e. is assigned a predetermined value ranging from 1 to 63. In this example, the threshold values are arranged in a spiral pattern.

The main scanning address signal and the sub-scanning address signal specify pixel positions in the vertical and horizontal directions of the threshold matrix, respectively. The comparison result between the specified threshold value and the concentration data input to other address terminals is
becomes output data. Therefore, for example, when the data shown in Figure 1B are input sequentially, the data shown in Figure 10F is output at the timing of each pixel.

In this example, the memory 153 simultaneously outputs the data of two pixels adjacent to each other in the main scanning direction as 2-bit parallel data, so the shift register 3G2 connected to the output terminal of the memory 153 outputs 1 bit per pixel. Converting to serial data.

The data output from the edge enhancement circuit 151 is applied to an input terminal of a dither processing circuit 156.

The dither processing circuit 156 includes a read-only memory (ROM).
) U7 and digital comparison cIU8.

Each data of a predetermined threshold matrix table is stored in the read-only memory U7 in advance. Specifically, as shown in FIG. 10e.

64 types of threshold data ranging from 0 to 63 are arranged in a Bayer type dot dispersion pattern arrangement at each position of an 8×8 matrix. The position on the 8×871-rinse is specified by the main scanning address signal and the sub-scanning address signal. The threshold data at the designated position is applied as a 6-bit 1-signal to one input terminal of the digital comparator U8 at each pixel timing.

The digital comparator U8 compares the size of the 6-bit data output by the edge emphasis circuit 151 with the 6-bit data output by the memory U7.
The ratio is 1\i with the bit threshold data, and a binary signal of "1" or "O" is output depending on the magnitude.

A circuit consisting of four logic gates 157, 158, 159, and 160 extracts the processing results of the submatrix processing circuit 153 and dither processing depending on the output signal of the edge extraction circuit 152B, that is, the presence or absence of edge information of the input image data. Either one of the processing results of the circuit 156 is output. In other words, if the input data does not contain edge information, the results of submatrix processing with excellent gradation are used, and if the input data contains edge information, the results of edge enhancement processing + dither processing with excellent resolution are used. Make use of it.

Since the edge extraction circuit 152 determines the presence or absence of an edge from the output data of the 2×2 averaging circuit, the edge extraction circuit 152
The signal outputted by 52 changes at a timing for each 2×2 pixel area. Therefore, switching of the gradation processing system is performed using a 2×2 pixel area, that is, each submatrix area in submatrix processing, as the minimum unit. In other words, since the processing system is not switched during the processing of each submatrix, even if the processing system is frequently switched, the processing results will not be disturbed due to interference between multiple processes.

Note that the output of the 2×2 averaging circuit 149 and the submatrix processing port w! Read/write memory (RAM) 348 inserted between the input of 1153. A read/write memory 374 inserted between the output of the edge extraction circuit B&152 and the input of the logic gate 158 is a buffer memory for 1542 main scans. That is, the output data of the 2×2 averaging circuit 149 is updated once every two lines of main scanning, and necessary data is not output in lines that are not updated.

Therefore, in a line where data is updated, data for one line is stored in each memory, and the data is read and used in the next line.

In addition, the output of the dither processing circuit 156 and the logic gate 159
A two-line buffer 350 inserted between the input and the input is a read/write memory with a capacity for two main scanning lines. That is,
Since the 2X2 averaging circuit 149 exists, the output data of the submatrix processing and the processing system switching signal are output with a delay of two main scanning lines from the data input to the 2X2 averaging circuit 149. In order to match the timing with the delay, the output data of the dither processing circuit 156 is delayed by two lines by a two-line buffer 350.

By the way, the reason why the input terminal of the edge extraction circuit 152 is connected to the output terminal of the 2.times.2 averaging circuit 149 is for another purpose in addition to preventing unnecessary switching operations of the gradation processing system. In other words, the purpose is to prevent erroneous edge detection for point images.

In general printed matter that has been subjected to halftone dot processing, halftone pinch is 1.
The sampling pitch of the image reading scanner used in the image processing apparatus is about 300 to 400 dpi (dots per inch). Therefore, in this case, the positional relationship between the halftone dots and each sampled pixel data is, for example, as shown in FIG. 15a (edge information is not included).

In addition, in FIG. 15a, PSl is the sampling pitch,
Pd is the halftone dot pitch. When the data obtained from Fig. 15a is passed through a 3x3 filter for edge extraction, 1 For example, in the 9 pixels in the area ARI of Fig. 15a, the central focused 'ffi element has a density close to the highest density, and the others Since the surrounding pixels have a density less than half of the maximum density, edge information is extracted even though the original image does not contain edge information.

When this type of misjudgment occurs, edge enhancement is performed even on images that contain edge information and no C, and noise components with high spatial frequencies are emphasized and appear throughout the output image, resulting in a decrease in image quality. .

The above misjudgments occur due to the relationship between the size of the edge extraction filter and the sampling pitch of the image data, and can be eliminated by increasing the number of elements in the edge extraction filter and selecting parameters appropriately. It is. However, a filter with a large number of elements has a very complicated configuration and is expensive.

In this embodiment, since the input of the edge extraction circuit 152 is connected to the output of the 2×2 averaging circuit 149, the above-mentioned erroneous determination does not occur. That is, FIG. 15b is the same as FIG. 15a.
The data shown in the figure is shown divided into four pixels (blocks) adjacent to each other in the main scanning direction and the sub-scanning direction, and is equivalent to the output of the 2×2 averaging circuit 149.

Therefore.

Pixel block pitch PS2 is twice Psl. Here, when each pixel block is associated with each element of the edge extraction filter, the nine pixel blocks that the filter focuses on are areas indicated by 1, for example, AR, 2.

In this case, edge information is not extracted because a large number of halftone dots are distributed approximately evenly within each element of the filter.

Therefore, no misjudgment occurs.

The binary data for each color (Y, M, C, BK) generated by the gradation processing circuit 109 described above is given to the laser drivers 43y, 43m, 43c, and 43bk for each color.

The synchronization control circuit 114 determines the activation timing of each of the above elements and matches the timing between each element. 200 is a microprocessor system that controls all the elements shown in FIG. 2 described above, that is, controls the copying machine. This processor system 200 performs copy control in various modes set on the console, and controls not only the image reading and recording system shown in FIG.
Optical system.

Sequences such as charger system, developing system, fixing system, etc. are performed.

FIG. 13 shows an interface between the polygon mirror driving motor and the microprocessor system (200: FIG. 2). The input/output boat 207 shown in FIG. 13 is connected to the bus 206 of the system 200.

In addition, in FIG. 13, 45 is the photosensitive drum 18bk.
= 1 ay, a motor that rotationally drives 18m and 18c, and is energized by the motor driver 46.

In addition, the input/output board 20 is equipped with a driver that energizes each part of the copying machine, a processing circuit connected to the sensor, etc.
7 or other input/output boats connected to the system 20
0, but illustration is omitted.

Next, the operation timing of each part based on the control operations of the microprocessor system 200 and the synchronous control circuit 114 will be explained.

First, when the power switch (not shown) is turned on, the apparatus starts a warm-up operation, which increases the temperature of the fixing unit 36.

・Start constant speed rotation of polygon mirror.

- Home positioning of carriage 8, - Generation of line synchronization clock (1,26KIlz), - Generation of video synchronization clock (8,42Ml1z).

・Perform operations such as initializing various counters. The line synchronization clock is supplied to the polygon mirror motor driver and the COD driver, and the former uses this signal as a reference signal for the phase-locked loop (PLL) servo, and the feedback signal to the beam sensor 4.
So that the beam detection signals of 4bk, 44y, 44m and 44c have the same frequency as the line synchronization clock.
Further, it is controlled to have a predetermined phase relationship. The latter is
Main run of CCD readout: I! Used as a start signal. Note that the detection signals (pulses) of the beam sensors 44bk, 44y, 44m, and 44c are output for each color (each sensor) and are used as the signal for synchronizing the start of laser beam main scanning. Note that the frequencies of the line synchronization signal and the detection signals of each beam sensor are locked by PLL and are the same, but there may be a slight phase difference, so
The scanning reference is not the line synchronization signal but the detection signal of each beam sensor.

The video synchronization clock has a frequency of 1 dot (1 pixel) and is supplied to the COD driver and laser driver.

Various counters are (1) Reading line counter.

(2) BK, Y, M, C8 write line counter.

(3) read dot counter, and (4) BK,
Y, M, (dot counter including 41F), but (1) and (2) above are microprocessor system 20
This is a program counter substituted by the operation of the CPU 202 of 0, and (3) and (4) are provided individually on the hardware, although not shown.

Next, the timing of the print cycle is shown in Figure 14,
Let me explain this. When the warm-up operation is completed, it becomes possible to print, and when the copy start key switch 301 is turned on.

Due to the operation of the CPU 202 of the system 200, the first carriage 8 drive motor (FIG. 13) starts rotating and the carriages 8 and 9 (1/2 speed of 8) start scanning (exposure scanning) to the left. When the carriage 8 is at the home position, the output of the home position sensor 39 is H, and the exposure scan (sub-scan) is soon started. At the time of transition from H to B, the read line counter is cleared and at the same time the count is enabled. In addition,
The point in time when this change from H to L is the position where the leading edge of the document is exposed.

With the line synchronization clock that comes in after the sensor 39 goes low, the read line counter is counted up every pulse. Also, when the line synchronization clock comes in, the reading dot counter is cleared at the rising edge of the clock to enable counting.

Therefore, the first line is read in sequence from pixel 122 to pixel 4667 in synchronization with the video synchronization clock immediately after the first line synchronization clock is input after the home position sensor 39 becomes L. read. still,
Pixel counting is done by a read dot counter. Further, the content of the read line counter at this time is 1.

Similarly, for the second and subsequent lines, the reading line counter is incremented by the next line synchronization clock, the reading dot counter is cleared, and synchronized with the next video synchronization clock, the reading counter is incremented, and pixels are read. Do the following.

In this way, the lines are sequentially read, and when the reading line counter counts up to 6615 lines, the last reading is performed on that line, and the carriage drive motor is reversely energized to return the carriages 8 and 9 to their home positions.

The pixel data read in the above manner is sequentially sent to the image processing unit 100 and subjected to various image processing. The time required to perform this image processing is only two clocks of the line synchronization clock signal.

At least it takes.

Next, in writing, first clear the write line counter and enable the count: When the read line counter is 2, the BK9 write counter is; When the read line counter is 1577, the YIJ' write counter is;
When the read line counter is 3152, the 1M write counter is; and the read line counter is 4727.
When , the C write counter is cleared and enabled to count, respectively.

These count ups are calculated by each beam sensor 4.
This is done at the rising edge of the detection signals 4bk, 44y, 44m and 44c. Further, the write dot counters (BK, Y, M, C) are cleared at the rising edge of the detection signal of each beam sensor.

Count-up is performed by a video synchronization signal.

Writing for each color begins when the content of the reading counter reaches a predetermined value, the writing line counter for each color becomes counting enable, and counting starts with the first beam sensor detection signal (content 1). When the dot counter reaches a predetermined value, the laser driver is driven to perform ig recording. Dot count is 1~
The data between 400 and 401 to 5077 (401 to 5077) are dummy data.
677) are the values that can be inserted. Here, the dummy data includes Bee 11 sensor 44bk, 4'4. y, 44
m and 44c and photosensitive drum I 8bk, 18y
, 18m and 18c to adjust the physical distance. Also, the input data (1 or O) is captured at the falling point of the video synchronization signal. The writing range in the line direction is 1 to 6615 for each writing line counter.
It's time for the line.

Now, as shown in FIG. 14, after starting the exposure scan,
Since BK recording data is obtained from the time of scanning the third line of OD, the recording activation of the BK recording apparatus is started in synchronization with the acquisition of BK data. Therefore, BK(1
In the signal processing line, the frame buffer memory is omitted. On the other hand, since the Y, M, and C recording devices are offset in the paper feeding direction, the recording start delay times Ty, Tn+, and Tc correspond to the amount of offset from the BK recording device.
(Figure 6) It is necessary to store the recording signal between 87 and 17 byte frame memories 108y and 17, as mentioned above.
4 is equipped with a byte frame memory 108m and 261 is equipped with a byte frame memory 108C, and in order to reduce the storage capacity in these memories, the stored data is gradation data before being converted to a degree pattern. . Therefore, since a frame memory for BK is not required, the amount of memory can be reduced, and since gradation data is stored, the capacity of each frame memory can be reduced. The maximum size of the photosensitive drum set for this copier is A3.
The circumference (2πr) is much shorter than the long side length of
゜In the above embodiment, a spatial filter with a 3 x 3 element configuration was used to extract edge information, and an averaging circuit for averaging data in a 2 x 2 pixel area was connected to the input of the filter. The number of elements of these filters and the number of pixels of the averaging circuit may be arbitrarily changed according to changes in the halftone dot pitch of the original image and the sampling pitch of the image reading scanner.

[Effects] As described above, according to the present invention, edge areas and non-edge areas are automatically distinguished and halftone processing suitable for each area is performed, so the number of characters is 5.

High-quality images can be reproduced even for halftone images including line drawings. In particular, since edge extraction is performed after averaging the data of a plurality of pixels, no erroneous operation occurs in edge determination even if the original image is halftone-processed.

Furthermore, as in the fifth embodiment, when one halftone processing system is a submatrix processing system and the processing system is switched in units of submatrix areas, one main matrix area (
For example, since halftone processing suitable for each part of the image (8 x 8) is performed for each part, the resolution is improved. For example, if one main matrix has the configuration shown in Figure 10, if the entire matrix is dithered, black pixels (recorded pixels) will be cursed in the hatched area in the figure after halftone processing. Therefore, those black pixels become noise, and the resolution of the output image becomes low. However, since the hatched area is a non-edge portion, the apparatus of the embodiment performs submatrix processing on that area, and all pixels in this area become white pixels. In other words, the resolution is improved compared to when the entire main 71-lix is dithered. Furthermore, by performing submatrix processing, it is possible to prevent moire from occurring.

[Brief explanation of drawings]

FIG. 1 is a sectional view mainly showing the configuration of the main mechanical parts of a digital color copying machine of one type that implements the present invention, FIG. 2 is a block diagram showing the configuration of the electrical image processing section, and FIG. 1st
FIG. 4 is an exploded perspective view of the BK recording device section shown in FIG. 1, and FIG. FIG. FIG. 6 is a time chart showing the relationship between original reading scanning timing, recording biasing timing, and transfer biasing timing in the above embodiment. FIG. 7 is a block diagram showing the configuration of the gradation processing circuit 109 shown in FIG. 2. 8a, 8b, 8d, and 8e are block diagrams showing the configuration of each part of the circuit shown in FIG. 7. FIG. 8c is a time chart showing the data processing sequence of one circuit 149. FIG. 9 is a block diagram showing the configuration of buffer memory 108c shown in FIG. 2. Figure LOa is a plan view showing an example of a partial area of a document image corresponding to a unit area for gradation processing, and Figure 10b is a two-dimensional expansion of the multivalued data obtained by reading the image in Figure 10a. FIG. FIG. LOc, FIG. 10e, and FIG. 11h are plan views showing two-dimensional expansion of the contents of three types of threshold tables used in one-gradation processing. Figures 10d and 10f show the data in Figure 10b,
FIG. 10g is a plan view showing two-dimensional expansion of the results of dither processing using the threshold data shown in FIGS. 10c and 10e, respectively. FIG. FIG. 3 is a plan view showing a two-dimensional development of the pattern processing results. FIG. 10h is a plan view showing data obtained by averaging the data in FIG. 10b for each 2×2 area. FIGS. 10i and LOj are plan views showing data obtained by processing the data in FIG. 10h with the data in FIGS. 10c and 10a, respectively. The tenth figure is a plan view showing images in one main matrix and the contents of their processing. FIG. 11a is a plan view showing a state in which data indicating characteristics of edges are arranged on both sides of the edge area of the data shown in FIG. 10b. FIG. 11b and FIG. 1Ld are plan views showing the results of edge extraction processing and edge enhancement processing, respectively, of the data shown in FIG. 11b. FIG. 1ie is a plan view showing the result of binarizing the data in FIG. 11b using a fixed threshold. Figures 11a and 11f show the data in Figure 1id,
10e and 10e are plan views showing the results of dither processing using the thresholds shown in FIG. 10e and FIG. 10e, respectively. FIG. 11g is a plan view showing the result of the logical sum operation of the data in FIG. 1ie and the data in FIG. Lie. FIG. 11i is a plan view showing the result of dithering the data in FIG. 10b using the threshold value in FIG. 11h and the logical sum operation of the data in FIG. 1ie. FIG. 12 is a plan view showing several patterns of spatial filters. FIG. 13 is a block diagram illustrating some of the reproduction mechanism elements connected to microprocessor system 200. FIG. 14 is a time chart showing the relationship between exposure scanning and recording energization of the copying machine shown in FIG. FIGS. 15a and 15b are plan views showing the positional relationship between halftone dots on a document and an edge extraction filter. 1: #draft 2 Nibraten”1 +32
: Fluorescent lamp 41-43: Mirror 5: Variable magnification lens unit 6: Dichroic prism 7r, 7g, 7b: CCD 8: First carriage 9: Second carriage 10: Carriage drive motor 11: Pulley 128 wire 1.3bk,
13y, 13m, 13c: polygon mirror 14bk, 14y,
14m, 14c: f-θ lens 15bk, 15y,
15m, 15c, 16bk, 16y, 16+n, 16c
: Mirror 17bk, 17y, 17m, 17c Nijilintorical lens 18bk, 18y, 18mj8c :
Photosensitive drums 19bk, 19y, 19+++, 19c
:Charge Scorotron 20bk, 20y, 20m, 2
0c: Developing device 21bk, 21y, 2In+, 21c
: Cleaner 22: Paper feed cassette 23: Paper feed roller 24 Ni registration roller 25: Transfer belt 26.28
, 30: Idle roller 27: Drive roller 29bk, 29y, 29m, 29c: Transfer corotron 31 nilever 32; Shaft 33: Pin 34: Compression coil spring 3
5: Black copy mode setting solenoid plunger 36:
Fixing unit 37: 1-ray 39: Home position sensor 40: Carriage guide bar 4ibk, 41y, 41m, 41c: Polygonal mirror drive motor 42: Toner collection pipe 43bk, 43y, 43+a, 43c: Laser 44
bk, 44y, 44n+, 44c: Beam sensor 45
: Photoreceptor drum drive motor 46 : Motor driver ioo : Image processing unit 1-
109: Gradation processing circuit 149: 2×2 averaging circuit (averaging means) 151: Edge enhancement circuit 152: Edge extraction circuit (edge determination means) 153: Submatrix processing circuit (second gradation processing means)
154: Edge determination circuit 156: Dither processing circuit (first gradation processing means) 157, 158, 159,
160: Logic gate (control means) 200: Microprocessor system 210, Lll, U4: vtrix register 2
30, υ2. U5:F arithmetic unit 13.06: Arithmetic unit 34B, 374: Read/write memory 362: Shift register

Claims (4)

[Claims] (1) A threshold table is provided in which different threshold values are set for each pixel position in a unit area for gradation processing consisting of multiple pixel positions, and input multi-value data is determined by referring to the table. In a halftone digital image processing device that expresses halftones by converting into binary data and adjusting the number of recorded pixel data and non-recorded pixel data within a unit area of gradation processing; Averaging means for averaging data of a plurality of pixels included in each area for each region smaller than 1; edge emphasis processing means for performing edge emphasis processing on data in units of pixels; A first gradation processing means that binarizes using the value of a predetermined threshold table; a second gradation processing means that performs processing different from the first gradation processing means; output data of the averaging means an edge determining unit that monitors and determines the presence or absence of edge information for each of the first regions; and the first gradation processing unit and the second gradation processing unit according to the determination result of the edge determining unit. A halftone digital image processing device comprising: a control means for switching between the two. (2) The averaging means is configured to measure a plurality of adjacent images in both the main scanning direction and the sub-scanning direction of an image reading device that performs main scanning and sub-scanning to read a two-dimensional image and sequentially output multi-valued data. The halftone digital image processing apparatus according to claim 1, which is a two-dimensional averaging means for averaging pixel data. (3) The halftone digital image processing device according to claim 1, wherein the first gradation processing means performs dither processing on data that has been subjected to edge enhancement processing. (4) The second gradation processing means binarizes the data output by the averaging means using data in a threshold table in which threshold values are set for each pixel. Range (1), (2) or (3)
The halftone digital image processing device described in 2.