JPS62183477U - - Google Patents
Info
- Publication number
- JPS62183477U JPS62183477U JP7129786U JP7129786U JPS62183477U JP S62183477 U JPS62183477 U JP S62183477U JP 7129786 U JP7129786 U JP 7129786U JP 7129786 U JP7129786 U JP 7129786U JP S62183477 U JPS62183477 U JP S62183477U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- hereinafter referred
- clock
- dropout compensation
- ccd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Television Signal Processing For Recording (AREA)
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
Description
第１図は本考案の一実施例のブロツクダイアグ
ラム、第２図は従来のブロツクダイアグラム、第
３図は本考案のドロツプアウト補正回路図である
。
１…映像入力端子、２…ＮＴＳＣ用クロツク発
生器、３…ＰＡＬ用クロツク発生器、４…ＣＣＤ
ブロツク、５…映像出力端子、６…切換えスイツ
チ、２′…ＮＴＳＣ用クロツク発生器、３′…Ｐ
ＡＬ用クロツク発生器、４′…ＮＴＳＣ用ＣＣＤ
ブロツク、４″…ＰＡＬ用ＣＣＤブロツク、７…
ドロツプアウト検出信号入力、８…ドロツプアウ
ト切換えスイツチ、９…リミツタ。
FIG. 1 is a block diagram of one embodiment of the present invention, FIG. 2 is a conventional block diagram, and FIG. 3 is a dropout correction circuit diagram of the present invention. 1...Video input terminal, 2...NTSC clock generator, 3...PAL clock generator, 4...CCD
Block, 5...Video output terminal, 6...Selector switch, 2'...NTSC clock generator, 3'...P
Clock generator for AL, 4'...CCD for NTSC
Block, 4″… CCD block for PAL, 7…
Dropout detection signal input, 8...Dropout changeover switch, 9...Limiter.
Claims (1)
用クロツク（以下クロツクと略す）回路より成る
１水平期間（以下１Ｈと略す）遅延回路を用いた
ドロツプアウト補償回路において、クロツク周波
数を変化できる回路を設けたことを特徴とするド
ロツプアウト補償回路。 In a dropout compensation circuit using a one horizontal period (hereinafter referred to as 1H) delay circuit consisting of a charge coupled device (hereinafter referred to as CCD) and a charge transfer clock (hereinafter referred to as clock) circuit, a circuit that can change the clock frequency is provided. A dropout compensation circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7129786U JPS62183477U (en) | 1986-05-14 | 1986-05-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7129786U JPS62183477U (en) | 1986-05-14 | 1986-05-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62183477U true JPS62183477U (en) | 1987-11-20 |
Family
ID=30913725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7129786U Pending JPS62183477U (en) | 1986-05-14 | 1986-05-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62183477U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022072B2 (en) * | 1982-06-30 | 1985-05-30 | ペルメレツク電極株式会社 | Cathode for acidic solution electrolysis and its manufacturing method |
-
1986
- 1986-05-14 JP JP7129786U patent/JPS62183477U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6022072B2 (en) * | 1982-06-30 | 1985-05-30 | ペルメレツク電極株式会社 | Cathode for acidic solution electrolysis and its manufacturing method |