JPS62183256U

JPS62183256U -

Info

Publication number: JPS62183256U
Application number: JP6963886U
Authority: JP
Priority date: 1986-05-09
Filing date: 1986-05-09
Publication date: 1987-11-20

Description

[Brief explanation of the drawing]

第１図は本考案のマイクロコンピユータ動作異
常検出回路の一実施例を示すブロツク図、第２図
は第１図の実施例の動作を示すタイミングチヤー
トである。１……マイクロコンピユータ、２……Ｌパルス
単安定マルチバイブレータ、３……Ｓパルス単安
定マルチバイブレータ、４，５……インバータ、
６，７，８……第１、第２、第３のナンドゲート
、９……Ｒ―Ｓ型フリツプフロツプ、１０……発
光ダイオード駆動回路、１１……発光ダイオード
、１２……電源投入時初期設定回路、１３……モ
ーメンタリスイツチ、１４……単安定マルチバイ
ブレータ、ＲＥＳＥＴ……リセツト入力端子、Ｃ
Ｐ_０……タイミング信号、ＣＰ_１……Ｌパルス信
号、_１……Ｌパルス信号ＣＰ_１の反転信号、
ＣＰ_２……Ｓパルス信号、Ｑ……Ｒ―Ｓ型フリツ
プフロツプ９の出力。 FIG. 1 is a block diagram showing one embodiment of the microcomputer operation abnormality detection circuit of the present invention, and FIG. 2 is a timing chart showing the operation of the embodiment of FIG. 1... Microcomputer, 2... L pulse monostable multivibrator, 3... S pulse monostable multivibrator, 4, 5... Inverter,
6, 7, 8...First, second, and third NAND gates, 9...R-S type flip-flop, 10...Light emitting diode drive circuit, 11...Light emitting diode, 12...Initial setting circuit when power is turned on. , 13... Momentary switch, 14... Monostable multivibrator, RESET... Reset input terminal, C
_P0 ...timing signal, _CP1 ...L pulse signal, ₁ ...inverted signal of L pulse signal _CP1 ,
_CP2 ...S pulse signal, Q...R-S type flip-flop 9 output.

Claims

[Claims for Utility Model Registration] A microcomputer that monitors a timing signal with a constant period and pulse width output from a microcomputer, and when an abnormal state is detected, determines that the microcomputer is malfunctioning and outputs a signal. A computer operation abnormality detection circuit comprising means for generating a single first pulse triggered by a timing signal and having a pulse width greater than a pulse width of the timing signal and less than one cycle width; and means for generating a single second pulse having a pulse width less than the pulse width of the timing signal; the timing signal; the first pulse signal;
When a pulse signal is input and the period of the timing signal changes, or the pulse width of the timing signal becomes larger than the pulse width of the first pulse signal, or becomes smaller than the pulse width of the second pulse signal. 1. A microcomputer operation abnormality detection circuit comprising a determination circuit that determines that the microcomputer is malfunctioning and outputs a signal when the microcomputer malfunctions.