JPS62182689A - Electronic time-piece - Google Patents

Abstract

PURPOSE:To prevent a malfunction and reduce a useless power consumption by detecting the load conditions of a pulse motor and supplying it with driving pulses having a large effective value in accordance with the load conditions. CONSTITUTION:A load detecting circuit 29 detects load conditions by means of an induced current waveform after the application of driving pulses. A control circuit 30 controls the drive of a pulse motor 28 in accordance with the load conditions detected by the load detecting circuit 29 in such a manner that narrow and broad driving pulses are supplied in no-load and in loaded conditions, respectively. An inhibiting circuit 105 is provided to inhibit a load detecting operation for broad driving pulses.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece, and more particularly to a drive system for a pulse motor as an electromechanical time changing mechanism. An object of the present invention is to reduce the power consumption of such a pulse motor.

Another object of the present invention is to detect or anticipate and instantly correct malfunctions that may occur during low power consumption driving, and to prevent malfunctions from occurring or being corrected in the external operation of the watch, such as the operation of the second hand. The objective is to provide a control method that is not perceptible.

Since the so-called quartz wristwatch, which uses a quartz oscillator as a time standard oscillator, was put into practical use, it has become widely popular due to its high precision and reliability. During that time, technological innovations in crystal wristwatches have been remarkable, and their power consumption, which initially required 20-plus microwatts, can now be achieved with around 5 microwatts.

However, if we look at the breakdown of the current power consumption of 5 μW, we can see that it is 1.5 to 2 μW due to the oscillation of the crystal oscillator, branch circuits, etc., and 3 to 55 μW for one pulse motor, which is quite unbalanced. Since the power consumption is 60 to 70% of the total power consumption, reducing the power consumption of this pulse motor is likely to be effective in further reducing power consumption in the future. However, the current pulse motor
The conversion efficiency of is υhigh, and it is quite difficult to increase the efficiency further. However, conventional pulse motors have been designed to operate satisfactorily even under the worst conditions due to requirements such as load-resistant mechanisms such as calendar mechanisms, environmental resistance such as temperature and magnetism, and resistance to external disturbances such as vibration and shock. For this reason, the motor was required to have the ability to withstand a certain load under certain driving conditions, but in reality, a watch body is under such load only for about 4 to 5 hours in a day. Most of the time there is no load. In other words, if the watch body is always in a no-load state, the motor mechanism does not need to be designed to withstand such a large load, and in that case, power consumption can be reduced considerably, but the watch only lasts for a short time. In order to guarantee this, it was necessary to use a pulse motor that can supply a large amount of power and obtain a large output.

The present invention corrects the above-mentioned irrationality by driving the pulse motor with less power when the load is small, and with high power when the load is large, thereby reducing the power consumed by the pulse motor. This will significantly reduce the amount of water used. Moreover, this drive system is constructed using reliable all-electronic means without mechanical contacts, and achieves stable drive that can cope with variations due to motor type and mass production.

The present invention will be explained below.

Figure 1 shows an example of a pulse motor for an electronic wristwatch.
In the figure, 1 is a rotor made of a permanent magnet magnetized into two poles, and stators 2 and 3 are arranged facing each other with this rotor 1 in between. 4 is connected to a wound yoke 5 to form a set of stators.

The stators 2 and 6 have a circular arc portion 2 of 30° with respect to the center of the rotor 1 so that the rotor 1 can rotate in a fixed direction.
a, 3ayk eccentricity, and the magnetic h(N
and S) the position is shifted to one side of the stator 2°5. This type of pulse motor has been in practical use for some time and was driven by a circuit block as shown in FIG. 10
is a crystal oscillator, which is driven by an oscillation circuit 11, whose frequency is divided by a divider 12, and a waveform shaper 13.
Two pulses having an appropriate time width and a phase difference of 180° are formed at an appropriate time interval.

As an example, a pulse of 7.8 m5ec per 2a will be considered and explained below. This pulse is CMOS
It is input to a driver 14.15 consisting of an inverter, and its output is supplied to terminals 4a and 4b of carp A/4. FIG. 3 is a detailed diagram of a part of this dopper. When a signal 7jt- of 18 is applied to the input terminal 16 of one inverter 14, a current flows as shown by arrow 19, and conversely, the input terminal of the other inverter 15 flows as shown by arrow 19. When a similar signal is applied to 17, a current flows in the symmetrical point of arrow 19. That is, by alternately applying signals to the input terminals 16 and 17 of both inverters, it is possible to alternately reverse the current flowing through the input terminals 7 and 8. Specifically, the currents flowing through the input terminals 7 and 8 can be alternately reversed every second.
A current of m5ec can be passed through a coil/L/4. With such a drive circuit, the stators 2 and 3 of the step motor shown in FIG. 1 have N poles.

S poles are generated alternately, and the rotor 1 can be rotated 180 degrees by repulsion and attraction with the magnetic poles of the rotor 1. This bidirectional rotation of the rotor 1 is transmitted to the fourth wheel 7 via the intermediate wheel 6, and then to the fifth wheel 8, second wheel 9, and so on. Furthermore, although not shown, the information is transmitted to the cylinder pinion, hour wheel, and calendar mechanism, and the hour and 9 minute hands.

The pulse motor shown in FIG. 1, which operates an indicator consisting of a second hand, a calendar, etc., operates in principle as explained above, and has been used as a conversion mechanism for electronic wristwatches.

In the drive circuit shown in Fig. 3, when a high level signal is applied to the terminal 17 and a signal 18 is applied to the terminal 16, and a current flows as shown by the arrow 19, a voltage drop occurs in the MOS transistor 15 based on the drive current due to the channel impedance. A signal waveform corresponding to this current can be detected at the terminal 4b. The current waveform is, for example, as shown in Fig. 4. In Fig. 4, section A is the drive section, and in this case, 7.8 m5ec.
, the current flowing in this section A is the current consumed by driving the motor. The reason why the current waveform in section A shows a complicated shape as shown in the figure is that in addition to the current generated based on the voltage applied by the drive circuit, there is an induced current in the carp μ due to the rotation of the driven Rogue. This is because they are superimposed. Section B is the section after the drive pulse is applied, and the rotor rotates due to inertia and vibrates until it stops at the resting position. At this time, this section is P of the drive inverter 14 and 15 in Fig. 3.
Channel lvMO8) Since the fungistor is turned on, an induced current flows to the coil A/4 in response to the movement of the low gear in the loop between the coil I/4 and this transistor. This is why the waveform in section B in FIG. 4 is pulsating. Therefore, the shape of the drive current waveform and the waveform of the induced current after driving can almost correspond to the rotational position of the rogue.

Now, waveform 20 and waveform 20° in FIG. 4 are a series of waveforms, and this is the case when the load on the rotor is very small. Waveform 22 and waveform 22° are also a series of waveforms, and in this case, the load on the rotor is large and is close to the rotor's operating limit, and waveform 2.1° and waveform 21° represent a load of approximately - of the allowable large load. This is the case when multiplied by . If you carefully observe the current waveform when the load is changed in this way, you will see that the waveform extends to the right as the load increases. This is because Rogue's rotation slows down as the load increases! 9, it has been experimentally confirmed that the twoter vibration frequency and amplitude are low until it stops at a stable position. Considering this phenomenon in reverse, the load on the rotor is always
If there is no load, the driving pulse width is 7.8m5e
It is understood that driving can be performed with a shorter pulse width than c.

In fact, even if the pulse width is shortened, the motor still operates and the output power decreases. This situation is shown in FIG. Figure 5 shows
This figure shows the output (A/R) characteristic T and the power consumption characteristic (2) when the drive pulse width is changed. The aforementioned drive pulse width of 7.8 m1le (! corresponds to P2 in this figure).

That is, the output torque is T2 with a pulse width of P2, and the power consumption is 2.0 This output torque T2 is set so as to be able to sufficiently withstand the load encountered by the watch body, as described above. However, if the load on the rotor is small or negligible, the output p may be small, the drive widths 2 to 7 can be shortened, and power consumption can be reduced. for example,
If driven with the pulse width of Pl, the output torque Tl will reduce the power consumption by 1 effort.The present invention focuses on this point, and by detecting the load on the Rogue, the narrow It is driven with a pulse width, and when a large load is applied, it is driven with a wide pulse width, which is rational and aims to reduce power consumption. As mentioned before, the overwhelming majority of people are in a no-load state, so the effect of reducing power consumption is extremely small.

For example, as shown in Fig. 5, when there is no load (20 hours), it is driven with a pulse width of Pl, and when it is loaded (4 hours), it is driven with a pulse width of P2,
■L/Integration-1/2, the average power consumption is 60% or less compared to the conventional method that always drives with the bus width of P2, which is a significant reduction in power consumption. The transformation is measured.

By the way, I briefly mentioned above "detecting the load...", but it goes without saying that this method of detecting the load is a major point of the present invention. The detection method will be described. Looking at the current waveform flowing through the coil in FIG. 4, it can be seen that the current waveform changes as the load increases. That is, in drive section A, the positions of maximum and minimum shift to the right as the load increases. The magnitude of the load can be determined by focusing on this point, but the amount of change in this waveform is extremely small, making it difficult to absorb variations in mass production, and requires extremely delicate control.

Therefore, the present invention focused on section B after application of the drive pulse. Also in this section B, as the load increases, for example, the point where the minimum value is first shifted to the right. Moreover, compared to the amount of change in the waveform in section A, the amount of change can be obtained several times as much. Therefore, it is easier to detect the magnitude of the load based on the induced current waveform in this section B than in the above-mentioned section A, and the reliability is also higher. This phenomenon is the same for the rooster when the drive pulse width is shortened, and the situation is shown in Figure 6.The drive shown in Figure 6 has a narrower drive pulse width than the one in Figure 4, so it can handle small loads. The drive current waveform 23 at no load, which can only withstand, the induced current waveform 23° after driving, and the drive current waveform 24 at the operating limit load, and the induced current waveform 2 after driving
4" is the same as shown in FIG. The magnitude of the load is detected from the subsequent induced current waveform, and if the load is small, driving is continued with the initial narrow drive pulse width.

When the load increases and approaches the limit of driving with a narrow drive pulse width, the next drive is driven with a wide drive pulse width for a certain period of time, and then the drive is returned to the original narrow drive pulse width.

The present invention generally has such a configuration, and will be explained in more detail with reference to the block diagram of FIG. 7.

FIG. 7 is a block diagram showing the configuration of the present invention.
2 is a time standard oscillator, 26 is a circuit including an oscillation circuit, a frequency dividing circuit, etc., 27 is a pulse motor drive circuit, and 28 is a pulse motor.The configuration up to this point is the same as that of a conventional electronic wristwatch. 29 is a load detection circuit that detects the load based on the induced current waveform after application of the drive pulse as explained in FIGS. 4 and 6. 30 is a control circuit that detects the load state detected by the load detection circuit 29. The circuit that controls the drive of the pulse motor 28 accordingly supplies a narrow drive pulse when there is no load and a wide drive pulse when there is a load.This control system will be explained with reference to FIG. FIG. 8 shows the state of the drive pulses, which are supplied as described above in the section regarding the pulse motor, and are shown as pulses 31 and 32. After applying 0 pulses 31 and 32, which are narrow pulse widths in a no-load state, the detection circuit shown in FIG. 7 detects a load state, which is a no-load state or a small load state. In other words, since the load detection after pulse 31 is determined to be no load, the next pulse 32 is determined to have a narrow pulse width.The load detection after pulse 32 is also determined to be no load, so the next 1<fit 33 mo is narrow pulse width. becomes. In the load detection after the pulse 53, the load state is determined to be 0. In this case, after the pulse 33, several tens of m5ee later, the second driving pulse 34 with a wide pulse width has the same polarity as the pulse 33 (that is, the same current direction). For the subsequent fixed number of pulses, wide pulse width pulses 55, 56 are applied, and then the initial narrow pulse width pulses 57, 58, etc. are applied again. To explain the relationship between pulse 33 and pulse 34,
When a large load is detected by driving pulse 33, the equation 1
After 0 m5eC, a wide pulse 34 is applied. This is because the load is detected after pulse 33 and it is determined that the load is large, but it is difficult to determine whether the rotor has operated at this time because the induced current waveform in Figure 6 shifts to the right as the load increases and attenuates. do. When the rotor does not operate, there is no induced current, but it is difficult to distinguish from the state in which the rotor operates smoothly when the load is close to its limit. If the load increases gradually, even if it is determined that the load is large, the pulse 55 at that time
In this case, the rotor is operating, and if the load suddenly becomes large enough to be unable to be driven with a narrow pulse width, the rotor will not operate at pulse 33.

It is difficult to distinguish between the two. Therefore, it is easy to set the load detection after pulse application so that there is some margin. In this configuration, pulse 34 is applied. When the rotor is actuated by pulse 33, pulse 34 is a pulse in the same direction as pulse 33, so this pulse 34 becomes a pulse with an opposite phase, and the rotor does not rotate. Also, if the rotor does not operate with pulse 33, it will be driven with pulse 34. In this case, the rotor will be driven with a delay of several 10 m5ec, but this will not be recognized by the eye as the operation of the second hand. , there is no need to worry about unsightliness caused by this. Next, after detecting the load, the reason why we configured the configuration to continue a constant number of wide pulse width pulses 35 and 36'l is because the largest load on Rogue is the calendar mechanism, which lasts for 5 to 4 hours. Since it continues, if you immediately return to a narrow pulse width, it will be judged as a load state again, and if this is repeated 9 times, two pulses will be supplied for each operation, which will increase the degt power and eliminate the meaning of reducing power consumption. . In addition, the load placed on Rogue is not only due to the calendar mechanism, but also single loads such as magnetic fields, low temperatures, and disturbances. In such a case, it is desirable that the number of continuous pulses with a wide pulse width be as small as possible. Considering such a phenomenon, the number of continuous pulses is desirably set to several tens of seconds to 910 minutes, and the configuration of the present study is 0 or more.Next, specific embodiments of the present invention will be explained. . FIG. 9 shows an example of the load detection circuit and drive pulse control circuit of a timepiece according to the present invention. In FIG. 9, 25 is an oscillation circuit, 26 is a frequency dividing circuit, 2B is a motor, 27 is a drive circuit, 29 is a motor load detection circuit, and 30 is a control circuit, each of which corresponds to the blocks in FIG. 7.

The circuit elements will be sequentially explained below. 39 NANs
The D GATE output is a clock for creating a narrow pulse when driving a motor in a no-load state, and for example, generates a clock pulse delayed by 5 m5 eq with respect to the fall υ of a 1 second signal. At this time, delay flip-flop 42
In this case, the input 1-second signal is delayed by 51'18 ee and outputted, and a narrow pulse with a width of 5m5ec is generated at the output of the gate 46. Flip-flop 44 is 128H
4 with a delay flip-flop that uses 2 as the clock input.
The output of 4 is delayed by 7.8m5ec with respect to the input 1 second signal. Therefore, a pulse with a width of 7.8 m5ec is obtained at the output of the gate 47, and this is used as a wide pulse for driving when a load is applied.

The gate 40 detects a clock pulse 42 for determining the no-load state and the loaded state, and for generating a pulse <μ, with respect to the time until the minimum portion of the current waveform generated by the rotor operation appears immediately after the application of the drive pulse. Judgment reference pulses are obtained at the outputs of 43 and 48 by the same operation as in .44.

FIG. 10 58 corresponds to the output narrow pulse of gate 46,
59 corresponds to the judgment reference pulse of the gate 48 output. The gate 41 is a gate for forming a correction pulse, and the pulse width is a wide pulse of 7.8 m+sec.
m5ec late. An example is shown in FIG. 1058. The input terminal 57 of the gate 41 is a correction signal to be described later, and only when the correction signal becomes HPGH, a correction pulse is generated at the output of the gate 41 and supplied to the subsequent stage. Gate 39°40
．． The input signal 41 is a signal for obtaining the pulse, and is appropriately combined with the output of the counter 26.

89.49 is the inverter 1 for driving the above pulse.
This is a circuit that separates the signals from 4.15 and alternately outputs them every second. The gate 30 causes the counter 52 to reach the zero state.
When the correction pulse is issued to the output terminal of 41,
This is to input one count input into the counter 52. After the counter 52 starts counting, the gate 30 remains in the OFF state until all outputs of the counter 52 return to zero.

When 52 enters the counting state by the output of gate 30, the gate of 51 opens and continues to send a 2 second signal to 52 as a count signal until all outputs of 52 become zero.
As mentioned above, the counter 52 is set appropriately between several tens of seconds and several tens of minutes, and after detecting that the motor is in a loaded state, outputs a wide pulse drive signal for the above-mentioned time width. A timer to keep you going. Reference numeral 47 uses the output of the counter 52 as a gate input, and outputs a wide pulse to the subsequent stage while 52 is in the counting state.

Block 29 in FIG. 9 is an example of a circuit that detects the motor load from the operating state of the motor after application of the drive pulse. 53.54 is a transmifusi 3 link gate,
The outputs of the drive inverters 14 and 15 are alternately selected according to the drive signal.

The outputs of 53 and 54 are combined and input to a differential amplifier 55 via a capacitor. Of the 53.54 output signals,
The waveforms in the no-load state and the waveforms in the loaded state are shown as 10th waveforms, respectively.
In this case, the 0-differential circuit shown in FIG.
For 60, a 62 signal is obtained, and for 61, a 640 signal is obtained.

The output of the inverter is delayed by the CR time constant circuit and becomes one input of the Nant gate 56, and by using the intermediate output of the two inverters as the other input of the Nant gate 56, the signal 63 in FIG. 65t-obtained. Signal 63 corresponds to output waveform 60, and signal 65 corresponds to output waveform 6.
It corresponds to 1. Output waveform 60.61 and signal 65.6
5, it is clear that the pulses of signals 62 and 63 indicate a predetermined peak position of the output waveform. The load state is detected by determining whether the pulse position of the signal 63, 65 is inside or outside the above-mentioned judgment reference pulse 59, and the former case is determined to be in a no-load state, and the latter is determined to be in a loaded state. Therefore, the signal 63 indicates a no-load state, and the signal 65 indicates a loaded state. Note that the output signals 65 and 65 of the Nandt gates output pulses in the negative direction.

Next, the correction pulse generating means will be described. Game) 10
4 is the load detection signal that is the output of the gate 56, and the gate 4
The judgment reference pulse signal 59 which becomes the output of 8 and the 1 second signal which becomes the output of the delay flip-flop 44 are
5ec delayed signal is input. The output signal of the delay flip-flop 44 serves as a mask signal for determining the detectable period at the gate 104. With the above configuration, the detection signal when there is no load (Fig. 10 65)
) passes through the gate 104, but the detection signal 65 when there is no load is prohibited. Fin 57 is goo) 107 and 10
8 and the set input is formed by gates 106 and 105. The 1-second signal input to the gate 1o6 determines the desired state of the flip-flop, and the output 57 must be set to H in the load detection state.In this state, the no-load state is detected. When the signal passes through the gate 104, it passes through the gates 105 and 106, resets the flip-flop, and puts the output 57 in the L state.

However, when the load is heavy, the cutter cell M1 does not enter, so the output 57 remains set to H. If the output 57 remains high, the gate 89 for the drive circuit is in a state where the output 41 generates a correction pulse.
Alternatively, a correction pulse is supplied to the coil through 49. The other input of the gate 105 receives a signal that prohibits passage of the detection signal at the same time that the counter 52 starts operating. Note that the correction bar V7- is set by the gate 41 to a pulse width larger than that of a normal drive pulse, and a pulse having the same polarity as the drive pulse at which the heavy load condition was detected is supplied. That is, NAND gates 90 and 91 and N
A 2 second signal is applied as a gate signal to the AND gates 92 and 93, and since the NAND gate 91 is connected to an inverter 94, a 2 second signal of opposite polarity to that of the NAND gates 92 and 93 is applied. ing.

As a result, the normal drive pulse that has passed through the OR gate 95 alternately passes through the NAND gates 90 and 92 every second and is supplied to the drive circuit. Furthermore, when a heavy load condition is detected from the induced current generated in the coil after application of the drive pulse, the correction pulse 66 is output several 1 ohms after the drive pulse as described above.

The correction pulse is input to NAND gates 91 and 95, but NAND gates 91 and 93 are input to gates 90 and 92, respectively.
Since the gate signals are shared, the correction pulse is supplied to the drive circuit as a valve having the same polarity as the drive pulse.

As a result, for the case of waveform 61, the correction pulse 66
is subsequently applied, and the rotation of Rogue is completed by 66.

However, as described above, this also includes the case where the rogue rotation is completed before 66 is applied. The correction pulse 66 is also input to the counter 52 via the gu) 30,
The gate 51 is turned on and the gate 52 is placed in a counting state. Thereafter, the gate 47 is kept in the ON state for a certain period of time to continue supplying the wide pulse drive signal. While the wide pulse is being supplied, the output of the inverter 112 is input to the gate 105, so 57 is in the LOW state and no correction pulse is output.

Therefore, the gate 105 acts as a side pressure on the circuit for inhibiting the load detection operation for the drive pulse at full load.

This is because the motor is considered to have sufficient output torque during wide pulse driving.

As described above, in this embodiment, the drive pulse generation circuit in a normal light load state is surrounded by a frame 99 in FIG. 39, gate 46, and inverter 96, and also 7,8 m5
A circuit for generating a drive pulse having a pulse width of ec is surrounded by a frame 110 and is formed by a delay flip-flop 44 having a clock signal of 128 Hz, a gate 47, and an inverter 96. In addition, a load detection circuit 29 shown in FIG. 9 is used as a load detection circuit, and a correction pulse generation circuit is a gate 41 surrounded by a frame 98 in FIG. and gate 4
1 output to the drive circuit as a correction pulse having the same polarity as the drive pulse.

As a peak detection circuit, in addition to 55 differential amplifier circuits,
Various methods are possible. Figure 18 is a block diagram of a peak detection circuit using a delay circuit.
54 C) Hunsumishirong Gate, 80 is Figure 9 55
81 is a delay circuit, and 82 is a comparator to which the outputs of 80 and 81 are input. An example of the amplifier 80 is shown in FIG. 15 or 14. Since the motor drive detection waveforms 25, 24, etc. mentioned above are signals of several mV to several tens of mV that are substantially generated near the power supply level, they are divided by the resistors 66, 67 and converted to the input operating level of the amplifier. A waveform shown in FIG. 16 76 appears at the terminal 68. FIG. 14 shows an improved circuit of FIG. 13, in which a MOS transistor is inserted in place of the resistor 67, and the channel of the transistor 69 is changed so that the amplifier voltage is at the operating level. It has a return circuit that controls impedance.
Block 70 is a circuit for detecting the output rep μ. 1st
FIG. 5 shows a simple embodiment of the delay circuit 81, with a 71°7
5 is a transmission gate, and 72.74 is a load capacitor. In this case, the input signal 76 of the terminal 68 is delayed as shown in 77 at the output terminal. The terminal voltage waveform of 72 is 79. Furthermore, a waveform 77 appears at the output terminal 75 by the transmissive gate 73. Comparator 82 receives waveform 7
When 6 and 77 are input, a curved signal 3 shown at 78 is output.

As the delay circuit, the one shown in FIG. 15 is suitable, but since the input signal frequency is relatively low, a bucket brigade type data transfer element or the like is also suitable.

It has been confirmed that the load detection method of the present invention operates effectively even in the case of a magnetic field or an impulse a applied to a watch body. FIG. 19 shows the detected current waveform when a DC magnetic field is applied in the direction of the coil of the pulse motor. 83 is a case where the directions of the magnetic field induced in the motor inner core by an external magnetic field and the driving magnetic field are opposite to each other, and 84 is a case where both magnetic fields are in the same direction.

In waveforms 85 and 84, waveforms 85 and 86 have zero external magnetic field, and can be considered to be almost the same waveform. 87.88 is a waveform when the external magnetic field is 40Qau8g. According to the waveform, the operation in the direction 83 becomes more difficult as the external magnetic field becomes stronger, and exhibits the same characteristics as the operation when the load becomes large. Therefore, the timepiece circuit according to the present invention operates effectively against the influence of external magnetic fields, and it has been experimentally confirmed that the strength against external magnetic fields is no different from that of conventional timepieces. 1st
In the case of FIG. 87, since the minimum position of the waveform appears after the determination reference pulse, a correction signal indicated by 87' is added. From the above explanation, it can be easily inferred that the present invention has an effective effect on impact resistance as well.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the embodiments described here, and numerous improvements, changes, and applications are possible. For example, the pulse motor is not limited to the pulse motor described here. A conversion mechanism other than a motor may be used, and even a buffless motor having the inner cylinder of a pulse motor as shown in FIG. 11 can be realized with exactly the same configuration.

In the pulse motor shown in Fig. 11, the rotor 100 is made of a water-immersed magnet, and the stator 101 is an integral type with no gap, unlike the stator 101 in Fig. 1, and notches 102 and 105 are formed for determining the static position of the rotor. has been done. 10
4 is a drive coil.

In such a pulse motor, since the stator 101 is connected, the induced current after driving is as shown in Fig. 12.
It is slightly different from FIGS. 4 and 6.

However, it will be understood that the waveforms 105 and 105' under no load and the waveforms 106 and 106'' under load are basically the same and can be realized using the same method.

As described above, according to the present invention, the rotor load condition is detected by the induced current generated in the coil of the pulse motor, and when the load detection circuit detects the electric load condition, the second drive pulse having an effective value larger than the first drive pulse is generated. It has a configuration that outputs a drive pulse of 1, and is also provided with a means for prohibiting load detection for the second drive pulse, so that erroneous #
This prevents a single operation and reduces wasteful power consumption.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of a pulse motor of an electronic wristwatch according to the present invention. Figure 2 9 Figure 3 shows the conventional 11! The fourth diagram shows the I-connection configuration.
The figure shows the current waveform of a pulse motor drive coil in a conventional watch. FIG. 5 is a diagram showing the relationship between output torque and power consumption with respect to the drive pulse width of the pulse motor. FIG. 6 is a coil current waveform diagram when the motor is driven with a pulse width narrower than the conventional drive pulse. ! FIG. 7 is a diagram showing a circuit block of a timepiece according to the present invention. FIG. 8 is an example of a time chart of motor drive pulses by the circuit according to the present invention. FIG. 9 is a diagram showing a specific example of the block circuit of FIG. 8. FIG. 10 is an example of a time chart of the load detection section in FIG. 9. FIG. 11 is a diagram showing an example of a pulse motor of an electronic wristwatch according to the present invention. FIG. 12 is a coil current waveform diagram during narrow pulse driving in the pulse motor of FIG. 11. Figures 15 to 18 are diagrams showing other examples of the load detection section in Figure 9. Figure 19 shows the coil/L' current waveform when a DC magnetic field is applied to the electronic wristwatch according to the present invention. View showing change 25
... Generator S circuit 26 ... Branch circuit 27 ... Drive circuit 28 ... Motor 29 ... Load detection circuit 30 ... Control circuits 31 to 63 ... Narrow pulse drive eroding gear 4. ...Correction (FT No. 55...Wide pulse drive signal 59...Load judgment reference pulse 60...No load detection signal 61-...Load detection signal 98...Correction pulse generation circuit 99, 110--Drive pulse generation circuit 111---Prohibited circuit or higher

Claims (1)

[Claims] an oscillation circuit (25), a frequency division circuit (26) that divides the output signal of the oscillation circuit, a drive circuit (27) that operates based on the output signal of the frequency division circuit, and is driven by the drive circuit. A load detection circuit (29) that detects an induced current generated in a coil of the pulse motor; and a load detection circuit (29) that is connected between the frequency dividing circuit and the drive circuit; a control circuit (30) that is controlled by an output signal of the circuit, and the control circuit includes a circuit (99) that generates a first drive pulse based on the output signal of the frequency dividing circuit; a circuit (110) for outputting a second drive pulse having a larger effective value than the first drive pulse based on the heavy load detection signal of the circuit and the output signal of the frequency dividing circuit; This electronic timepiece is patented in that it includes an inhibition circuit (105) that inhibits the load detection operation in response to the second drive pulse.