JPS6217857B2 - - Google Patents
Info
- Publication number
- JPS6217857B2 JPS6217857B2 JP55038946A JP3894680A JPS6217857B2 JP S6217857 B2 JPS6217857 B2 JP S6217857B2 JP 55038946 A JP55038946 A JP 55038946A JP 3894680 A JP3894680 A JP 3894680A JP S6217857 B2 JPS6217857 B2 JP S6217857B2
- Authority
- JP
- Japan
- Prior art keywords
- film carrier
- film
- lead
- window
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 15
- 238000003825 pressing Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910015363 Au—Sn Inorganic materials 0.000 description 1
- 235000014676 Phragmites communis Nutrition 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明はフイルムキヤリア、特にフイルムの中
央部にプレス成形して形成された半導体素子装着
用窓部に形成されるリードの端子構造に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a film carrier, particularly to a lead terminal structure formed in a window for mounting a semiconductor element formed by press molding in the center of the film.
近年、ICチツプ等、高密度多数端子を有する
半導体素子を高い信頼性で接続する手段として、
フイルムキヤリアを用いたフイルムキヤリア方式
が極めて優れた接続手段として採用され、例え
ば、電卓、時計等の半導体素子への実装手段とし
て広く用いられている。 In recent years, it has been used as a means to connect semiconductor devices with high density and multiple terminals, such as IC chips, with high reliability.
A film carrier method using a film carrier has been adopted as an extremely superior connection means, and is widely used as a means for mounting semiconductor devices in calculators, watches, etc., for example.
第１図ａ，ｂはフイルムキヤリアの一例を説明
するための要部拡大平面図、その要部断面図であ
る。同図において、１は優れた耐熱性を有する厚
さ約125μｍ程度のポリイミドフイルムを35mm幅
のテープ状に切断して形成されたポリイミドテー
プであり、このテープ１の両端部長手方向には多
数個のスプロケツトホール２がプレス成形により
所定間隔離間して形成されている。この場合、こ
のホール２はガイドとして、リールに巻き取りな
がら用いられる。また、このテープ１の中央部に
は、プレス成形法により半導体素子を装着する所
定形状の窓３が形成され、さらにこのテープ１の
上面および上記窓３に突出したフインガ部分に
は、厚さ約35μｍ程度のCu箔が接着され、この
Cu箔が所定形状にホトエツチングされて信号伝
送用のリード４が形成されている。さらにこの
Cu箔からなるリード４上にはSnの無電解メツキ
が施されている。 FIGS. 1A and 1B are an enlarged plan view of a main part and a sectional view of the main part for explaining an example of a film carrier. In the figure, 1 is a polyimide tape formed by cutting a polyimide film with a thickness of about 125 μm, which has excellent heat resistance, into a tape shape of 35 mm width. Sprocket holes 2 are formed by press molding at predetermined intervals. In this case, this hole 2 is used as a guide while winding it onto a reel. Further, a window 3 of a predetermined shape for mounting a semiconductor element is formed in the center of this tape 1 by a press molding method, and furthermore, the upper surface of this tape 1 and the finger portion protruding into the window 3 have a thickness of approximately A Cu foil of approximately 35μm is glued to this
Cu foil is photo-etched into a predetermined shape to form leads 4 for signal transmission. Furthermore, this
Leads 4 made of Cu foil are electrolessly plated with Sn.
このように構成されたフイルムキヤリアは、テ
ープ１の窓３から突出したフインガ部４ａと図示
しない半導体素子のAuバンプとの位置を合わせ
ておき、図示しないボンデイングツールをフイン
ガ部４ａ上におろして圧力をかけ、所定時間電流
を流して加熱圧着すると、Au―Sn合金が生成さ
れて半導体素子がテープ１にボンデイングされ、
ツールをとり除いたあと、ボンデイングされた半
導体素子がテープ１とともに拾い上げられて半導
体素子がテープ１に実装されることになる。 The film carrier configured in this way is manufactured by aligning the finger portion 4a protruding from the window 3 of the tape 1 with the Au bump of the semiconductor element (not shown), and applying pressure by lowering a bonding tool (not shown) onto the finger portion 4a. When a current is applied for a predetermined period of time and heat-compressed, an Au-Sn alloy is generated and the semiconductor element is bonded to the tape 1.
After removing the tool, the bonded semiconductor element is picked up together with the tape 1, and the semiconductor element is mounted on the tape 1.
しかしながら上記構成によるフイルムキヤリア
において、リード４は同図ａに示したように一様
な太さと膜厚とを有しており、しかも端子部とな
るフインガ部４ａをテープ１に設けられた窓３に
微細な配列間隔で突出して形成されているため、
外力により変形し易く、半導体素子のAuバンプ
への信頼性の高い接続が極めて困難であつた。 However, in the film carrier having the above structure, the leads 4 have a uniform thickness and film thickness as shown in FIG. Because they are formed protrudingly at minute intervals,
It was easily deformed by external force, and it was extremely difficult to connect the semiconductor element to the Au bump with high reliability.
したがつて本発明は、リードの一端を窓部に橋
絡させて設けるとともにこのリードの橋絡部に破
断部を設け、接続時にこの破断部から切断して端
子部を形成することによつて、信頼性の高い接続
を可能にしたフイルムキヤリアを提供することを
目的としている。以下実施例を用いて本発明を詳
細に説明する。 Therefore, the present invention provides one end of the lead bridging to the window part, and also providing a broken part in the bridging part of the lead, and cutting from this broken part at the time of connection to form a terminal part. The aim is to provide a film carrier that enables highly reliable connections. The present invention will be explained in detail below using Examples.
第２図ａ，ｂは本発明によるフイルムキヤリア
の一実施例を説明するための要部拡大平面図、そ
の要部断面図であり、第１図と同記号は同一要素
となるのでその説明は省略する。これらの図にお
いて、テープ１に設けられた窓３には、その対向
端にまたがつて多数本のリード４が橋絡して形成
され、かつこの窓３に橋絡された多数本のリード
４のほぼ中央部所定位置には、リード４の両端部
に一対の半円形状の切り欠き部４ｂがそれぞれ形
成されている。そして、この切り欠き部４ｂ部分
はそのリード幅が所定のリード幅よりも約1/2程
度小さく形成され、断面積が小さくなるので、押
圧により容易に破断可能な形状に形成され、橋絡
された各リード４においてほぼ同一直線上に並設
されている。 FIGS. 2a and 2b are an enlarged plan view and a cross-sectional view of essential parts for explaining one embodiment of the film carrier according to the present invention, and since the same symbols as in FIG. 1 are the same elements, the explanation will be Omitted. In these figures, a window 3 provided in a tape 1 is formed by bridging a large number of leads 4 across the opposite ends thereof, and a large number of leads 4 bridging to this window 3 are formed. A pair of semicircular notches 4b are formed at both ends of the lead 4 at predetermined positions approximately in the center thereof. The lead width of this notch 4b portion is formed to be about 1/2 smaller than the predetermined lead width, and the cross-sectional area is small, so it is formed into a shape that can be easily broken by pressing, and is not bridged. The leads 4 are arranged substantially on the same straight line.
このような構成によれば、この窓３部に半導体
素子を実装する以前において、リード４の半導体
素子のバンプに接続する端子となる部分がテープ
１上に破断可能な状態で橋絡されているので、端
子配列の変形を受けにくくなる。したがつて一定
の配列精度に保持された状態で半導体素子バンプ
に押圧加熱することによつて、切り欠き部４ｂを
同時に破断させながら半導体素子のバンプに接続
されるので、信頼性の高い接続を容易に行なうこ
とができる。 According to such a configuration, before the semiconductor element is mounted on the window 3, the portion of the lead 4 that becomes the terminal connected to the bump of the semiconductor element is bridged on the tape 1 in a breakable state. Therefore, the terminal arrangement is less susceptible to deformation. Therefore, by pressing and heating the bumps of the semiconductor element while maintaining a certain alignment accuracy, the notch part 4b is simultaneously broken and connected to the bump of the semiconductor element, resulting in a highly reliable connection. It can be done easily.
第３図および第４図は本発明によるフイルムキ
ヤリアの他の実施例を説明するための要部拡大平
面図であり、第２図と異なる点は、第３図では橋
絡された各リード４のほぼ中央部所定位置には、
穿孔部４ｃをそれぞれ形成し、この部分の断面積
を小さくさせ、押圧力により容易に破断可能な断
面僅少部が形成されている。また、第４図では橋
絡された各リード４のほぼ中央部所定位置にはこ
の部分から切り欠き部４ｄをそれぞれ形成し、こ
の部分の断面積を小さくさせ、押圧力により容易
に破断可能な断面僅少部が形成されている。この
ような構成においても前述と全く同様な効果が得
られる。 3 and 4 are enlarged plan views of essential parts for explaining other embodiments of the film carrier according to the present invention. The difference from FIG. 2 is that each bridged lead 4 is At a predetermined position approximately in the center of
Perforated portions 4c are formed respectively, and the cross-sectional area of these portions is reduced to form small cross-sectional portions that can be easily broken by pressing force. In addition, in FIG. 4, a cutout portion 4d is formed at a predetermined position approximately in the center of each bridged lead 4, so that the cross-sectional area of this portion is reduced and it can be easily broken by pressing force. A small cross-section portion is formed. Even in such a configuration, the same effects as described above can be obtained.
なお、上記実施例において、断面僅少部として
リードの幅を狭くすることによつて断面積を小さ
くさせた場合について説明したが、本発明はこれ
に限定されるものではなく、この部分のリードの
箔厚を薄くすることによつて断面積を小さくさせ
ても前述と同様の効果が得られる。また、この両
者を併用することによつても同様の効果が得られ
ることは勿論である。 In the above embodiment, a case has been described in which the cross-sectional area is reduced by narrowing the width of the lead as the small cross-section portion, but the present invention is not limited to this. Even if the cross-sectional area is reduced by reducing the foil thickness, the same effect as described above can be obtained. Moreover, it goes without saying that similar effects can be obtained by using both of them together.
以上説明したように本発明によるフイルムキヤ
リアによれば、リードの端子が外力に対して変形
しにくくなり、したがつて従来のフイルムキヤリ
アに比較して半導体素子への接続の信頼性を著し
く向上させることができる極めて優れた効果が得
られる。 As explained above, according to the film carrier of the present invention, the terminals of the leads are less likely to be deformed by external forces, and therefore the reliability of connection to semiconductor elements is significantly improved compared to conventional film carriers. Extremely excellent effects can be obtained.
第１図ａ，ｂは従来のフイルムキヤリアの一例
を説明するための要部拡大平面図、その要部断面
図、第２図ａ，ｂは本発明によるフイルムキヤリ
アの一実施例を説明するための要部拡大平面図、
その要部断面図、第３図、第４図は本発明による
フイルムキヤリアの他の実施例を説明するための
要部拡大平面図である。
１……テープ、２……スプロケツトホール、３
……窓、４……リード、４ａ……フインガ部、４
ｂ……切り欠き部、４ｃ……穿孔部、４ｄ……切
り欠き部。
FIGS. 1a and 1b are enlarged plan views and sectional views of essential parts for explaining an example of a conventional film carrier, and FIGS. 2a and 2b are for explaining an embodiment of a film carrier according to the present invention. An enlarged plan view of the main parts of
The main part sectional view, FIGS. 3 and 4 are enlarged plan views of the main part for explaining other embodiments of the film carrier according to the present invention. 1... Tape, 2... Sprocket hole, 3
...Window, 4...Reed, 4a...Finger part, 4
b...notch part, 4c...perforation part, 4d...notch part.
Claims (1)
成された複数本のリードと、前記フイルムを貫通
して形成された半導体素子装着用窓部と、前記窓
部の対向辺に前記リードの一端が橋絡されかつ該
橋絡部の一部に前記リードの断面僅少部を有する
端子部とを備えたことを特徴とするフイルムキヤ
リア。 ２ 前記断面僅少部を切り欠き部としたことを特
徴とする特許請求の範囲第１項記載のフイルムキ
ヤリア。 ３ 前記断面僅少部を穿孔部としたことを特徴と
する特許請求の範囲第１項記載のフイルムキヤリ
ア。 ４ 前記断面僅少部を薄肉部としたことを特徴と
する特許請求の範囲第１項記載のフイルムキヤリ
ア。[Scope of Claims] 1. A heat-resistant film, a plurality of leads formed on the film, a window for mounting a semiconductor element formed through the film, and an opposite side of the window. A film carrier comprising: a terminal portion in which one end of the lead is bridged, and a portion of the bridge portion has a small cross-section portion of the lead. 2. The film carrier according to claim 1, wherein the small section portion is a cutout portion. 3. The film carrier according to claim 1, wherein the small cross-section portion is a perforated portion. 4. The film carrier according to claim 1, wherein the small section portion is a thin wall portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3894680A JPS56135955A (en) | 1980-03-28 | 1980-03-28 | Film carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3894680A JPS56135955A (en) | 1980-03-28 | 1980-03-28 | Film carrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56135955A JPS56135955A (en) | 1981-10-23 |
| JPS6217857B2 true JPS6217857B2 (en) | 1987-04-20 |
Family
ID=12539369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3894680A Granted JPS56135955A (en) | 1980-03-28 | 1980-03-28 | Film carrier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56135955A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2770530B2 (en) * | 1990-02-20 | 1998-07-02 | 松下電器産業株式会社 | Film carrier package |
| JP5130867B2 (en) * | 2006-12-14 | 2013-01-30 | 日立電線株式会社 | Tape carrier for semiconductor device and manufacturing method thereof |
| JP2010272759A (en) * | 2009-05-22 | 2010-12-02 | Renesas Electronics Corp | Tape carrier package, individual component for tape carrier package, and method of manufacturing tape carrier package and individual component for the same |
-
1980
- 1980-03-28 JP JP3894680A patent/JPS56135955A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56135955A (en) | 1981-10-23 |
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