JPS6217137U - - Google Patents
Info
- Publication number
- JPS6217137U JPS6217137U JP10778185U JP10778185U JPS6217137U JP S6217137 U JPS6217137 U JP S6217137U JP 10778185 U JP10778185 U JP 10778185U JP 10778185 U JP10778185 U JP 10778185U JP S6217137 U JPS6217137 U JP S6217137U
- Authority
- JP
- Japan
- Prior art keywords
- separated
- semiconductor device
- integrated semiconductor
- isolation trenches
- elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 2
- 238000002955 isolation Methods 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- 238000003486 chemical etching Methods 0.000 claims 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Element Separation (AREA)
Description
第１図は本考案の一実施例の上面図、第２図は
第１図の―断面図、第３図Ａ乃至Ｄは製造工
程図、第４図は従来技術の説明図である。
１…半絶縁性ＧａＡｓ基板、２…ｎ＋＋型高濃
度不純物層、３…ｎ−型動作層、４…シヨツトキ
電極、５…オーミツク電極、６…分離溝、７…ポ
リイミド、８…第１ビームリード電極、９…リー
ド電極、１０…第２ビームリード電極。
FIG. 1 is a top view of an embodiment of the present invention, FIG. 2 is a cross-sectional view of FIG. DESCRIPTION OF SYMBOLS 1...Semi-insulating GaAs substrate, 2...n ++ type high concentration impurity layer, 3...n - type active layer, 4...shot electrode, 5...ohmic electrode, 6...separation groove, 7...polyimide, 8...first beam Lead electrode, 9... Lead electrode, 10... Second beam lead electrode.
Claims (1)
によつて分離されて設けられている集積型半導体
装置において、分離溝はほぼ〈０１１〉〈０１１
〉方向に配されケミカルエツチングにより逆メサ
形状に形成されて、前記分離溝の〈０１１〉〈０
１１〉方向に形成されてある素子の分離をなして
いる事を特徴とする集積型半導体装置。 In an integrated semiconductor device in which a plurality of elements are separated by isolation trenches and have a {100} plane as the main surface, the isolation trenches are approximately <011><011
〉 direction, and is formed into an inverted mesa shape by chemical etching, and the separation grooves 〈011〉〈0
An integrated semiconductor device characterized in that certain elements are separated by being formed in the 11> direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10778185U JPS6217137U (en) | 1985-07-15 | 1985-07-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10778185U JPS6217137U (en) | 1985-07-15 | 1985-07-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6217137U true JPS6217137U (en) | 1987-02-02 |
Family
ID=30984374
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10778185U Pending JPS6217137U (en) | 1985-07-15 | 1985-07-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6217137U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58116834A (en) * | 1980-11-10 | 1983-07-12 | ゼロツクス・コ−ポレ−シヨン | Community line transmitter |
| JPS58220537A (en) * | 1982-06-17 | 1983-12-22 | Kokusai Electric Co Ltd | Circuit supervising and controlling method of data terminal station |
| JPS5991527A (en) * | 1982-11-17 | 1984-05-26 | Hitachi Ltd | Controlling method of priority of bus |
-
1985
- 1985-07-15 JP JP10778185U patent/JPS6217137U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58116834A (en) * | 1980-11-10 | 1983-07-12 | ゼロツクス・コ−ポレ−シヨン | Community line transmitter |
| JPS58220537A (en) * | 1982-06-17 | 1983-12-22 | Kokusai Electric Co Ltd | Circuit supervising and controlling method of data terminal station |
| JPS5991527A (en) * | 1982-11-17 | 1984-05-26 | Hitachi Ltd | Controlling method of priority of bus |
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