JPS6216795Y2 - - Google Patents
Info
- Publication number
- JPS6216795Y2 JPS6216795Y2 JP9206981U JP9206981U JPS6216795Y2 JP S6216795 Y2 JPS6216795 Y2 JP S6216795Y2 JP 9206981 U JP9206981 U JP 9206981U JP 9206981 U JP9206981 U JP 9206981U JP S6216795 Y2 JPS6216795 Y2 JP S6216795Y2
- Authority
- JP
- Japan
- Prior art keywords
- inverting
- input terminal
- resistor
- diode
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000006641 stabilisation Effects 0.000 claims 1
- 238000011105 stabilization Methods 0.000 claims 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Description
【考案の詳細な説明】
この考案はテレビジヨン受像機の受像管の陽極
等に供給する高圧電圧を安定化する高圧安定化回
路に関する。[Detailed Description of the Invention] This invention relates to a high voltage stabilizing circuit that stabilizes the high voltage supplied to the anode of the picture tube of a television receiver.
一般にテレビジヨン受像機における高圧は、水
平偏向回路で発生する帰線パルス（フライバツク
パルス）をフライバツクトランスで昇圧して得て
いる。この高圧の負荷特性は第１図に示すよう
に、負荷電流ＩH Generally, the high voltage in a television receiver is obtained by boosting the retrace pulse (flyback pulse) generated by a horizontal deflection circuit using a flyback transformer. As shown in Figure 1, the load characteristics of this high voltage are as follows: load current I H
Claims (1)
流が流される第１のダイオードと、この第１のダ
イオードのカソードが第１の抵抗を介して一方の
入力端子に接続され、アノードが第２のダイオー
ドと第２の抵抗の直列回路を介して他方の入力端
子に接続され、差動増幅器として働く演算増幅器
と、この増幅器の差動増幅出力が第３の抵抗を介
して反転入力端子に加えられる反転増幅器と、こ
の反転増幅器の反転増幅出力がベースに加えら
れ、エミツタは第４の抵抗を介して前記反転増幅
器の反転入力端子に接続されるとともに第５の抵
抗を介して接地された容量制御トランジスタと、
前記反転増幅器の非反転入力端子に対してバイア
スを設定するように正負電源間に複数の抵抗を直
列接続したバイアス回路とを具備したことを特徴
とし、前記トランジスタのコレクタ出力によつて
前記フライバツクトランスのフライバツクパルス
幅及び波高値を制御するようにした高圧安定化回
路。 A first diode through which a high-voltage load current generated by the flyback transformer flows, a cathode of the first diode is connected to one input terminal via a first resistor, and an anode is connected to the second diode and the second diode. an operational amplifier connected to the other input terminal via a series circuit of two resistors and acting as a differential amplifier; and an inverting amplifier whose differential amplified output is applied to the inverting input terminal via a third resistor. , a capacitance control transistor having a base to which the inverting amplified output of the inverting amplifier is applied, an emitter connected to the inverting input terminal of the inverting amplifier via a fourth resistor and grounded via a fifth resistor;
The invention is characterized by comprising a bias circuit in which a plurality of resistors are connected in series between positive and negative power supplies so as to set a bias for the non-inverting input terminal of the inverting amplifier, and the flyback is controlled by the collector output of the transistor. A high voltage stabilization circuit that controls the flyback pulse width and peak value of the transformer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9206981U JPS6216795Y2 (en) | 1981-06-22 | 1981-06-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9206981U JPS6216795Y2 (en) | 1981-06-22 | 1981-06-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57203680U JPS57203680U (en) | 1982-12-24 |
| JPS6216795Y2 true JPS6216795Y2 (en) | 1987-04-27 |
Family
ID=29887121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9206981U Expired JPS6216795Y2 (en) | 1981-06-22 | 1981-06-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6216795Y2 (en) |
-
1981
- 1981-06-22 JP JP9206981U patent/JPS6216795Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57203680U (en) | 1982-12-24 |
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