JPS62165575U - - Google Patents

Info

Publication number
JPS62165575U
JPS62165575U JP4341987U JP4341987U JPS62165575U JP S62165575 U JPS62165575 U JP S62165575U JP 4341987 U JP4341987 U JP 4341987U JP 4341987 U JP4341987 U JP 4341987U JP S62165575 U JPS62165575 U JP S62165575U
Authority
JP
Japan
Prior art keywords
card
contact pin
pin groups
wafer
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4341987U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4341987U priority Critical patent/JPS62165575U/ja
Publication of JPS62165575U publication Critical patent/JPS62165575U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは、従来の半導体装置測定用プロ
ーブカードの平面図および側面図、第2図a,b
および第3図は本考案による半導体装置測定用プ
ローブカードの実施例を示すもので、第2図aは
平面図、第2図b、第3図はそれぞれ側面図であ
る。 1…プローブカード、2,21,22,23…
接触ピン、3…金属配線、4…カードの開口、1
0…半導体ウエハー、11,11′,11″,1
1…ダイ区域、12,12′,12″,12
…金属パツド。
Figures 1a and b are a plan view and a side view of a conventional probe card for measuring semiconductor devices, and Figures 2a and b are
3 shows an embodiment of a probe card for measuring semiconductor devices according to the present invention, in which FIG. 2a is a plan view, and FIGS. 2b and 3 are side views, respectively. 1... Probe card, 2, 21, 22, 23...
Contact pin, 3... Metal wiring, 4... Card opening, 1
0...Semiconductor wafer, 11, 11', 11'', 1
1...Die area, 12, 12', 12'', 12
...Metal pad.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] カードと、このカードの一つの開口部において
ウエハー上で一列に配置され互いに隣合つた複数
の集積回路ダイの配置位置に対応して設けられ、
該ダイ上のパツドに接触する複数組の接触ピン群
と、これら接触ピン群を上記カードの測定装置用
端子に接続するカード上に設けられた配線とを具
備したことを特徴とする半導体装置測定用プロー
ブカード。
a card and a plurality of integrated circuit dies arranged in a row and adjacent to each other on the wafer in one opening of the card;
Semiconductor device measurement characterized by comprising a plurality of contact pin groups that contact pads on the die, and wiring provided on the card that connects these contact pin groups to measuring device terminals of the card. Probe card for.
JP4341987U 1987-03-26 1987-03-26 Pending JPS62165575U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4341987U JPS62165575U (en) 1987-03-26 1987-03-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4341987U JPS62165575U (en) 1987-03-26 1987-03-26

Publications (1)

Publication Number Publication Date
JPS62165575U true JPS62165575U (en) 1987-10-21

Family

ID=30860258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4341987U Pending JPS62165575U (en) 1987-03-26 1987-03-26

Country Status (1)

Country Link
JP (1) JPS62165575U (en)

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