JPS62163481A - Multidisplay device for video tex - Google Patents

Abstract

PURPOSE:To generate a summarized large screen by accumulating decoded, data by supplying a synchronization control signal to plural pieces of decoders placed in a serial relation, from an information generating means, and taking the synchronization of a signal processing of each decoder. CONSTITUTION:Against a controller 1 being an information generating means, plural pieces of decoders 3A-3I are provided in the serial relation to each other, and also, in accordance with these plural pieces of decoders 3A-3I, indicators 4A-4I are provided. In this state, from the controller 1, a synchronization control signal is supplied to plural pieces of decoders 3A-3I, and the synchronization of a signal processing of each decoder 3A-3I is taken. In this way, by accumulating the decoded data, plural screens can be synchronized and displayed, such as the summarized large screen can be generated.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A. Field of industrial application B. Overview of the invention C. Prior art D. Problems to be solved by the invention E. Means for solving the problems (Fig. 1) F. Effect G. Circuit configuration of Embodiment 01 (Fig. 1 - Figure 3) Enlarged/reduced display of G2 screen (Figures 4 and 5) G3 enlarged data conversion
(Figures 6 and 7) G4 bezel correction (Figures 8 and 9) GsrD number assignment (Figures 10 and 11)
Figure) GLI external synchronization (Figures 12 and 13)
G7 flow control (Fig. 14, Fig. 15)■]
Effects of the Invention A: Industrial Field of Application The present invention relates to a Videotex multi-display device suitable for use when obtaining enlarged/reduced screens using a plurality of displays based on Videotex information.

B. Summary of the Invention This invention supplies a synchronization control signal to a plurality of decoders arranged in series from an information generating means that generates information based on internal or external data, and synchronizes the signal of each decoder. By synchronizing the processing, multiple internal surfaces can be displayed in synchronization.

C. Conventional technology Recently, department stores, shopping centers, station concourses,
Many multi-screen systems are used at show venues to attract customers. These multi-screen systems are
Generally, a digitizer, multiple VTRs, disk players, etc. are used to capture a single analog video signal, digitally process the captured analog video signal, and then convert it into multiple analog video signals, each of which can be displayed on multiple displays. I'm trying to type it in.

D. Problems to be Solved by the Invention However, in the case of the conventional system as described above, it is difficult to display multiple screens in synchronization, especially when blinking across multiple display areas. It was difficult to blink in the same way.

The present invention has been made in view of the above-mentioned problems, and an object thereof is to provide a Videotex multi-display device that can display multiple screens in synchronization.

E. Means for Solving the Problems The Videotex multi-display device according to the present invention includes an information generating means (1) that generates information based on internal or external data;
A plurality of decoders (3Δ
)~(3I) and these multiple decoders (38)~(
3I), and the information generating means (1) performs synchronous control over the plurality of decoders (3A) to (3I). It is configured to supply signals and synchronize the signal processing of each decoder.

F. A controller (3A) to (3I) is provided in series with the controller (11) as an action information generating means, and a plurality of decoders (3A) to (3I) are provided in series with each other.
Indicators (4^) and (4I) are provided corresponding to (2).

Then, the controller (11) has multiple decoders (3A
) to (3I) to synchronize the signal processing of each decoder. This allows you to store decoded data and display multiple screens synchronously, such as creating a large screen all at once.

G. Example Hereinafter, an example of the present invention will be described in detail based on FIGS. 1 to 15.

G1 Circuit Configuration FIG. 1 shows the overall configuration of this embodiment. In the figure, (1) is a controller as an information generating means that generates information based on internal or external data, A keyboard (2) and a printer (not shown) are connected. Controller (11 is communication
ICATION (hereinafter referred to as COM) boat and auxiliary (
ALIXILIARY (hereinafter referred to as AUX) boat receives internal/external databases on the 00M boat, performs signal processing, and then transmits from the AUX boat.

A plurality of decoders (3A) to (3I), for example, nine decoders, are provided in series with the controller (1),
Each decoder (38) to (3■) is 00M boat, AUX
Have a boat. The 00M port of the decoder (3A) is interconnected with the AUX port of the controller (11), and the AUX port of the decoder (38) is connected to the 00M port of the decoder (3B).
The AUX port of the decoder (3B) is interconnected with the C0M port of the decoder (3C), and the AUX port of the decoder (3C) is interconnected with the C0M port of the decoder (3D).
00M boat, and so on, substantially from the controller (1) to the last decoder (
up to 3I), each 00M boat and A
Bidirectional transmission is possible between UX boats.

In addition, the display (
48) to (4I) are provided, and these indicators (48)
The outputs of the decoders (3^) to (3I) are supplied to the decoders (3^) to (4I), respectively. In other words, using the mXn screen configuration as an example, 3X3 (9) displays (48) to (4I)
This is the case when it is formed using

The controller (1) may have a configuration as shown in FIG. 2, for example. That is, in the same figure, (1
0) is a central processing unit (hereinafter referred to as CPU),
For this CPU (10), the system ROM (11
), work RAM (12), video RAM (1
3) A color palette memory (14), an I10 interface (15) and a floppy disk interface (16) are provided. I10 interface (15
) is provided with the above-mentioned C0M port and AUX port, and this I10 interface (15) generates a synchronization control signal for synchronizing each decoder as described later.

A D/A conversion circuit (17) is provided on the output side of the display video RAM (13) and color palette memory (14). Further, a CRT controller (30) is provided for the CPU (10), and this CRT controller (3
0) is D in response to the drawing command from CPtJ (10).
A drawing instruction is given to the /A conversion circuit (17). And D/
The signal D/A converted by the A conversion circuit (17) is processed by the video signal processing circuit (18) to form R, G, and B color signals, which are supplied to the display (19). The address position of the video RAM (13) and the display (19)
) has a one-to-one correspondence with the pixel positions on the screen.

The decoders (38) to (3I) may have a configuration as shown in FIG. In other words, in the same figure, (
20) is a CPU, and this CPU (20) has a system ROM (21) and a work RAM (22).
, a video RAM (23), a color palette memory (24) and an I10 interface (25). The I10 interface (25) is provided with the above-mentioned C0M port and AUX port.
The above-mentioned synchronous control signal is supplied to the 10 interface (25).

A D/A conversion circuit (26) is provided on the output side of the display video RAM (23) and color palette memory (24). Further, a CRT controller (40) is provided for the CPU (20).
0) is D/D in response to a drawing command from the CPU (20).
A drawing instruction is given to the A conversion circuit (26). And D/A
The signal D/A converted by the conversion circuit (26) is processed by a video signal processing circuit (not shown) to become R, G, and B color signals and displayed on one of the corresponding displays (48) to (4I). supplied to. In other words, the configuration of the decoder is the controller (
Same configuration as 1) (and of course I10 interface (
25) may be provided with a keyboard, printer, etc.

G2 Screen Enlargement/Reduction Display Next, the enlargement/reduction display of the screen will be explained with reference to FIGS. 4 and 5. First, the program is started in step (a), and the CPU (10) reads out the drawing commands written in the form of bit strings on the disk (not shown) via the floppy disk interface (16) and stores them in the work RAM (12). In step (B), the operands of the drawing command are analyzed to calculate the logical (on the unit screen') X-Y coordinates, and the coordinates P (x, y ). Next, the coordinates P (x, y) obtained in step (c) are multiplied by α (
However, α is the scaling factor and α≧O), and X=αx,
Coordinates P' (X
, Y).

Determine whether the value of
Proceed to step (g) and end γ.

If O≦X≦1, proceed to step (e), judge whether the value of Y obtained here is 0≦Y≦1, and 0≦Y≦
If it is not 1, drawing cannot be performed, so proceed to step (g) and end. If 0≦Y≦1, the process advances to step (to) and such coordinate information is written to the address of a predetermined position in the video RAM (13).

At this time, the address V of the predetermined position of the video RAM (13)
-RAMadd is V-RAMadd as shown in Figure 5B.
It is determined by d=αyXmax+αX. In other words, FIG.
), and X max is, for example, 256 (
Y max represents 200 pixels. Point P', represented by (αX, αy) in FIG. 5B, is the position where the scaled coordinates are drawn.

The scaling coordinate information written in the video RAM (13) in this way is read out under the control of the CRT controller (30), and information representing color intensity from the color palette memory (14) is added. The signal is then D/A converted by the D/A conversion circuit (17) and then sent to the video signal processing circuit (18).
) is supplied to R, G.

A B color signal is formed and displayed on the display (19).

In addition, the enlargement/reduction information read from the video RAM (13) is attached with an ID (by III) number corresponding to each decoder, and is added to the A of the I10 interface (15).
It is supplied from the UX boat to decoders (3A) to (3I). Each of the decoders (3^) to (3I) takes in information to which its own ID number is added, decodes it, and displays it on the corresponding display device (4A) to (4■).

As a result, if the information given to all decoders (3A) to (3■) is enlarged information, the display devices (4^) to (4■
), a large screen can be obtained, and if the information is reduced, the same single screen can be obtained on each of the displays (4A) to (4). Of course, other display methods are also available; for example, displays (4A), (4B), (40), and (
11J is also possible, such as a combination of the middle side and a single screen where the middle side is displayed by 4E) and the others are ll-screens, or a single screen is inserted after the -fire-directing screen is displayed.

It is also possible to monitor a single double-sided screen on the display (19) of the controller (1) while displaying the -direction screen on the displays (4A) to (4).

G3 Enlarged Data Conversion Next, the case of converting original data into enlarged display data corresponding to each decoder will be explained with reference to FIGS. 6 and 7. First, the program is started in step (a), the drawing command consisting of a bit string written on the disk via the floppy disk interface (16) is read out and expanded to the work RAM (12), and the drawing command is executed in step (b). The logical X-Y coordinates are calculated by analyzing the operands of P (x, y), and the value of P (x, y) is determined.

Next, in step (c), P' (nx-x+ my-
Find the X-Y coordinates enlarged by j). Ta Qshin (
This is data for an (i, j) decoder with a double-sided configuration (horizontal) x m (vertical). Here, t, J is l=0~n-1, j=0
~m-1. Then, in step (d), P'
(nx-L my-j) to encode the drawing command. In other words, the enlarged X-Y coordinates are returned to normal drawing commands. As a result, the decoder side can obtain an enlarged display by decoding normally without being aware of enlargement.

Determine whether all (i, j) have been calculated in step (E), that is, whether the enlarged display data has been converted for all decoders. If the calculation has not been performed, proceed to step (1). ．． Change the value of j and repeat the same operation as described above. When all (i, j,) have been calculated, the program proceeds to step (g) and ends the program.

By the way, n=3. Data conversion for three times enlarged display will be explained with m=3 using FIG. In Figure 7, O~■
corresponds to decoders (3^) to (3■), and (i, J)
i is 0.1.2, j is o, i.

2 and none, the decoder of ■ is (0, 0), the decoder of ■ is (1, 0), the decoder of ■ is (2, O), the decoder of ■ is (0, 1), the decoder of ■ is (1゜1), the decoder of ■ is represented by (2, 1), the decoder of ■ is represented by (0, 2), the decoder of ■ is represented by (1, 2), and the decoder of ■ is represented by (2, 2). Then, using P'(nx-i, my-j), the coordinates P(x, y) of the original data are ζ,
It is converted as follows.

■ Decoder...P' (3x, 3y) ■Decoder...P' (3 to -L 3y) ■Decoder...
Decoder of P' (3x-2, 3y)...P'
(3x, 3y-1) ■ Decoder - P'
Decoder of (3x-1, 3y-1) ■...P' (3 to -2, 3y-1)■ Decoder...P' (3x
, 3y-2)■ Decoder...P'(3χ-1,3
y-2)■ Decoder - P' (3x-2, 3y
-2) Therefore, the drawing command that draws a line from (xt, yt) toward (xt, y2) is for the decoder (3) from (3xz, 3y1) to (
3X2.

For the decoder of the line ■ heading towards 3y2), from (3χ-L 3y) to (3
-L3y2) corresponds to the line from <3x1-2.3yx-2) to (3X2-2.3y2-2) for the decoder of line (3).

Here, the relationship between the ID number and the decoder (t, j) is expressed as ID=jn+i. For example, the decoder for (0,0) is 0 (decoder for ■), and the decoder for (1,0) is 1
(Decoder of ■)... The decoder of (2, 2) is 8
It's like (■ decoder).

G4-, Bezel correction Now, when displaying one screen with multiple displays, the frame (bezel) of the display unit becomes a problem, and it is desirable to use multiple displays so that there is no frame even if there is a frame. I want to display the screen on a display. That is, when a single screen is displayed using a plurality of display devices, a difference in level inevitably occurs between the frames of adjacent display devices, and the displayed screen becomes unnatural. A method for solving this problem will now be described with reference to FIGS. 8 and 9. First, start the program in step (a), read out the coordinates written as a bit string on the disk via the disk interface (I6), expand them to the work RAM (12), and draw them in step (b). Analyze command operands to create logical X-Y
Calculate the coordinates and find the value of P (x, y).

Find the X-Y coordinates enlarged by α α. Here, α is the display rate and has the relationship O≦α≦1. This X-Y coordinate is data for an (i,j) decoder with an nxm screen configuration. Then, in step (d), it is determined whether all (t, j) have been calculated in step (e), that is, whether the above coordinates have been obtained for all decoders, and if they have not been calculated, step Proceed to step (3), change the values of l and j, and repeat the same operation as described above. And all (1+
When the calculation for j) is completed, proceed to step (day) and end the program.

In connection with the operation shown in FIG. 8, the display state of the display on the decoder side will be explained using FIG. 9. In FIG. 9, a is a physical display area that can be displayed on the display, and b is a frame of the display that includes a border and a bezel portion. Therefore, FIG. 9 shows two displays with adjacent frames. When the X-YJi mark P (x, y) is determined in step (b) of FIG. 8, it is displayed in the table area a of the display on the decoder side. Further, C represents a straight line drawn within the two display@areas a. When the enlarged X-Y coordinates are obtained in step (c) of Fig. 8, this is shown in Fig. 9A, although not shown.
is displayed within an enlarged virtual display frame indicated by a broken line d. This enlarged virtual display frame is shown in FIG.
As shown in B, these are the coordinates obtained in step (d) of the origin diagram. Then, as can be seen from FIG. 9B, the virtual display frame almost matches the actual frame. At this time, the straight line C shown in FIG. 9A is displayed at a slightly lower position in FIG. 9B. However, the linearity of the straight line C in the left display area and the straight line C in the right display area is maintained. In other words, there is no difference in level between the frames of adjacent display devices.

Next, the procedure for allocating an ID number to each decoder will be explained with reference to FIGS. 10 and 11. First, step (a)
Start the program with step (b) and start the decoder (3A
) is the ID as shown in Figure 1θ from controller (1).
Check whether the allocated data sequence is being sent. In step (c), the decoder (3A) determines whether the information sent from the controller (11) indicates that the ID assignment is a data sequence, and if not, it proceeds to step (to) and ends the program. If so, the ID number included in the data sequence is stored and saved as its own ID number.Then, it is initialized.

Next, the decoder (3A) increments its own ID number by one in step (e), and then the next stage decoder (3B)
The ID number is output to the AUX port, and the program ends at step (to).

Similarly, the decoder (3B) stores the ID number supplied from the decoder (38) as its own ID number, and is initialized. Then, the decoder (3B) increments its own ID number by one and outputs it to the AUX port as the ID number of the next stage decoder (3C). Below (3D)
Similar operations are performed sequentially for decoders (38) to (3), and the assignment of ID numbers to all decoders (38) to (3) is completed.

G6 external synchronization Next, when applying external synchronization to each decoder, in other words, the decoder (3A
) to (Fig. 12 and 1 show the case where all three are driven simultaneously.
This will be explained with reference to FIG. Figure 12 shows the controller (1
1, the first diagram shows the operations of the decoders (38) to (3I). First, the program is started in step (A), and in step (B), the controller (11 sets the synchronous control signal output from the I10 interface (15) to one level, for example, low level. Next, in step (C)
Then, the controller (1) sends all data to the decoders (3A) to (3). In step (d), the controller +1+ sets the synchronous control signal output from the I10 interface (15) to the other level, for example, high level, after all data transmission is completed. End the program at step (E).

On the other hand, each of the decoders (3A) to (3) starts a program in step (a), and receives data from the 00M boat in step (b). In step (c), the received data is output to the AUX port.

In step (d), it is determined whether the synchronous control signal supplied from the I10 interface (15) of the controller (1) to the I10 interface (25) of each decoder is at high level, and if it is not high level, that is, it is low level. If so, return to step (B), and if the level is high, proceed to step (E) and start decoding the data. In step (v), it is determined whether the data has ended Y or not, and if the data has not ended, the process returns to step (d), and if the data has ended, it has proceeded to step (g) to end the program.

In other words, the decoders (38) to (3■) are the controller (
While the synchronization control signal from 1) is at low level, data is only taken in and no decoding is performed, and when the synchronization control signal becomes high level, decoding starts all at once.

G7 Flow Control Next, when an overflow of data in a serially connected decoder is detected, the flow control procedure for instructing the preceding decoder to stop outputting data will be explained with reference to FIGS. 14 and 15. .

First, in FIG. 14, the controller (11) has a transmit buffer TC, a receive buffer TR, a transmit buffer TA, and a receive buffer RA on the work RAM (12) for the 00M boat and the AUX port, respectively. Only the transmitting buffer TA and receiving buffer RA on the AUX boat side are shown.In addition, each decoder also stores a transmitting buffer TC, a receiving buffer RC, a transmitting buffer TA and a transmitting buffer TA on the work RAM (12) for the 00M boat and the AUX boat. It has a reception buffer RA, and
Transmission buffer TA of AUX boat of controller (1)
The data of the decoder (3A) is transmitted to the receive buffer RC of the 00M boat, and the data of the transmit buffer TC of the phantom 00M boat of the decoder (3A) is transmitted to the A of the controller (1).
It is transmitted to the receive buffer RA of the UX port. In other words, it is considered to be bidirectional transmission. Also, the AU of the decoder (3A)
The data in the transmission buffer TA of the X boat is sent to the decoder (3B
) is transmitted to the reception buffer RC of the 00M boat of the decoder (3B), and the data of the transmission buffer TC of the 00M boat of the decoder (3B) is transmitted to the reception buffer R of the AUX boat of the decoder (3A).
It is transmitted to A. In other words, in this case as well, the transmission is bidirectional. Bidirectional transmission is also possible between other decoders.

In such a configuration, for example, a decoder (
The operations between 3A) and (3C) will be explained with reference to FIG. The program starts at step (A) and steps (
In b), whether or not the receive buffer RC of the 00M boat of the decoder (3B) is full, that is, the receive buffer RC
It is determined whether or not the buffer has overflowed, and if it becomes full, a transmission stop signal Xoff is outputted to the transmission buffer TC of the 00M boat of the decoder (3B) in step (c).

This transmission stop signal Xoff is received by the reception buffer RA of the AUX port of the preceding decoder (38), and the decoder (38) stops transferring data to the decoder (3B). If it is not full at step (B), step (
Proceed to step d).

In step (d), it is determined whether the reception buffer RA of the AUX port of the decoder (3B) is full or not, and when it is full, the transmission stop signal Xoff is sent to the transmission buffer TA of the AUX port of the decoder (3B) in step (e). Output. This transmission stop signal Xoff is sent to the subsequent decoder (3C
) is received by the reception buffer RC of the 00M port, and the decoder (3C) stops transferring the data to the decoder (3B). If it is not full in step (d), proceed to step (go).

In step (to), it is determined whether or not the transmission stop signal
Proceed to. In step (g), it is determined whether there is space in the reception buffer RC of the 00M boat of the decoder (3B),
If there is space, a transmission restart signal Xon is output to the transmission buffer TC of the 00M boat of the step boil decoder (3B). This transmission restart signal Xon is sent to the previous stage decoder (3A)
The decoder (38) resumes transferring data to the decoder (3B). If the transmission stop signal Xoff is not output in step (g) and there is no free space in the reception buffer RC in step (g), the process advances to step (w).

In step (S), it is determined whether the transmission stop signal Xoff has been output to the transmission buffer TA of the ALJX boat of the decoder (3B), and if it has been output, the process advances to step (N). Decoder (3B) AUX in step (nu)
It is determined whether there is space in the reception buffer RA of the boat, and if there is space, the A of the decoder (3B) is
A transmission restart signal Xon is output to the transmission buffer TA of the UX boat. This transmission restart signal Xon is sent to the subsequent decoder (
3C) is received by the reception buffer RC of the 00M port,
The decoder (3C) resumes transferring data to the decoder (3B). Then, step (wo) ends the program. If the transmission stop signal Xoff is not output in step (S) and there is no space in the reception buffer RA in step (N), the program proceeds to step (W) and ends.

Similar operations are possible between the controller Q-(1) and the decoder (38) and between each decoder.

Effects of the Invention H As described above, according to the invention, a synchronization control signal is supplied from the information generating means to a plurality of decoders arranged in series to synchronize the signal processing of each decoder. Therefore, data after decoding can be stored and multiple screens can be displayed in synchronization, such as when creating a large screen at once.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of a controller used in FIG. 1, and FIG. 3 is a block diagram showing an example of a decoder used in FIG. 1. The configuration diagram, FIGS. 4 and 5 are a flowchart and diagram, and FIGS.
The figures are a flowchart and diagram for explaining enlarged data conversion, Figures 8 and 9 are flowcharts and diagrams for explaining bezel correction, and Figures 10 and 11 are ID numbers, respectively. Figures 12 and 13 are flowcharts and diagrams for explaining external synchronization, respectively, and Figures 14 and 15 are configurations for explaining flow control, respectively. 2 is a diagram and a flowchart. (1) is the controller, (2) is the keyboard, (3A)
~(3I) is a decoder, and (4^) ~(4I) are indicators.

Claims (1)

[Claims] Information generating means for generating information based on internal or external data; a plurality of decoders disposed in series with the information generating means; and the plurality of decoders. and a plurality of corresponding display devices, and the information generating means supplies a synchronization control signal to the plurality of decoders to synchronize the signal processing of each decoder. Features of Videotex's multi-display device.