JPS6215833A - Method and apparatus for ion beam machining - Google Patents

Abstract

PURPOSE:To prevent damage on the lower layer and to cut the wiring on the upper layer completely, when a semiconductor device such as VLSI is machined as a material to be machined, by detecting the fact that a signal between the pads on the material to be machined is changed accompanied by the machining, and controlling the machining. CONSTITUTION:An ion beam 2 is taken out of an ion source 1 and focused and deflected. The beam is projected on a target 30, and machining is carried out. At this time, wirings 31 are taken out of pads on the target 30 through a table 29. The resistance values between the pads effective for machining monitoring are monitored by a resistance monitor device 32. The resistance monitor device 32 sends an ON signal to a blanking power source 17 when the measured resistance value exceeds a preset resistance value RA (resistance value that is considered to be infinite effectively). The beam is cut off and the machining is stopped.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an ion beam processing method and apparatus, and particularly relates to an ion beam processing method and apparatus suitable for processing semiconductor devices such as VSLIs as workpieces. .

[Background of the invention]

In order to respond to the miniaturization of pattern dimensions in semiconductor devices such as VLSI, it is essential to establish micro ion beam processing technology. As the degree of integration of semiconductor devices increases, it has become necessary to miniaturize pattern dimensions and adopt a multilayer wiring structure to improve the degree of integration.

In a semiconductor device having such a multilayer structure, when performing processing such as wiring cutting, it is important to completely process the upper layer to be processed without damaging the lower layer. For example 2
The thickness of the interlayer insulating film of the layer wiring is approximately 1 μm, and when cutting only the upper layer wiring at a portion of the crossover between the upper layer wiring and the lower layer wiring, the thickness of the interlayer insulating film is at least 0.25 μm in order to maintain the withstand voltage of the interlayer insulation film. It is necessary to detect and control the cutting end point of the upper layer wiring with the following accuracy.

In addition, VLSI wiring cutting by ion beam processing is
Since cutting is mainly performed for the purpose of circuit modification, there is an increasing demand for directly monitoring changes in the circuit characteristics of the processed portion while cutting the wiring.

Here, the basic configuration of the conventional ion beam processing device is explained in the 8th section.
This will be explained using figures. A voltage is applied between the ion source 1 and the extraction electrode 6 to extract the ion beam 2, and the beam is focused onto the target 9 by the focusing lens 4. In addition to the electrode 5, the ion optical system includes a beam defying aperture 5. Blanking electrode 6. A blanking aperture and a deflector electrode 8 are provided. A voltage is applied to the blanking electrode 6 from a blanking power supply 17 to deflect the beam at high speed, and the beam is turned on and off on the target 9. A beam deflection voltage is applied to the deflector electrode 8 from a deflector controller 14. 4. Furthermore, the same deflection voltage is also applied to the deflection electrodes of the CRT 15. At this time, the secondary electrons 11 generated from the target 9 are detected by the detector 12.
CRT1 with the signal detected by the head amplifier 13 and amplified by the head amplifier 13.
Apply brightness modulation to 5. In this way, target 9
Secondary electrons on the surface are obtained and the surface of the target 9 to be processed is observed using a scanning ion microscope using the same principle as a scanning electron microscope. As a result, processing positioning is performed, and the sample current is taken out from the table 10 and measured by the ammeter 16.

In this conventional ion beam processing device, no particular consideration is given to detecting the end point of processing, and processing control in the depth direction is performed by monitoring the processing time or the leakage current of the ion beam flowing from the target, that is, the sample current. It is carried out in

However, controlling the machining depth by the machining time makes it difficult to control the machining depth with high accuracy as described above. In addition, controlling the machining depth using the sample current has problems with reliability as a machining depth monitor because the sample current varies widely depending on the material, structure, and machining method of the workpiece. .

In addition, as related to this type of micro ion beam device, ISIA
Boy (WzL, Born) O and Wagner (A
, Wagner) [Fine Leaf Orcust Ion Beams New Tool for Technology J (FinelyFocused Ion Bea)
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[Purpose of the invention]

An object of the present invention is to provide an ion beam processing method and an apparatus for processing a semiconductor device such as a VLSI as a workpiece, which can completely cut the wiring in the upper layer without damaging the lower layer. be.

[Summary of the invention]

In the present invention, when processing a workpiece, especially a semiconductor device such as a VLSI, wires are taken out from a pad of the workpiece or a bottle when packaged, and changes due to processing of signals obtained from those wires are detected. Monitor.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 7.

FIG. 1(cL) is a plan view of a portion to be processed of a VLSI, which is a workpiece. For simplicity, it is assumed that pad 18 and pad 20 are connected by A1 wiring 21, and through upper layer A1 wiring 22 extending from pad 19,
Consider processing the part to be processed 2S and cutting the lower layer A1 wiring 21. FIG. 1 is a sectional view taken along line 4-4 in FIG. 1(a).

What is important at this time is that the lower layer A1 wiring 21 is completely disconnected, that the upper layer A1 wiring 22 and the lower layer A1 wiring 21 are not short-circuited, and that the dielectric strength voltage between the lower layer A1 wiring 21 and the SL board is maintained sufficiently. This includes things like: With this processing, the resistance value between the pads 18 and 20 changes from an initial constant value to infinity, as shown in FIG. 1(G). Therefore, as shown in FIG. 1(cL), the pad 18
By monitoring the resistance value between the pad 20 and the pad 20 with the resistance meter 24, it becomes possible to directly monitor the cutting process of the A1 wiring 21.

The processing end point is determined by lower layer A, as shown in Figure 1 (6).
1 The resistance value RA that is considered to have effectively cut the wiring 21
(For example, in actual device wiring, about 10 MΩ) may be set as the end point of processing. In addition, by making it possible to monitor the resistance value between arbitrary pads, it is possible to check whether there is a short circuit between the upper layer A1 wiring 22 and the lower layer A1 wiring 21, and to check the insulation between the lower layer N1 wiring 21 and the SL board. It should be possible to process while simultaneously monitoring whether or not it is sufficiently maintained.

In most actual devices, a circuit is formed between the pads using transistors, capacitors, etc. In that case as well, it is possible to monitor the wiring cutting process in the same manner as above by monitoring the forward resistance value, for example when a P-n junction exists between pads.

Here, regarding the extraction of wiring from the pads, in the case of a scribed LSI chip, signals are directly extracted from the pads using a blower or the like. The case of a packaged sample is shown in FIG. In FIG. 2, connector pins 2 are connected to each pad of a sample 26 in which an LSI chip 25 is packaged.
7 into the insertion socket 28 of the table 29. Wires are taken out from each band through their sockets 28 and pads to be monitored by resistance meters 24.
Monitor the resistance value between 1 and 1.

FIG. 3 shows the basic configuration of an ion beam processing apparatus that monitors processing based on the above-described principle. An ion beam 2 is extracted from an ion source 1, focused and deflected, and irradiated onto a target 60 for processing. At this time, the wiring 61 is taken out from each pad of the target 30 through the table 29. A resistance monitoring device 52 monitors the resistance value between the pads, which is effective for processing monitoring, through these wirings. In the resistance monitoring device 62, when the measured resistance value exceeds a certain resistance value R (resistance value considered to be effectively infinite), it sends an on signal to the blanking power supply 17, cuts off the beam, and starts processing. stop.

A second embodiment of the present invention will be described based on FIGS. 4 and 5. FIG. 4(a) shows V, which is a workpiece.

A schematic diagram of an LSI is shown. In this embodiment, similarly to the first embodiment, it is assumed that the pad 18 and the band 20 are connected by the A1 wiring 21, and the part to be processed 23 is processed through the upper layer A1 wiring 22 extending from the pad 19. Consider cutting the A1 wiring 21. The longitudinal section of the part to be processed is the same as that shown in FIG. 1 (4'). In this embodiment, as the ion beam irradiates the workpiece, the leakage current of the charge of the ion beam flowing to each pad is amplified by the head amplifier 65 and measured by the ammeter 34 to monitor the processing. It is something.

Conventionally, as mentioned above, with ion beam irradiation, S
=Processing was monitored by monitoring the current flowing into the substrate, that is, the sample current. However, this conventional method measures the current flowing into the SL substrate through the complex multilayer structure of the A1 wiring and the glabella insulating film, so depending on the structure of the processed part and the processing method, the reproducibility of sample current changes is poor and reliability is compromised. There was a problem. Therefore, in this embodiment, the AJ that is closest to the ion beam irradiation part both in plan and in terms of vertical structure is
-Processing is monitored using the current flowing into the wiring. Therefore, the reproducibility of current changes is good and reliability is improved.

FIG. 4(4) shows the results of monitoring the machining using this example in the machining shown in FIG. 4(a) described above. Leakage currents of the ion beam from pad 18 and pad 19 are shown in the figure by solid lines and broken lines, respectively. Initially, a current flows into the pad 19 through the passivation film (the Sb2. film on the top layer in FIG. 1 (4)), and the AJ-
When the processing reaches the wiring 22, a current IA corresponding to the sum of the beam current and secondary electron generation begins to flow. Thereafter, when the processing passes through the AL wiring 22, almost no current flows to the pad 19, and current begins to flow to the pad 18 through the glabella insulating film. When the processing progresses further and reaches the AJ wiring 21, almost the same current as the above-mentioned IA flows out of the band 18, and when it passes through the first wiring 21, that is, when the AJ wiring 21 is cut, almost no current flows in the pad 1. Therefore, this time TA can be set as the end point of machining.

FIG. 5 shows the basic configuration of an ion beam processing apparatus that monitors processing based on the above-described principle. In this embodiment, the leakage current of the ion beam flowing from the pad effective for processing monitoring is extracted through the wiring 61 taken out from each pad, and the signal amplified by the head amplifier 63 is monitored by the leakage current monitor device [i55]. . The leakage current monitor device 35 is inputted with leakage current changes in the workpiece part obtained through preliminary experiments in advance, and when it is determined that the end point of machining is reached, an on signal is sent to the blanking power supply 17 to cut off the beam. to stop machining.

A third embodiment of the present invention will be described based on FIGS. 6 and 7. FIG. 6(,) shows an 11 formula diagram of a VLSI, which is a workpiece. Pads 6'6 are two NOR logic gates 69
and AJ- are connected to pad 68 through wiring 42 and OR logic gate 40.

Here, consider processing the portion to be processed 46 through the upper layer A1 wiring 41 extending from the pad 37, and cutting the lower layer AJ-wiring 42. The longitudinal section of the processed part is shown in Figure 1 (A
). In this embodiment, the circuit characteristic test power supply 4
4, the test signal is input from pad 66, and the test signal is input from pad 58.
The output signal is monitored by the circuit characteristic monitor device 45, and the end point of the cutting process is determined based on the change in the output signal due to the cutting of the A1 wiring 42 in the middle of the circuit.

In the machining example shown in FIG. 6(a), a specific method of determining the machining end point according to this embodiment will be described below.

First, ECL logic gates are shown by symbols in FIG. 6(N). In the figure, ■ and ■ are the negative and positive outputs of the OR gate, respectively.

If the output is set to ■ for the input signal, it is a NOR logic gate,
■It becomes an OR logic gate. The relationship of the output signals to the inputs of the NOR and OR logic gates is shown in the following table.

H and L in the table indicate a high level signal and a low level signal, respectively. If the circuit between the pad 36 and the pad 38 in FIG. 6(a) is shown in a symbol using the logic gate symbol in FIG. 6(a), it becomes as shown in FIG.
The cutting location corresponding to the processed portion 46 in Figure (cL) is indicated by an X mark. Input/output relationships in the logic gates in the table above, and E
Since the open input of the CL logic gate is at a low level, the relationship between the input signal to the pad 36 and the output signal from the pad 68 changes as follows before and after the A1 wiring 42 is cut.

Therefore, if a high level signal is input to the pad 66 and the output signal from the pad 58 is monitored, the output signal changes from high level to low level, and the A1 wiring 4
2 can be confirmed.

In fact, wiring cutting by ion beam processing is often used to modify circuits for debugging. Therefore, for the pads that sandwich the circuit to be modified by cutting,
By using the method of this embodiment in which an input signal is applied to one pad and an output signal from another pad is monitored, it is possible to directly monitor wiring disconnection, that is, circuit modification, as a change in circuit characteristics.

Figure 7 shows the basic configuration of an ion beam processing device that monitors processing based on the principle described above. In this embodiment, an input signal is applied from the 0-circuit characteristic test lightning source 44 to one pad that sandwiches the circuit of the processed part that is effective for the processing monitor through the wiring 61 taken out from each pad, and the input signal is applied from the other pad. The output signal is monitored by a circuit characteristic monitor device [45]. The circuit characteristic monitor device 45 determines the end point of machining based on the change in the output signal from the workpiece 30, sends an on signal to the blanking power supply 17, cuts off the beam, and stops the machining.

〔Effect of the invention〕

According to the present invention, changes in circuit characteristics can be directly monitored and the end point of processing can be determined with high accuracy, so when processing a semiconductor device such as a VLSI as a workpiece and performing circuit correction, etc., damage to the underlying layer can be avoided. It is effective to completely cut the wiring on the upper layer without causing any damage.

[Brief explanation of drawings]

FIG. 1 (cL) is a VLS to which the first embodiment of the present invention is applied.
Schematic diagram of I, Figure (ra) is a cross-sectional view taken along line J-4 of Figure (,), Figure (5) is a graph showing the relationship between processing time and inter-pad resistance value, and Figure 2 is a VLSI ion FIG. 3 is a block diagram of the main parts of the beam processing apparatus, FIG. 3 is an overall block diagram of the ion beam processing apparatus according to the first embodiment, and FIG.
A schematic diagram of a VLSI to which the embodiment is applied, FIG. 5(b) is a graph showing the relationship between machining time and leakage current, and FIG.
Overall configuration diagram of the ion beam processing apparatus according to the embodiment, No. 6
Figure (a) is a schematic diagram of a VLSI to which the third embodiment of the present invention is applied, the figure (&) is an explanatory diagram of the EcLOR logic gate number, and the figure (Q) is the measurement of the VLSI shown in the figure (,). FIG. 7 is an overall configuration diagram of an ion beam processing apparatus according to the fifth embodiment, and FIG. 8 is an overall configuration diagram of a conventional ion beam processing apparatus. 1...Ion source, 2...Ion beam, 3...Extraction electrode, 4...
...Focusing lens, 5...Beam-defining aperture, 6...Blanking electrode, 7...Blanking aperture, 8...
- Deflector electrode, 14...Deflector controller, 17...
...Blanking power supply, 18, 19, 20. −−−−− Hara)”, 2
1.22-...AI wiring, 23...Processed part, 24...Resistance meter, 25...
...LSI chip, 26...Package,
27... Connector bin, 28... Socket, 29... Table, 60...
...Target, 61...Wiring,
32... Resistance monitor device, 36...
Head amplifier, 34...Ammeter, 65...
...Leakage current monitor device, 56.37.38...
...Pad, 39...NOR logic gate, 4
0...OR logic gate, 41.42...
・A1 wiring, 46...Processed part, 44
...Circuit characteristics test power supply, 45...Circuit characteristics monitor device.

Claims (1)

[Claims] 1. Processing the predetermined region by focusing an ion beam on a predetermined region of the workpiece, and detecting that a signal between pads of the workpiece changes with the processing. An ion beam processing method characterized by controlling the processing. 2. Consists of an ion source, an ion optical system, a table, a secondary particle detector, and a power controller that drives them.
An ion beam processing apparatus for processing a workpiece by focused irradiation with an ion beam, characterized in that the ion beam processing apparatus is provided with a detection means for detecting a signal change between pads of the workpiece as the processing is performed. 3. The ion beam processing apparatus according to claim 2, wherein the detection means has a function of determining a signal change. 4. The detection means extracts the signal input from one pad from the other pad, and determines the circuit characteristics of the workpiece from the change in the signal, as set forth in claim 2. ion beam processing equipment. 5. The ion beam processing apparatus according to any one of claims 2 to 4, wherein the workpiece is a semiconductor device such as a VLSI.