JPS62156853A - Mos-type variable capacity circuit - Google Patents

Abstract

PURPOSE:To realize integration including a controlling unit by a method wherein a means for applying a back gate voltage to a semiconductor, MOS-type transistor source and drain are connected to the same, a controlling means capable of applying a controlling voltage to their junction point is provided, and the controlling voltage is made variable for rendering the capacity value to vary. CONSTITUTION:A MOS-type transistor 10 provided with a source 11, drain 12, and gate 13 is formed on a semiconductor substrate 18, and a power source 14 applies a back gate voltage VBB to the semiconductor substrate 18. The source 11 and drain 12 are connected to each other and a controlling unit 15 is connected to their junction point for the application of a controlling signal. A gate.source capacity CGS exists between the gate 13 and source 11, a gate.drain capacity CGD between the gate 13 and drain 12, and a gate.bulk capacity CGB between the semiconductor substrate 18 and gate 13, all of which vary to the voltages in presence between the respective terminals.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a MOS type variable capacitance circuit that can change a MOS capacitance value by a control signal.

(Technical Background of the Invention and Problems Thereof) A varicap is a conventionally known semiconductor element having a so-called nonlinear capacitance whose capacitance value changes depending on an applied voltage. This varicap is a diode biased in the reverse direction, and is mainly used in FM modulation circuits and the like.

FIG. 6 shows the structure of a reverse biased diode (varicap). An electric current 1 is applied to provide a reverse bias between the N type diffusion layer 1 and the P type semiconductor substrate 2.
3 is connected and a voltage V is applied, the junction capacitance C between the substrate 2 and the diffusion layer 1 is given by the following equation.

・・・・・・・・・・・・(1) In Potential) ni = Intrinsic semiconductor concentration (1/cd)k −
Porzen constant (eV/k) NA = acceptor degree (1/ctd) T = temperature (°K) NA-donor concentration (1/cd) ε5i = dielectric constant of Si (F/TrL) 1', that is, voltage ■ By varying the value of , it is possible to change the depletion capacitance. This provides a semiconductor element with nonlinear capacitance.

However, as shown in Fig. 6, the variable sound ffi
When used as an element in an integrated circuit, there is a problem in that it occupies a very large area. In addition, since the varicap is a two-terminal element, it is not possible to add a terminal for controlling the capacitance value, which makes it difficult to use.

[Purpose of the invention]

The present invention has been made in order to eliminate the above-mentioned drawbacks, and provides a MOS type variable capacitance circuit that can vary the capacitance value by a control signal, occupies a small area when incorporated into an integrated circuit, and is suitable for integration. Its purpose is to provide.

[Summary of the invention]

A MOS type variable capacitance circuit according to the present invention includes a semiconductor substrate,
A MOS transistor formed on the semiconductor substrate, means for applying a back gate voltage to the semiconductor substrate,
A control means for connecting the source and drain of the OS type transistor and applying a control II lightning voltage to the connection point,
By varying the control voltage, the gate of the MOS transistor,
It is characterized by variable capacitance between the source and drain.

[Embodiments of the invention]

The present invention will be described in detail below based on illustrated embodiments.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

MOS with source 11, drain 12, and gate 13
A type transistor 10 is formed in a semiconductor substrate 18. A back gate voltage VBB is applied to this semiconductor substrate 18 by a pack gate power supply 14. Source 11
and the drain 12 are commonly connected, and a control circuit 15 is connected to the connection point to which a control signal, which will be described later, is applied.

An external signal is connected to the gate 13.

FIG. 2 is an equivalent circuit showing an opening inside the element of the MOS transistor 10. There is a gate-source capacitance ffi CGs between the gate 13 and the source 11, a gate-drain capacitance C68 between the gate 13 and the drain 12, and a gate-bulk capacitance C6B between the substrate and the gate 13.
are connected to each other. All of these capacitances are linear capacitances, and change according to the voltage between each terminal according to the Meyer Model.

The circuit according to the present invention utilizes changes in the gate-to-bulk capacitance C6B of a MOS transistor, and its basic principle will be explained in detail using a cross-sectional view of a MOS transistor in a depletion state shown in FIG.

In the depletion state, the surface of the semiconductor substrate 18 has a depletion layer capacitance C8. Also, due to the oxide film 16 interposed between this depletion fV117 and the gate 13, the oxide film capacitance ff1cQ
× exists.

Now, considering the depletion state of VF8+■Bs<■Gs<■FB, C=C=cOVerlOD=o ---...
<2) It is thought that O3GO. Also, since C60 is a series combination of an oxide film capacitor C6X and a depletion layer capacitor C8,...
...(3) It is expressed as. Here, when X is determined using the Po5isson equation, etc., and CGB is calculated, the following is obtained: (4). Here, ■ Nithreshold value, φ: Fermi Potenti
al.

on F7: Body Factor, V FB: F
This is the lat band voltage.

The total MOS6ffi is extremely small.

YotaV. In the strong inversion state of n<vGS, a channel is formed, so C=C= -Cox, CGB=0""...(5) GS
It becomes GO2. Therefore, in one circuit shown in Fig. 1, the control circuit 1
The output terminal A of No. 5 is at the ``H'' level, that is, the power supply voltage■.

When set to 0, V6s is always V. Since it becomes smaller than 0, it enters a depletion state and decreases to the total MOSO8 capacitance. When the voltage to one terminal is set to “°L” level, that is, OV,
(2) When oo<VGS, the total MOS capacitance a value becomes the molten film capacitance ff1CO×.

That is, in the circuit of the embodiment shown in FIG.
It is possible to change the total MOS capacitance between the gate and the source or between the gate and the drain from C to about C6x15 by switching the potential of the 11 terminal Δ from l-V level to 'L' level. can.

In the circuit shown in Fig. 1, the gate-to-bulk voltage when the gate back bias voltage ■88-3V and the gate voltage ■6 are varied from -5V to 12Vff1C1Genito.
Regarding changes in source capacitance C63, gate-to-rain capacitance Elk CGD, control O1t
Terminal A is at the ゛TODO° level (=5V) and the ``L'' level (=
OV) are plotted in the fourth case.
As shown in the figure. In the figure, the thick line indicates the case where the control terminal A is at the "L II level", and the thin line indicates the case where the control terminal A is at the "H" level.

As is clear from the characteristic diagram shown in Fig. 4, when this variable capacitance circuit is used in an actual semiconductor integrated circuit, the gate voltage 6 changes between OV and 5V, so the control When @child A is changed from the "L I+" level to the "H" level, the value changes from the capacity value shown by the thick line to the capacitance value not shown by the thin line, and the total MOS capacity value decreases greatly. I understand that.

FIG. 5 is a circuit diagram in which an oscillator is constructed using the circuit according to the present invention shown in FIG. Block 20゜21,...
2n uses an inverter 30 and a circuit according to the invention as its load capacitance, and blocks 20.21. ...
A ring oscillator is constructed by cascading 2n in an odd number of stages. When the output level of the output terminal A of the control circuit 15 is set to the "l-1" level, the load capacitance connected to the inverter 30 decreases, so the oscillation frequency of the ring oscillator increases, and conversely, the output level of the output terminal A of the control circuit 15 decreases.
When the signal level is set to "LIT level", the oscillation frequency becomes smaller.

As described above, by using the circuit according to the present invention, it is possible to configure a circuit that can greatly change the frequency very easily, so it can be applied to an oscillator of an LSI for a microcomputer, etc. It becomes possible to lower the frequency and drastically reduce the current consumption of the LSI. In particular, in cases where a dry cell battery is used as a power source, such as in a 0MOS LSI, the life of the dry cell battery can be extended by using the circuit of the present invention, making it possible to realize an LSI that is very economical for the user. It becomes possible.

〔Effect of the invention〕

As described above, according to the present invention, a control circuit is provided, and the capacitance value is changed using a control signal from this control circuit, which eliminates the difficulty of using the conventional two-terminal variable capacitor. Since it is possible to integrate the MOS LS II, :3at, and other variable capacitance circuits.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing a MOS type variable capacitance circuit according to an embodiment of the present invention, Fig. 2 is a circuit diagram of an equivalent circuit of the same MOS type variable capacitance circuit, and Fig. 3 is a circuit diagram of the same MOS type variable capacitance circuit. Cross-sectional views 1 and 4 showing the depletion state are characteristic diagrams showing changes in MOS capacitance with respect to changes in gate voltage in each of the same MOS type variable circuits. FIG. 5 is a circuit diagram when the present invention is applied to a MOSO3 type variable capacitance circuit oscillator, and FIG. 6 is a sectional view showing the structure of a conventional varicap. 10...MOS type transistor, 11...source,
12...Drain, 13...Gate, 14...Back gate power supply, 15...Control circuit. Applicant's agent Mr. Sato Figure 1 Figure 3

Claims (1)

[Claims] A semiconductor substrate, a MOS transistor formed on the semiconductor substrate, means for applying a back gate voltage to the semiconductor substrate, and a source and a drain of the MOS transistor are connected to each other. A variable MOS transistor, comprising: a control means for applying a control voltage to a connection point, and the capacitance between the gate of the MOS transistor and the source or drain is varied by varying the control voltage. capacitive circuit.