JPS62155622A - Digital-analog converter - Google Patents

Digital-analog converter

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Publication number
JPS62155622A
JPS62155622A JP29579485A JP29579485A JPS62155622A JP S62155622 A JPS62155622 A JP S62155622A JP 29579485 A JP29579485 A JP 29579485A JP 29579485 A JP29579485 A JP 29579485A JP S62155622 A JPS62155622 A JP S62155622A
Authority
JP
Japan
Prior art keywords
circuit
current
output
differentiation
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29579485A
Other languages
Japanese (ja)
Inventor
Akira Goishi
五石 晃
Ikuo Iko
伊香 郁夫
Masahiro Seyama
雅裕 瀬山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP29579485A priority Critical patent/JPS62155622A/en
Publication of JPS62155622A publication Critical patent/JPS62155622A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To decrease the settling time and to attain high speed operation by supplying an inverting current output of a current output circuit to a differentiation circuit, inverting the polarity of the output of differentiation circuit and adding the result to an output current of the current output circuit. CONSTITUTION:The output of the current output circuit 14 is fed to an adder circuit 21 and also the differentiation circuit 24. The output of the differentiation circuit 24 is fed to the adder circuit 21, whose output is fed to a current voltage conversion circuit 12. When input digital signals D1-Dn are changed and an output of the current output circuit 14 changes stepwise, a pulse B is obtained from the differentiation circuit 24 at the point of time of change. The pulse B is added to the output of the current output circuit 14 by the adder circuit 21 in a way of the addition in its changing direction. Then the addition output C is fed to the current voltage conversion circuit 12, its output D is changed in response to the output change of the current output circuit 14. When the output of the current output circuit 14 changes stepwise in this way, since a differentiation pulse increasing the change is superimposed on the output of the current output circuit 14, the settling time of the current voltage conversion circuit is reduced and the DA converter with higher speed is obtained by the reduction.

Description

【発明の詳細な説明】 「産業上の利用分野」 この発明はデジタル人力に応じた大きさの電流を電流出
力回路から出力し、七の出力電流を電流電圧変換回路で
電圧に変換して出力するDA変換器に関する。
[Detailed Description of the Invention] "Industrial Application Field" This invention outputs a current of a magnitude corresponding to digital human power from a current output circuit, converts the output current into voltage with a current-voltage conversion circuit, and outputs it. This invention relates to a DA converter.

「従来の技術」 従来のDA変換器は第6図に示すように構成されていた
。入力端子1)〜lnからのデジタル人力D1〜Dnは
それぞれゲート21〜2nへ供給され、それぞれ予め決
められた重みをもつものである。
"Prior Art" A conventional DA converter was constructed as shown in FIG. Digital human power D1-Dn from input terminals 1)-ln is supplied to gates 21-2n, respectively, and each has a predetermined weight.

電流切替回路31〜3nの各一方の電流通路は接地され
、他方の電流通路は共通の定電流源1)に接続されると
共に電流電圧変換回路12の入力端子13に接続される
One current path of each of the current switching circuits 31 to 3n is grounded, and the other current path is connected to the common constant current source 1) and to the input terminal 13 of the current-voltage conversion circuit 12.

ゲート2、〜2n、電流明電流路3□〜3rl、定電流
源1)は電流出力回路14を構成し、入力端子1)〜l
oのデジタル入力D1〜D、に応じて電流切替回路3、
〜3nが制御され、この電流切替回路3、〜3n側に流
れる電流と、電流電圧変換回路12側へ流れる出力電流
I。どの和が定電流源1)の定電流■。、になるよう(
=、出力電流I。が流れ、従って出力電流I。はデジタ
ル入力に応じた値となる。この出力電流■。は電流′磁
圧変換回路12で電圧に変換されて出力端子15に出力
される。
Gates 2, ~2n, current light current paths 3□~3rl, and constant current source 1) constitute a current output circuit 14, and input terminals 1)~l
A current switching circuit 3 according to the digital inputs D1 to D of o.
~3n are controlled, and the current flowing to the current switching circuits 3 and ~3n side and the output current I flowing to the current-voltage conversion circuit 12 side. Which sum is the constant current of the constant current source 1)■. , so that (
=, output current I. flows, so the output current I. is a value according to the digital input. This output current■. The current is converted into a voltage by the magnetic pressure conversion circuit 12 and output to the output terminal 15.

電流出力回路14の出力側に寄生抵抗ro、寄生容量C
8が存在し、動作を安定にするため、電流電圧変換回路
12の帰還抵抗器16、コンデンサ17の時定数は寄生
抵抗rい寄生容量C0の時定数を合せる必要がある。こ
のためこの従来のDA変換器において、電流出力回路1
4が入力デジタル信号D1〜Dnの変化に対し、理想的
なステップレスポンスであったとしても、電流゛磁圧変
換回路12における抵抗器16及びコンデンサ17によ
る帯域制限や演算増幅器18の帯域制限により、入力デ
ジタル信号D1〜Dnの変化(二対しステップ的に応答
せず、人力が変化した時にその人力に対応した出力にな
るまでのセットリング(整定)時間が比較的長く、高速
動作をさせることが困難であった。
A parasitic resistance ro and a parasitic capacitance C are provided on the output side of the current output circuit 14.
In order to stabilize the operation, the time constants of the feedback resistor 16 and capacitor 17 of the current-voltage conversion circuit 12 must match the time constants of the parasitic resistance r and the parasitic capacitance C0. Therefore, in this conventional DA converter, the current output circuit 1
Even if 4 has an ideal step response to changes in the input digital signals D1 to Dn, due to the band limitation of the resistor 16 and capacitor 17 in the current/magnetic pressure conversion circuit 12 and the band limitation of the operational amplifier 18, It does not respond stepwise to changes in the input digital signals D1 to Dn, and when the human power changes, the settling time until the output corresponds to that human power is relatively long, making it possible to operate at high speed. It was difficult.

「問題点を解決するための手段」 この発明(二よれば電流出力回路の反転電流出力が微分
回路へ供給され、その微分回路の出力は極性反転されて
電流出力回路の出力電流に加算される。
"Means for Solving the Problem" According to this invention (2), the inverted current output of the current output circuit is supplied to a differentiating circuit, and the output of the differentiating circuit is polarized and added to the output current of the current output circuit. .

入力デジタル信号が変化すると、これに応じて電流出力
回路の反転′直流出力は瞬時にして対応した値になり、
従って微分回路より微分パルスが得られ、このパルスが
極性反転されて電流出力回路に加えられるため、電流出
力回路の出力電流は。
When the input digital signal changes, the inverted DC output of the current output circuit instantly changes to the corresponding value.
Therefore, a differential pulse is obtained from the differentiating circuit, and this pulse is inverted in polarity and applied to the current output circuit, so the output current of the current output circuit is:

その人力デジタル信号の変化にもとすき変化した値に瞬
時になるが、更にその変化が大となるように微分パルス
が加わる。この微分パルスの加算は電流電圧変換回路の
応答を早めるように作用し。
The change in the human-powered digital signal is instantaneous, but a differential pulse is added to make the change even larger. This addition of differential pulses acts to speed up the response of the current-voltage conversion circuit.

セラ) IJンγ時間が短かくなり高速動作が可能とな
る。
(Cera) The IJn gamma time is shortened and high-speed operation is possible.

「実施例」 第1図はこの発明の原理を示す。電流出力回路14の出
力は加算回路21へ供給されると共に微分回路22へ供
給される。微分回路22の出力は加算回路21へ供給さ
れ、加算回路21の出力は電流電圧変換回路12へ供給
される。
``Example'' FIG. 1 shows the principle of this invention. The output of the current output circuit 14 is supplied to an adding circuit 21 and also to a differentiating circuit 22. The output of the differentiating circuit 22 is supplied to the adding circuit 21, and the output of the adding circuit 21 is supplied to the current-voltage conversion circuit 12.

入力デジタル信号D1〜Dnが変化して電流出力回路1
4の出力が第2図Aに示すようにステップ的に変化する
と、その変化時点で微分回路22から第2図Bに示すよ
うなパルスが得られ、このノくルスは電流出力回路14
の出力に、その変化方向に加算されるように加算回路2
1で加算され、その加算出力は第2図Cに示すよう、(
二なり、これが電流電圧変換回路12へ供給され、七の
出力は第2[’lDに示すように、電流出力回路14の
出力変化に応じて変化するが、その変化は多少なまった
ものとなる。
The input digital signals D1 to Dn change and the current output circuit 1
When the output of 4 changes stepwise as shown in FIG. 2A, a pulse as shown in FIG.
Adding circuit 2 is added to the output of , in the direction of change.
1, and the addition output is as shown in Figure 2C, (
2, this is supplied to the current-voltage conversion circuit 12, and the output of 7 changes according to the change in the output of the current output circuit 14, as shown in the second ['lD, but the change is somewhat rounded. .

しかし微分回路22の出力の加算を行わない場合は、つ
まり第2図AC示す出力のみを電流″峨圧変換回路12
へ供給した場合は第2図りに点線で示すように、その変
化のなまりは大きなものとなるが、この発明ではこのな
まりを小さくすることができる。なお電流電圧変換回路
12は第6□□□に示した具体回路では入出力間で極性
が反転される。
However, if the outputs of the differentiating circuit 22 are not added, that is, only the output shown in FIG.
In the case of supplying the same amount of energy to the 100%, as shown by the dotted line in the second diagram, the change in the change becomes very blunt; however, in the present invention, this blunting can be reduced. In the current-voltage conversion circuit 12, the polarity is reversed between input and output in the specific circuit shown in the sixth □□□.

電流電圧変換回路12の人力に対する出力の変化の遅れ
は1次遅れ回路とみな丁ことかでき、その伝達関数は 1+Sτ0 と表わせる。微分回路22a’CRの微分回路とすると
、その伝達関数は となる。τdはC,Hの時定数である。従って電流電圧
変換回路12.微分回路22及び加算回路21の全体の
伝達関数G(S)は となる。2τd=τ。とすると、G(S)はとなる。こ
の(5)式と(1)式とを比較してみれば理解されるよ
うに、2τd=τ0の条件の時は、電流出力回路14の
ステップ出力に対し、第itgに示す回路では、従来の
回路に対し応答速度は2倍になる。
The delay in the change in output of the current-voltage conversion circuit 12 relative to human power can be regarded as a first-order lag circuit, and its transfer function can be expressed as 1+Sτ0. Assuming that the differentiating circuit 22a'CR is the differentiating circuit, its transfer function is as follows. τd is the time constant of C and H. Therefore, the current-voltage conversion circuit 12. The overall transfer function G(S) of the differentiating circuit 22 and the adding circuit 21 is as follows. 2τd=τ. Then, G(S) becomes. As can be understood by comparing Equation (5) and Equation (1), under the condition of 2τd=τ0, the circuit shown in itg has a conventional The response speed is doubled compared to the circuit.

第3因はこの発明の実施例を示し、第6図と対応する部
分に同一符号を付けである。この実施例では電流出力回
路14の各電流切替回路3□〜3rIの能力の電流通路
23は電流微分回路24に接続される。その電流微分回
路24の出力側は信号′反転回路25を通じて電流電圧
変換回路12の入力端TF−13に接続される。電流微
分回路24において電流切替回路の電流通路23は抵抗
器26を通じて接地されると共にコンデンサ27?:通
じて信号反転回路25(−接続される。
The third factor shows an embodiment of the present invention, and parts corresponding to those in FIG. 6 are given the same reference numerals. In this embodiment, the current path 23 of each current switching circuit 3□ to 3rI of the current output circuit 14 is connected to a current differentiation circuit 24. The output side of the current differentiating circuit 24 is connected to the input terminal TF-13 of the current-voltage conversion circuit 12 through a signal' inversion circuit 25. In the current differentiation circuit 24, the current path 23 of the current switching circuit is grounded through a resistor 26 and a capacitor 27? : Connected through the signal inverting circuit 25 (-).

信号反転回路25において、コンデンサ27は定゛砥流
源28(=接続されると共にトランジスタ29のエミッ
タに接続され、トランジスタ29のベースは接地され、
コレクタはトランジスタ31のコレクタに接続され、ト
ランジスタ3■のベースは七のコレクタ::接続される
と共にトランジスタ32のベースに接続され、トランジ
スタ31.32のエミッタは抵抗器33.34Y通して
正電源端子35に接続される。トランジスタ32のコレ
クタは入力端子13に接続される。
In the signal inverting circuit 25, the capacitor 27 is connected to the constant abrasive current source 28 (== connected to the emitter of the transistor 29, the base of the transistor 29 is grounded,
The collector is connected to the collector of transistor 31, the base of transistor 3 is connected to the collector of transistor 3, and also to the base of transistor 32, and the emitter of transistor 31, 32 is connected to the positive power supply terminal through resistor 33, 34Y. 35. The collector of transistor 32 is connected to input terminal 13 .

この構成において電流出力回路14の入力端子−13へ
供給される出力電流Ioと、微分回路24へ供給される
出力電流工。とは流れ方向が反対で絶対値は同一である
。この出力電流Ioの変化は微分回路24で微分され、
その微分出力は信号反転回路25で変化方向が反転され
て出力電流I0と重畳される。例えば出力竜流工。がス
テップ的に増加すると、出力電流I。はステップ的に減
少しく向きを考えないと増加し)、微分回路24の微・
分−パルスがトランジスタ29よりコンデンサ27側に
流れ。
In this configuration, the output current Io is supplied to the input terminal -13 of the current output circuit 14, and the output current Io is supplied to the differentiating circuit 24. The flow direction is opposite, but the absolute value is the same. This change in output current Io is differentiated by a differentiating circuit 24,
The direction of change of the differential output is inverted by the signal inverting circuit 25 and superimposed on the output current I0. For example, output dragon flow engineering. When increases stepwise, the output current I. decreases stepwise and increases unless the direction is considered), and the differential of the differential circuit 24 increases.
The minute pulse flows from the transistor 29 to the capacitor 27 side.

その電流パルスはトランジスタ31に流れ、従ってトラ
ンジスタ32のコレゲタ電流がパルス的に増加し、この
電流が電流I。に加算されて電流電圧変換回路I2へ供
給される。トランジスタ29はインピーダンスを下げて
、トランジスタ31のコレクタの電位変動が電流通路2
3側へ影響しないようにする作用をしている。
The current pulse flows through the transistor 31, so that the collector current of the transistor 32 increases in a pulsed manner, and this current becomes the current I. and is supplied to the current-voltage conversion circuit I2. The transistor 29 lowers the impedance, and the potential fluctuation of the collector of the transistor 31 is changed to the current path 2.
It acts to prevent any influence on the third side.

信号反転回路25の利得を調整し、つまり抵抗器33.
34の抵抗値を選定して、電流Ioに加算するパルス電
流値を調整することができる。
The gain of the signal inversion circuit 25 is adjusted, that is, the resistor 33.
By selecting 34 resistance values, it is possible to adjust the pulse current value added to the current Io.

電流通路23に微分回路24”k接続したことにより電
流通路23の電位変動が生じるおそれがある場合は1例
えば第4因に示すようにバッファ回路37を介して微分
回路24を接続すればよい。
If there is a possibility that the potential fluctuation of the current path 23 may occur due to the connection of the differentiating circuit 24''k to the current path 23, the differentiating circuit 24 may be connected via the buffer circuit 37 as shown in the fourth factor.

電流通路23はバッファ回路37内のカレントミラー回
路を構成する人力トランジスタ38のコレクタに接続さ
れると共(二定電流源39に接続され。
The current path 23 is connected to the collector of a human-powered transistor 38 constituting a current mirror circuit in the buffer circuit 37 (connected to two constant current sources 39).

トランジスタ38と共にカレントミラー回路馨構成する
出力トランジスタ41のコレクタはトランジスタ42の
コレクタに接続され、トランジスタ42はトランジスタ
43と共にカレントミラー回路を構成している。ただし
この場合はその人出力電流間に二定の比率をもたすこと
ができるようにトランジスタ42.43の各エミッタに
抵抗器44゜45が直列に挿入され、これら抵抗器の抵
抗倣?選定することができる。トランジスタ43のコレ
クタは微分回路24の入力側に接続される。
The collector of the output transistor 41, which together with the transistor 38 constitutes a current mirror circuit, is connected to the collector of a transistor 42, which together with the transistor 43 constitutes a current mirror circuit. However, in this case, resistors 44 and 45 are inserted in series with each emitter of the transistors 42 and 43 so that a constant ratio can be obtained between the output currents. can be selected. The collector of the transistor 43 is connected to the input side of the differentiating circuit 24.

電流通路23の電流■oが増jJDするとトランジスタ
38の電流が増加し、従ってトランジスタ41゜42の
電流も増加し、これ(=伴ってトランジスタ43の電流
も増加する。この増加による微分電流が信号反転回路2
5内のトランジスタ46より微分コンデンサ27.トラ
ンジスタ43に電流が流れる。トランジスタ46のコレ
クタは信号反転回路25内のカレントミラー回路47の
入力端に接続され、カレントミラー回路47の出力側は
入力端’T−13に接続され、コンデンサ27、トラン
ジスタ46の接続点はトランジスタ48を通じてカレン
トミラー回路49の入力側に接続され、カレントミラー
回路49の出力側は入力端子13に接続されている。ト
ランジスタ46.48のベースは接地されている。カレ
ントミラー1)jlj147.49に流れる電流の差分
が入力端子13に入力又は出力する。前述のように電流
IOが増加するとトランジスタ43を流れる電流も増加
し、コンデンサ27にトランジスタ46からパルス的に
電流が流れ。
When the current o in the current path 23 increases jJD, the current in the transistor 38 increases, and therefore the current in the transistors 41 and 42 also increases, and the current in the transistor 43 also increases.The differential current due to this increase is the signal Inversion circuit 2
Differential capacitor 27 from transistor 46 in 5. Current flows through transistor 43. The collector of the transistor 46 is connected to the input terminal of the current mirror circuit 47 in the signal inversion circuit 25, the output side of the current mirror circuit 47 is connected to the input terminal 'T-13, and the connection point between the capacitor 27 and the transistor 46 is connected to the input terminal of the current mirror circuit 47 in the signal inversion circuit 25. 48 to the input side of a current mirror circuit 49, and the output side of the current mirror circuit 49 is connected to the input terminal 13. The bases of transistors 46, 48 are grounded. The difference between the currents flowing through the current mirror 1) jlj147.49 is input to or output from the input terminal 13. As described above, when the current IO increases, the current flowing through the transistor 43 also increases, and current flows into the capacitor 27 from the transistor 46 in a pulsed manner.

このパルス電流がカレントミラー回路47より入力端′
:F−13へ供給される。
This pulse current is passed from the current mirror circuit 47 to the input terminal'
:Supplied to F-13.

上述では電流通路23の電流工0を電流微分回路24へ
供給したが、電圧微分回路を用いることもできる。第5
図はその例を示f。電流通路23は抵抗器51を通じて
接地され、その抵抗器51で発生した電圧はバッファ回
路52を通じて電圧微分回路53へ供給される。またこ
の例では微分回路53の出力を電流電圧変換回路12内
の演算増幅器18の非反転入力端子へ供給し、入力端子
13を演算増幅器18の反転入力端子:二接続して、微
分回路53の出力を、電流電圧変換回路12内で入力端
T−13の入力に対し反転して加算した場合である。
In the above description, the current value 0 of the current path 23 is supplied to the current differentiation circuit 24, but a voltage differentiation circuit may also be used. Fifth
The figure shows an example. The current path 23 is grounded through a resistor 51, and the voltage generated by the resistor 51 is supplied to a voltage differentiator circuit 53 through a buffer circuit 52. In this example, the output of the differentiating circuit 53 is supplied to the non-inverting input terminal of the operational amplifier 18 in the current-voltage conversion circuit 12, and the input terminal 13 is connected to the inverting input terminal of the operational amplifier 18. This is a case where the output is inverted and added to the input of the input terminal T-13 within the current-voltage conversion circuit 12.

「発明の効果」 以上述べたようにこの発明のDA変換器によれば、電流
出力回路14の出力がステップ的に変化すると、その変
化を増大する方向の微分パルスが、その電流出力回路1
4の出力に重畳されるため。
"Effects of the Invention" As described above, according to the DA converter of the present invention, when the output of the current output circuit 14 changes stepwise, the differential pulse in the direction of increasing the change is transmitted to the current output circuit 14.
Because it is superimposed on the output of 4.

電流電圧変換回路のセットリング時間を小さくすること
ができ、それだけ高速動作のDA変換器を得ることがで
きる。しかも電流出力回路の反転電流通路24の電流を
利用し、アナログの微分回路によりアナログ的に処理を
しており1回路構成が頗る簡単なもので済む利点がある
The settling time of the current-voltage conversion circuit can be reduced, and a DA converter that operates at high speed can be obtained. Moreover, since the current in the inverted current path 24 of the current output circuit is used and processed in an analog manner by an analog differentiating circuit, there is an advantage that a single circuit configuration is extremely simple.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の原理を示すブロック図、第2因は第
1図の説明に供するためのタイムチャート、第3図はこ
の発明の実施例を示す接続図、′第4因及び第5図はそ
れぞれこの発明の池の例を示す接続図、第6図は従来の
DA変換器を示す接続図である。 1)〜ln=デジタル信号入力端子、3、〜3o:電流
切替回路、12:電流電圧変換回路、14:電流出力回
路、24:電流微分回路、25:信号反転回路、47 
、49 :カレントミラー回路、53:電圧微分回路。 特許出願人   株式会社 アトパンテスト代  理 
 人   草   野     卓オ 1 図 オ 2 マ 才 6図 手続補正書(自発) 昭和61年2月28日 1、事件の表示  特願昭60−2957942、発明
の名称  DA  変 換 器3、補正をする者 事件との関係 特許出願人 株式会社 アトパンテスト 4、代 理 人  東京都新宿区新宿4−2−21相模
ビル 5、 補正の対象  明細書中発明の詳細な説明の欄お
よび図面 6、補正の内容 1+S τ。 (2)同書6頁7行〜8行「(3)式および(4)式」
を次の1+Sτd     l+Sτ。 (1+Sτd)(1+Sτ。) (3)同書6頁10行「(5)式」を次のとおり訂正す
る。 (4)同書8頁14〜17行「トランジスタ29は・・
・・・・作用をしている。」を「トランジスタ29は入
力インピーダンスを下げて、電流微分回路24の出力端
子の電位変動を起さないようにする作用をしている。」
と訂正する。 (5)図面中筒1図を添付図に訂正する。 以   上
Fig. 1 is a block diagram showing the principle of this invention, the second factor is a time chart for explaining Fig. 1, Fig. 3 is a connection diagram showing an embodiment of this invention, the fourth factor and the fifth factor. Each figure is a connection diagram showing an example of the pond of the present invention, and FIG. 6 is a connection diagram showing a conventional DA converter. 1) ~ln=digital signal input terminal, 3, ~3o: current switching circuit, 12: current voltage conversion circuit, 14: current output circuit, 24: current differentiating circuit, 25: signal inversion circuit, 47
, 49: Current mirror circuit, 53: Voltage differentiator circuit. Patent applicant: Atopantest Co., Ltd. Agent
Takuo Kusano 1 Figure 2 Master 6 Figure 6 procedural amendment (voluntary) February 28, 1985 1, Indication of case Patent application 1987-2957942, Title of invention DA converter 3, Make amendment Relationship with the patent applicant case Atopan Test 4, Agent: Sagami Building 5, 4-2-21 Shinjuku, Shinjuku-ku, Tokyo, Subject of amendment Detailed description of the invention in the specification and drawing 6, Amendment The content of 1+S τ. (2) “Equations (3) and (4)” on page 6, lines 7 and 8 of the same book
The next 1+Sτd l+Sτ. (1+Sτd) (1+Sτ.) (3) “Formula (5)” on page 6, line 10 of the same book is corrected as follows. (4) Same book, p. 8, lines 14-17 “The transistor 29...
・・・It is working. "The transistor 29 has the function of lowering the input impedance to prevent potential fluctuations at the output terminal of the current differentiating circuit 24."
I am corrected. (5) Figure 1 of the cylinder in the drawing is corrected to the attached figure. that's all

Claims (1)

【特許請求の範囲】[Claims] (1)デジタル入力に応じた大きさの電流を出力する電
流出力回路と、 その電流出力回路の出力電流を電圧に変換する電流電圧
変換回路とを有するDA変換器において、 上記電流出力回路の反転電流出力が供給される微分回路
と、 その微分回路の微分出力を極性反転して上記電流出力回
路の出力電流に加算する加算手段とを設けたことを特徴
とするDA変換器。
(1) In a DA converter that has a current output circuit that outputs a current of a magnitude according to a digital input, and a current-voltage conversion circuit that converts the output current of the current output circuit into voltage, an inversion of the current output circuit described above. A DA converter comprising: a differentiating circuit to which a current output is supplied; and an adding means for inverting the polarity of the differential output of the differentiating circuit and adding it to the output current of the current output circuit.
JP29579485A 1985-12-27 1985-12-27 Digital-analog converter Pending JPS62155622A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29579485A JPS62155622A (en) 1985-12-27 1985-12-27 Digital-analog converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29579485A JPS62155622A (en) 1985-12-27 1985-12-27 Digital-analog converter

Publications (1)

Publication Number Publication Date
JPS62155622A true JPS62155622A (en) 1987-07-10

Family

ID=17825245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29579485A Pending JPS62155622A (en) 1985-12-27 1985-12-27 Digital-analog converter

Country Status (1)

Country Link
JP (1) JPS62155622A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0255421A (en) * 1988-08-20 1990-02-23 Hitachi Ltd Da converter
EP1081862A2 (en) * 1999-08-31 2001-03-07 Texas Instruments Incorporated Digital-to-analog converter
JP2015036757A (en) * 2013-08-13 2015-02-23 セイコーエプソン株式会社 Data line driver, semiconductor integrated circuit device, and electronic apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0255421A (en) * 1988-08-20 1990-02-23 Hitachi Ltd Da converter
EP1081862A2 (en) * 1999-08-31 2001-03-07 Texas Instruments Incorporated Digital-to-analog converter
EP1081862A3 (en) * 1999-08-31 2003-08-13 Texas Instruments Incorporated Digital-to-analog converter
JP2015036757A (en) * 2013-08-13 2015-02-23 セイコーエプソン株式会社 Data line driver, semiconductor integrated circuit device, and electronic apparatus

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