JPS62155525A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPS62155525A JPS62155525A JP29570185A JP29570185A JPS62155525A JP S62155525 A JPS62155525 A JP S62155525A JP 29570185 A JP29570185 A JP 29570185A JP 29570185 A JP29570185 A JP 29570185A JP S62155525 A JPS62155525 A JP S62155525A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output terminals
- integrated circuit
- hybrid integrated
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
[発明の技術分野]
本発明は、フラットパッケージタイプの混成集積回路に
関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a flat package type hybrid integrated circuit.
[発明の技術的背景コ
近年電子機器の小型軽量化、高性能化、高信頼化等の要
求に応じてフラットパッケージタイプの混成集積回路が
多用されつつある。[Technical Background of the Invention] In recent years, flat package type hybrid integrated circuits have been increasingly used in response to demands for smaller and lighter electronic devices, higher performance, and higher reliability.
第3図および第4図はこのようなフラットパッケージタ
イプの混成集積回路を示すもので、多層の配線基板1上
には能動的および受動的回路素子(いずれも図示を省略
)が複数個搭載され、これら全体が金属製キャップ2で
気密に封止されている。また配線基板1の裏面には入出
力信号配線が接続された複数個の入出力端子取付は用導
体パッド3を2列に等間隔で配設されており、さらにこ
れらの入出力端子取付は用導体パッド3にはそれぞれ入
出力端子4が1本ずつ裏面に平行に銀ろう付げにより接
続されている。Figures 3 and 4 show such a flat package type hybrid integrated circuit, in which a plurality of active and passive circuit elements (both not shown) are mounted on a multilayer wiring board 1. , these are all hermetically sealed with a metal cap 2. In addition, on the back side of the wiring board 1, conductor pads 3 for mounting a plurality of input/output terminals to which input/output signal wiring is connected are arranged in two rows at equal intervals. One input/output terminal 4 is connected to each conductor pad 3 in parallel to the back surface by silver soldering.
[背景技術の問題点]
しかしながらこのような混成集積回路においては、配線
基板1の凹凸のない平面状の裏面に入出力端子取付は用
導体パッド3が形成されこれらに入出力端子4が固着さ
れて、配線基板1の裏面から入出力端子4がその厚さ分
だけ突出した構造となっているため、この混成集積回路
をマザーボード等に搭載した場合に、入出力端子4の下
面のみで被搭載面と接触し配線基板1の裏面の大部分は
浮き上がってしまう°結果となっていた。従ってこのよ
うな混成集積回路では動作時に熱がマザーボード等に逃
げにくく、特性的に充分な信頼性を得ることができない
という問題があった。[Problems with the Background Art] However, in such a hybrid integrated circuit, conductor pads 3 for attaching input/output terminals are formed on the smooth, flat back surface of the wiring board 1, and input/output terminals 4 are fixed to these. Since the input/output terminals 4 protrude from the back surface of the wiring board 1 by the thickness thereof, when this hybrid integrated circuit is mounted on a motherboard etc., only the bottom surface of the input/output terminals 4 can be mounted. This resulted in most of the back surface of the wiring board 1 being lifted up. Therefore, in such a hybrid integrated circuit, it is difficult for heat to escape to the motherboard etc. during operation, and there is a problem that sufficient reliability in terms of characteristics cannot be obtained.
また、混成集積回路の製作時や温度試験後には、熱伝導
率の高い金属板上に混成集積回路を載せて放熱させ冷却
しているが、この場合にも金属板と接するのは入出力端
子4の部分だけであるため、放熱が不十分となり冷却作
業および試験等の能率が非常に悪いという問題があった
。In addition, when manufacturing a hybrid integrated circuit or after a temperature test, the hybrid integrated circuit is placed on a metal plate with high thermal conductivity to dissipate heat and cool it, but in this case as well, the input/output terminals are in contact with the metal plate. 4, there was a problem in that heat dissipation was insufficient and the efficiency of cooling work, testing, etc. was extremely poor.
ざらに混成集積回路を製作する工程で金属製キャップ2
内を真空吸引することが行なわれているが、この作業を
行なう場合には入出力端子が下面から突出しているため
、配線基板1を固定する治具に、裏面から突出した入出
力端子4の厚み分を逃がす部分を設ける必要があり、そ
の結果治具が特殊な形状となり、その製作に費用と工数
が多くかかるという問題もめった。Metal cap 2 in the process of manufacturing a rough hybrid integrated circuit
The interior of the wiring board 1 is vacuum-suctioned, but since the input/output terminals protrude from the bottom surface when performing this work, the input/output terminals 4 protruding from the back surface are attached to the jig for fixing the wiring board 1. It was necessary to provide a part to allow the thickness to escape, and as a result, the jig had to have a special shape, which caused problems in that it required a lot of cost and man-hours to manufacture.
[発明の目的]
本発明はこれらの問題を解決するために、なされたもの
で、配線基板の裏面からの放熱効果が良好で信頼性が高
く、しかも製作時およびテスト時の作業効率のよい混成
集積回路を提供することを目的とする。[Object of the Invention] The present invention has been made in order to solve these problems, and is a hybrid method that has a good heat dissipation effect from the back side of the wiring board, is highly reliable, and is efficient in manufacturing and testing. The purpose is to provide integrated circuits.
[発明の概要]
すなわち本発明の混成集積回路は、配線基板の表面に複
数個の回路素子を搭載するとともに、その裏面に複数個
の入出力端子取付は用導体パッドを形成し、これらの入
出力端子取付は用導体パッドに複数本の入出力端子をそ
れぞれ前記裏面と平行に固着してなる混成集積回路にお
いて、前記配線基板の裏面に前記入出力端子の厚さ以上
の段差を設け、その段差の低い方の面上に前記入出力端
子取付は用導体パッドを形成することにより、配線基板
の裏面からの放熱効果を改善しこれによって信頼性を向
上させ、しかも製作時およびテスト時の作業効率も向上
させたものである。[Summary of the Invention] In other words, the hybrid integrated circuit of the present invention has a plurality of circuit elements mounted on the front surface of a wiring board, and a plurality of conductor pads for mounting input/output terminals on the back surface thereof. In a hybrid integrated circuit in which a plurality of input/output terminals are fixed to conductive pads parallel to the back surface, output terminal mounting is performed by providing a step on the back surface of the wiring board that is equal to or greater than the thickness of the input/output terminals, and By forming conductor pads for mounting the input/output terminals on the lower side of the step, the heat dissipation effect from the back side of the wiring board is improved, thereby improving reliability, and reducing work during manufacturing and testing. It also improves efficiency.
なお、本発明における混成集積回路を、例えばメタルコ
ア配線基板や、へβ板上に樹脂絶縁層を介して回路配線
を施した基板、あるいはステンレス配線基板等の金属ベ
ースの配線板上に実装する際に、特に放熱性向上の効果
があられれる。Note that when the hybrid integrated circuit of the present invention is mounted on a metal-based wiring board, such as a metal core wiring board, a board with circuit wiring on a β plate through a resin insulating layer, or a stainless steel wiring board, In particular, it has the effect of improving heat dissipation.
[発明の実施例] 以下本発明を図面に示す実施例について説明する。[Embodiments of the invention] The present invention will be described below with reference to embodiments shown in the drawings.
第1図および第2図はそれぞれ本発明の混成集積回路の
一実施例を示す正面図および裏面側から見た斜視図であ
る。FIG. 1 and FIG. 2 are a front view and a perspective view, respectively, showing an embodiment of the hybrid integrated circuit of the present invention, as seen from the back side.
これらの図において、符号5は表面に導体パターンが形
成された例えばセラミックの多層配線基板を示しており
、その上の所定の位置にはメモリのような能動的回路素
子と抵抗、コンデンサのような受動的回路素子とが複数
個搭載されている。In these figures, reference numeral 5 indicates a multilayer wiring board made of, for example, ceramic, on which a conductive pattern is formed, and active circuit elements such as memory, resistors, and capacitors are placed at predetermined positions on the board. A plurality of passive circuit elements are mounted.
そしてこれらの回路素子を搭載した面全体が金属製のキ
ャップ6で気密に覆われている。The entire surface on which these circuit elements are mounted is hermetically covered with a metal cap 6.
また、配線基板5の裏面には、長辺に沿った対向する辺
縁部7がそれぞれ低く、中央部8が高くなった段差が設
けられている。この段差の高さ、すなわち辺縁部7と中
央部8の高低の差は、後述する入出力端子の厚さに等し
いか、あるいはそれより高くされている。Further, the back surface of the wiring board 5 is provided with a step in which opposing edge portions 7 along the long sides are lower and the center portion 8 is higher. The height of this step, that is, the difference in height between the edge portion 7 and the center portion 8 is equal to or higher than the thickness of the input/output terminal described later.
ざらにこの段差の低い側の辺縁部7上には、それぞれ複
数個の入出力端子取付は用導体パッド9が等間隔で形成
されてており、これらの入出力端子取付は用導体パッド
9にはそれぞれ入出力嫡子10が、先端部を外側に向け
、かつこの配線基板5の裏面と平行に銀ろう付げにより
固着されている。Roughly on the lower edge 7 of this step, conductive pads 9 for mounting a plurality of input/output terminals are formed at equal intervals. An input/output legitimate child 10 is fixed to each of the wiring boards 5 by silver soldering, with the tip facing outward and parallel to the back surface of the wiring board 5.
この実施例の混成集積回路においては、配線基板5の裏
面の大部分を占める中央部8よりも段差の高さ分だけ低
い辺縁部7に入出力端子10が取着されているので、こ
れをマザーボードに搭載して電子回路を構成した場合に
は、広い面積の裏面中央部8仝体が被搭載面と接触する
ことになり、したがってこの混成集積回路で発生した熱
はこの広い伝熱面から逃げやすく、混成集積回路の特性
が熱により劣化するようなおそれは少ない。In the hybrid integrated circuit of this embodiment, the input/output terminals 10 are attached to the edge part 7 which is lower than the center part 8 which occupies most of the back surface of the wiring board 5 by the height of the step. When an electronic circuit is constructed by mounting the hybrid integrated circuit on a motherboard, the large central part of the back surface will come into contact with the mounting surface, so the heat generated in this hybrid integrated circuit will be transferred to this large heat transfer surface. It is easy to escape from heat, and there is little risk that the characteristics of the hybrid integrated circuit will deteriorate due to heat.
またこの混成集積回路の製作時やテスト時に放熱させて
冷却する際にも、熱伝導率の高い金属板上に金属製キャ
ップ6を上側にして載せることにより、配線基板5裏面
の中央部8の広い伝熱面から急速に熱を逃がすことがで
きる。Also, when cooling the hybrid integrated circuit by dissipating heat during manufacturing or testing, by placing the metal cap 6 on top of a metal plate with high thermal conductivity, the central part 8 on the back side of the wiring board 5 can be cooled. Heat can be rapidly dissipated from a wide heat transfer surface.
[発明の効果]
以上説明したように、本発明の混成集積回路においては
、配線基板の裏面に段差が設けられておりその低い方の
面上に入出力端子が取着されているので、これを他の回
路に搭載した場合に、動作に伴なって発生した熱が配線
基板裏面の大部分を占める高い方の面を伝わって速やか
に逃げるため、熱による特性劣化を生じる恐れが少ない
。[Effects of the Invention] As explained above, in the hybrid integrated circuit of the present invention, a step is provided on the back surface of the wiring board, and input/output terminals are attached to the lower surface of the step. When mounted on other circuits, the heat generated during operation quickly escapes through the higher surface, which occupies most of the back surface of the wiring board, so there is little risk of property deterioration due to heat.
また製作時やテスト時の放熱冷却の際にも、熱伝導率の
高い金属板の上に載せるだけで急速に放熱させることが
でき、作業効率が向上させることができる。Furthermore, during heat dissipation cooling during manufacturing and testing, heat can be dissipated rapidly by simply placing it on a metal plate with high thermal conductivity, improving work efficiency.
ざらに製作時に特殊な形状の配線基板固定用治具を必要
としないため、費用と工数が節約されるという利点があ
る。Since there is no need for a specially shaped wiring board fixing jig during rough manufacturing, there is an advantage in that costs and man-hours are saved.
第1図は本発明の混成集積回路の一実施例を示す正面図
、第2図はそれを裏面側から見た斜視図、第3図は従来
のフラットパッケージタイプの混成集積回路を示す正面
図、第4図はそれを裏面側から見た斜視図である。
1.5・・・・・・配線基板
2.6・・・・・・金属製キャップ
3.9・・・・・・入出力端子取付は用導体パッド4.
10・・・入出力端子
出願人 株式会社 東芝
代理人 弁理士 須 山 佐 −
第1図
第2図
第40Fig. 1 is a front view showing an embodiment of the hybrid integrated circuit of the present invention, Fig. 2 is a perspective view of the same as seen from the back side, and Fig. 3 is a front view showing a conventional flat package type hybrid integrated circuit. , FIG. 4 is a perspective view of the same as seen from the back side. 1.5...Wiring board 2.6...Metal cap 3.9...Conductor pad for mounting input/output terminals 4.
10... Input/output terminal applicant: Toshiba Corporation, agent, patent attorney, Sasu Suyama - Figure 1, Figure 2, Figure 40
Claims (2)
とともに、その裏面に複数個の入出力端子取付け用導体
パッドを形成し、これらの入出力端子取付け用導体パッ
ドに複数本の入出力端子をそれぞれ前記裏面と平行に固
着してなる混成集積回路において、前記配線基板の裏面
に前記入出力端子の厚さ以上の段差を設け、その段差の
低い方の面上に前記入出力端子取付け用導体パッドを形
成して成ることを特徴とする混成集積回路。(1) Multiple circuit elements are mounted on the front surface of the wiring board, and multiple conductor pads for attaching input/output terminals are formed on the back surface of the wiring board, and multiple input/outputs are mounted on these conductor pads for attaching input/output terminals. In a hybrid integrated circuit in which terminals are each fixed in parallel with the back surface, a step is provided on the back surface of the wiring board that is equal to or greater than the thickness of the input/output terminal, and the input/output terminal is mounted on the lower surface of the step. 1. A hybrid integrated circuit characterized by forming conductor pads for
許請求の範囲第1項記載混成集積回路。(2) The hybrid integrated circuit according to claim 1, wherein the wiring board is mounted on metal-based wiring or the like.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29570185A JPS62155525A (en) | 1985-12-27 | 1985-12-27 | Hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29570185A JPS62155525A (en) | 1985-12-27 | 1985-12-27 | Hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62155525A true JPS62155525A (en) | 1987-07-10 |
Family
ID=17824043
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29570185A Pending JPS62155525A (en) | 1985-12-27 | 1985-12-27 | Hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62155525A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5563773A (en) * | 1991-11-15 | 1996-10-08 | Kabushiki Kaisha Toshiba | Semiconductor module having multiple insulation and wiring layers |
JPH1035164A (en) * | 1996-04-25 | 1998-02-10 | Samsung Aerospace Ind Ltd | Ic card and manufacture thereof |
JP2006237358A (en) * | 2005-02-25 | 2006-09-07 | Toshiba Corp | Semiconductor device housing package and watthour meter |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4978170A (en) * | 1972-12-06 | 1974-07-27 |
-
1985
- 1985-12-27 JP JP29570185A patent/JPS62155525A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4978170A (en) * | 1972-12-06 | 1974-07-27 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5563773A (en) * | 1991-11-15 | 1996-10-08 | Kabushiki Kaisha Toshiba | Semiconductor module having multiple insulation and wiring layers |
JPH1035164A (en) * | 1996-04-25 | 1998-02-10 | Samsung Aerospace Ind Ltd | Ic card and manufacture thereof |
JP2006237358A (en) * | 2005-02-25 | 2006-09-07 | Toshiba Corp | Semiconductor device housing package and watthour meter |
JP4500181B2 (en) * | 2005-02-25 | 2010-07-14 | 東光東芝メーターシステムズ株式会社 | Package for storing semiconductor element and watt hour meter |
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