JPS62154555U - - Google Patents
Info
- Publication number
- JPS62154555U JPS62154555U JP4261486U JP4261486U JPS62154555U JP S62154555 U JPS62154555 U JP S62154555U JP 4261486 U JP4261486 U JP 4261486U JP 4261486 U JP4261486 U JP 4261486U JP S62154555 U JPS62154555 U JP S62154555U
- Authority
- JP
- Japan
- Prior art keywords
- logic
- register
- state
- internal bus
- high impedance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002457 bidirectional effect Effects 0.000 claims description 4
- 230000003111 delayed effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4261486U JPS62154555U (enExample) | 1986-03-24 | 1986-03-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4261486U JPS62154555U (enExample) | 1986-03-24 | 1986-03-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62154555U true JPS62154555U (enExample) | 1987-10-01 |
Family
ID=30858692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4261486U Pending JPS62154555U (enExample) | 1986-03-24 | 1986-03-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62154555U (enExample) |
-
1986
- 1986-03-24 JP JP4261486U patent/JPS62154555U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS62154555U (enExample) | ||
| JPS5882038U (ja) | シュミット回路 | |
| JPS5877930U (ja) | アナログスイツチ | |
| JPS5897800U (ja) | メモリ装置 | |
| JPS62169831U (enExample) | ||
| JP2782946B2 (ja) | 半導体集積回路 | |
| JPS6296750U (enExample) | ||
| JPS63163541U (enExample) | ||
| JPS63179548U (enExample) | ||
| JPH0354050U (enExample) | ||
| JPS59169633U (ja) | バツフア回路 | |
| JPS643220U (enExample) | ||
| JPS5837229U (ja) | 論理回路 | |
| JPS6356451U (enExample) | ||
| JPH0288180U (enExample) | ||
| JPS5478635A (en) | Data transfer control circuit | |
| JPS59189336U (ja) | 入力回路 | |
| JPS61334U (ja) | トライステ−トゲ−ト素子チツプ | |
| JPS62117797U (enExample) | ||
| JPS59119644U (ja) | ゲ−トアレ−ic | |
| JPS5851336U (ja) | ダイレクト・メモリ・アクセス制御回路 | |
| JPS63146772U (enExample) | ||
| JPH0535893B2 (enExample) | ||
| JPH01125637U (enExample) | ||
| JPH03119202U (enExample) |