JPS62151901A - Mechanism and protecting system for drive circuit - Google Patents

Abstract

PURPOSE:To previously protect a load and a circuit without applying stress to the mechanical load of a printer device and to a drive circuit and to recognize program control abnormalities with the aid of an abnormality display means by providing a means detecting the program control abnormality, a forcible driver lock means and an abnormal content display means. CONSTITUTION:The drive circuit 2 driving the mechanical load 1 such as a motor and a solenoid is controlled by a control circuit 3 mounting a microprocessor. Besides the control circuit 3, the titled system has the circuit 4 for detecting the program control abnormality, a drive lock display circuit 5 showing that the program control abnormality is detected, a drive lock circuit 6 which makes a drive circuit 2 inoperable, receiving an output signal from the detection circuit 4, and a switching circuit 7 invalidating the drive lock function of the drive lock circuit 6 in order to facilitate troubleshooting and program debugging. Thus such detection is made that the program control does not operate properly, and the drive circuit 2 is forcibly set in an action load state (drive locked state), thereby protecting the mechanical load 1 and the drive circuit 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to mechanism control by a program, and particularly to a protection system for a mechanism and a drive circuit that drives this mechanism in the event of an abnormality in program control.

[Conventional technology]

In recent years, various devices such as printer devices are equipped with microprocessors to realize various functions. Therefore, during program development, debugging, noise generation, and external noise (AC line noise,
(Static electricity, etc.) may cause the microprocessor to malfunction and prevent normal program control. At this time, if mechanical loads such as motors and solenoids (hereinafter referred to as mechanical loads) are being driven via the drive circuit by each X10 control, an abnormal operating state will occur. Furthermore, the excitation time of the drive circuit may be outside the specified range, leading to damage.

Conventional methods for protecting mechanical loads and drive circuits from such risks detect abnormalities through current detection, fuse detection, temperature detection, etc. at the final stage of the drive circuit, and prevent damage to the drive circuit or mechanical load. is protected.

[Problem that the invention seeks to solve]

As described above, in the conventional mechanism and drive circuit protection system, an abnormality is detected after stress is applied to the mechanical load and drive circuit, and destruction is avoided. Therefore, no attempt has been made to protect the mechanical load and drive circuit before stress is applied to them.

An object of the present invention is to provide a method for detecting that program control is not operating normally, forcibly placing the drive circuit in an operating load state (drive lock state), and protecting the mechanical load and drive circuit. be.

[Means for solving problems]

The present invention provides a protection system for a program-controlled mechanism and a drive circuit that drives the mechanism, including: a circuit for detecting a program control abnormality; a display circuit for indicating that the detection circuit has detected a program control abnormality; The drive lock circuit includes a drive lock circuit that receives an output signal from the circuit and disables the drive circuit, and a switching circuit that enables or disables the drive lock function of the drive lock circuit, and prevents stress on the mechanism and drive circuit. The present invention is characterized in that the drive current from the drive circuit is cut off without adding any current.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. Drive circuit 2 that drives mechanical load 1 such as a motor or solenoid
is a control circuit 3 equipped with a microprocessor.
controlled by In this embodiment, the control circuit 3
In addition, there is a circuit 4 that detects a program control abnormality, a drive lock display circuit 5 that indicates that a program control abnormality has been detected, and a drive lock that disables the drive circuit 2 in response to an output signal from the detection circuit 4. It has a circuit 6 and a switching circuit 7 that disables the drive lock function of the drive lock circuit 6 in order to facilitate program control abnormality and failure cause analysis.

The detection method in the circuit 4 for detecting program control abnormality uses three methods in combination. The first method uses a programmable timer to detect abnormalities in program control, and the second method uses program controllable drive lock I1.
A third method is to provide a 0 port to detect an abnormality in program control, and a third method is to provide a memory parity detection circuit to detect an abnormality in program control. Therefore, the program control abnormality detection circuit 4 uses the programmable timer 8
．． Dryblock I10 boat9. A memory parity detection circuit 10 is provided. The programmable timer 8 and drive lock I10 port 9 are connected directly, and the memory parity detection circuit 10 is connected directly to the flip-flop (F/F) circuit 11.
are respectively connected to the OR circuit 12 via the . The OR circuit 12 is further connected to the drive lock display circuit 5 and the switching circuit 7, respectively.

Next, the operation of this embodiment will be explained. First, in a method using a programmable timer, an I10 instruction for setting the programmable timer 8 is incorporated into a routine that is always executed within a certain period of time for program control. The timer value TI set at this time is set in the relationship T1>T2 with the time interval T2 of the routine that is always executed. FIG. 2 shows a time chart of a detection method using a programmable timer. If the program control is normal, the programmable timer 8 will not time out. At this time, the output signal 13 of the programmable timer 8 is “0”
becomes. When an abnormality occurs in the program control, the programmable timer 8 is not set, and as a result, the output signal 13 of the programmable timer 8 becomes "1" (drive lock designation) and is output to the OR circuit 12.

Next, the method of using a program-controllable drive lock I10 port is to include an R3T instruction at an address that is never executed under program control, and place an I10 instruction that controls drive lock I10 port 9 at the jump address of the R'ST instruction.
Incorporate instructions. Figure 3 shows an example of the execution of the program. Figure 3 (a) shows the R8T instruction at an address that is not executed due to program control, and Figure 3 (b) shows the I10 port control OUT at the address to which the R3T instruction jumps. It is a command. I1
The 0 port control OUT command is a command to output the drive candle state. Program control becomes abnormal and R3
When the address in which the T instruction is incorporated is executed, the output signal 14 of the drive lock I10 port 9 becomes "1" (drive lock designation) and is output to the OR circuit 12. Also, when the program detects any abnormality in the I10 control, it similarly executes the I10 command to the drive lock I10 port 9, sets the output signal 14 to "1", and outputs it to the OR circuit 12.

When using a hardware memory parity detection circuit, if the memory parity detection circuit 10 detects a memory parity error, program control becomes disabled. Output signal 15 of this memory parity detection circuit 10
is latched by the flip-flop circuit (F/F) 11, and the output signal 16 ("1" - drive lock designation) is ORed.
Output to circuit 12.

The output signals 13, 14, and 15 detected by the above three program control abnormality detection methods are logically ORed by the OR circuit 12, and the output signal 17 is outputted to the switching circuit 7 and the drive lock display circuit 5.

The switching circuit 7 is a circuit for enabling/disabling the drive lock function of the drive lock circuit 6, and its output signal 18 is output to the drive lock circuit 6. When the drive lock function is designated as valid, the state of the output signal 17 of the OR circuit 12 is notified to the drive lock circuit 6 via the switching circuit 7.

When the drive lock function is enabled and the output signal 17 of the OR circuit 12 is in the “1” state, the drive lock circuit 6
The output signal 19 disables the drive circuit 2 (drive lock state), cuts off the drive current, and protects the mechanical load 1 and the drive circuit 2. On the other hand, the drive lock display circuit 5 displays the state of the output signal 17 of the OR circuit 12,
Notifies the outside of abnormal conditions of program control.

Further, by setting the switching circuit 7 to disable the drive lock, the drive circuit 2 is always in an operable state, which facilitates program control abnormality and failure cause analysis.

〔Effect of the invention〕

As explained above, the present invention provides a means for detecting a program control abnormality, a forced driver locking means, and an abnormality content display means, thereby providing advance protection without adding stress to the mechanical load and drive circuit of a printer device, etc. It is also possible to confirm the program control abnormal state using the abnormality display means.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a time chart of a program control abnormality detection method using a programmable timer, and FIG. 3 is a drive lock I10
FIG. 3 is a diagram illustrating an example of a program for program control abnormality detection by a port. l...Mechanical load 2...Drive circuit 3...Control circuit 4...Program control abnormality detection circuit 5°...
・Drive lock display circuit 6... Drive lock circuit 7... Switching circuit 8... Programmable timer 9... Drive lock ■/○ port 10...
Memory parity detection circuit 11...Flip-flop circuit 12...OR circuit

Claims (1)

[Claims] (1) In a protection system for a program-controlled mechanism and a drive circuit that drives the mechanism, a circuit for detecting a program control abnormality, a display circuit indicating that the detection circuit has detected a program control abnormality, and the detection circuit a drive lock circuit that disables the drive circuit in response to an output signal from the drive lock circuit; and a switching circuit that enables or disables the drive lock function of the drive lock circuit, and prevents stress from being applied to the mechanism and the drive circuit. A mechanism and a protection method for a drive circuit, characterized in that the drive current from the drive circuit is cut off without adding any drive current to the drive circuit.