JPS6215154B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an electronic timer in which timer information can be set both in the form of time information and in the form of time information. Conventionally, in this type of device, for example, when timer information is set in the form of time information, morning and afternoon are specified, and when time information is specified in the form of time information, morning and afternoon are specified.
If the timer information is specified in the form of time information, the timer information is stored as it is in the information storage section by one operation of the transfer key, and if the timer information is specified in the form of time information, the timer information is stored as it is in the information storage section. It is known that, by one operation of a transfer key, the time of the information is added to the time information of the clock counting section, and the time information is converted into the form of time information and then stored in the information storage section. However, with such a device, if you forget to specify AM or PM when setting the timer information in the form of time information and specify it in the form of time information, and if you operate the transfer key in this state, the information storage section will not be saved. There was a problem where incorrect timer information was stored. For this reason, this device had the disadvantage that it was necessary to erase the information storage section in which the timer information was erroneously stored, making the operation cumbersome. This invention was devised to solve such a problem, and when timer information is set in the form of time information, depending on one transfer operation, the time information of the clock counter may be changed to the set timer information. The time information obtained by adding the time of the information is displayed to notify the user, and when a retransfer operation is performed thereafter, the timer information is transferred to the information storage section,
An electronic timer device that can detect incorrect settings of timer information before the timer information is transferred to the information storage unit, thereby eliminating the troublesome operation of deleting the information storage unit due to incorrect settings of timer information. The purpose is to provide. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the basic circuit configuration of the entire device, where 1 is a 4-bit 1-chip microcomputer. This computer 1 is an input terminal
An oscillator 2 is connected to OSC1 and OSC2 to obtain a basic operating clock. This computer 1 also has an initialization circuit 3 connected to the input terminal INIT.
is connected, and when the power is turned on to the entire device, the initialization circuit 3 starts execution from a specific command part. The microcomputer 1 is provided with 4-bit parallel input terminals K ₁ , K ₂ , K ₄ , K ₈ as input terminals, and 8-bit parallel output terminals O ₀ , O ₁ , O ₂ , as output terminals.
O ₃ , O ₄ , O ₅ , O ₆ , O ₇ and 16 independent bits
Bit output terminals R ₀ , R ₁ , R ₂ , R ₃ , R ₄ , R ₅ ,
R ₆ , R ₇ , R ₈ , R ₉ , R ₁₀ , R ₁₁ , R ₁₂ , R ₁₃ , R ₁₄ ,
_R15 is provided. A waveform shaping section 4 is connected to the input terminal _K8 , and a time reference signal obtained by shaping the commercial power frequency into a rectangular wave is input thereto. Lines l ₁ , l ₂ , l ₃ connected to the input terminals K ₁ , K ₂ , K ₄ and the output terminals R ₂ , R ₃ ,
Lines _l4 , _l5 , _l6 , _l7 , _l8 , l9 _{, l10} , _l11 , l connected to _R4 , _R5 , _R6 , _R7 , _R8 , _R9 , _{R10 12} constitutes a matrix circuit, and at the intersection of the circuit there is a
EW” “1/MON” “2/TUE” “3/WED”
"4/THU""5/FRI""6/SAT""7/
SUN” “8/M-F” “9/M-S” “AM/11”
"PM/12""ON1""OFF1""ON2""OFF2"
"ALARM""SNOOZE""CLEAR""INPUT"
"STOP""WEEK""CALL""SET""TIME"
Key switches corresponding to the 26 keys ADJ. and CLOCK are arranged as shown in the diagram. This 26
Among the keys, "CALL", "SET" and "TIME ADJ."
” and “CLOCK” form each mode changeover switch of the mode selection section 5, and the remaining 22 are used to store information such as timer information, time information, clear signal, transfer signal, etc.
A signal input section 6 is formed. Said output terminal _R11
An open/close type 50/60Hz frequency selection switch 7 is connected between the input terminal K1 and the input terminal _K1 . Said output terminal
R ₂ -R ₈ are also connected to the grid of the fluorescent display 8. The output terminals O ₀ to O ₇ and the output terminal R ₀ ,
R ₁ and R ₁₂ are connected to each segment of the fluorescent display 8. That is, the fluorescent display 8 has a seven-digit configuration as shown in FIG. 2, and the first digit display section 8-1
is provided with a 7-segment numerical display element 8-1a, a 1-segment sound alarm mark display element 8-1b, a 1-segment Sunday display element 8-1c, and a 2-segment numerical display element 8-1a.
The digit display section 8-2 is provided with a 7-segment numerical display element 8-2a, a 1-segment weekly operation mark display element 8-2b, and a 1-segment Saturday display element 8-2c. Also, the third digit display section 8
-3 is a segment numerical display element 8-3a, 1
A segment Friday display element 8-3b and a 1-segment decimal point display element 8-3c are provided, and the fourth digit display section 8-4 includes a 7-segment numerical display element 8-4a and a 1-segment Thursday display element 8. −
4b, and the fifth digit display section 8-5 is provided with a two-segment colon display element 8-5a and a one-segment Wednesday display element 8-5b. Further, the sixth digit display section 8-6 is provided with a 7-segment numerical display element 8-6a and a 1-segment Tuesday display element 8-6b, and the seventh digit display section 8-7 is provided with a 7-segment numerical value display element 8-6a. Display element 8-7
a, a one-segment Monday display element 8-7b is provided. And each digit display section 8-1 to 8
-7 grids are connected to digit terminals G ₁ ~
Connected to _G7 . Also, each digit display section 8-1
~ 8-7 Each segment of the numerical display element has the a segment connected to terminal a, the b segment connected to terminal b, the c segment connected to terminal c, the d segment connected to terminal d, and the e segment. is connected to terminal e, and the f segment is connected to terminal f
and the g segment is connected to terminal g. Also, two segments of the colon display element 8-5a are connected to the terminal f, and the decimal point display element 8-3 is connected to the terminal f.
The segment of c is connected to terminal D _p . Furthermore, each day of the week display element 8-1c, 8-2c, 8-3
b, 8-4b, 8-5b, 8-6b, 8-7b are connected to the terminal W, the segment of the alarm display element 8-1b is connected to the terminal AL, and the segment of the operation mark display element 8-2b is connected every week. Segment is connected to terminal EW. Then, the digital terminals G1 to _G7 are connected to the output terminals _R2 to _R8 of the microcomputer ₁ , respectively, and the output terminals
Terminals a to g and D _p are connected to O ₀ to O ₇ , respectively. Further, the terminal AL is connected to the output terminal _R0 , the terminal EW is connected to the output terminal _R1 , and the terminal W is connected to the output terminal _R12 . With this circuit configuration, the fluorescent display 8 is dynamically displayed by the microcomputer 1. Note that the output terminals R ₂ to _{R 8}
Diodes 9 for preventing signals from being routed from the key matrix to the fluorescent display 8 are inserted in the lines _l4 to _l10 connected to the lines l4 to l10 in the polarity shown. Further, the input terminal of the alarm frequency oscillation section ₁₀ is connected to the output terminal R13 of the microcomputer 1. This alarm frequency oscillator 10 performs an oscillating operation when the output of the output terminal _R13 is logic "1", and the oscillation output is sent to the alarm device 1 via the alarm changeover switch 11.
I am trying to supply it to 2. The changeover switch 11 is a three-contact switch, and when the common contact 11t is connected to the fixed contact 11a, the oscillation output is input to the sound alarm device 12 via the resistor 29, and the common contact 11t is connected to the fixed contact 11b. When this happens, the oscillation output is directly input to the notification device 12, and when the common contact 11t is connected to the fixed contact 11c, the oscillation output is prohibited from being input to the notification device 12. That is, the fixed contact 11a
is a low volume output contact, fixed contact 11b is a high volume output contact, and fixed contact 11c is a sound stop contact. Further, reference numeral 13 denotes fixed contacts 13a, 13b, 13c and a common contact 13 selectively connected to each fixed contact.
The common contact 13t of this changeover switch 13 is a 3-contact type first power changeover switch consisting of
is connected to the +V terminal via the first relay coil 14, the fixed contact 13a is grounded via the first NPN transistor 15, and the fixed contact 13b is connected to the +V terminal via the first relay coil 14.
is directly grounded. Note that the fixed contact 13c is a non-connecting contact. A normally open contact 14a energized by the first relay coil 14 is inserted into a first power outlet circuit (not shown). A protection diode 16 and a series circuit of a resistor 17 and a light emitting diode 18 are connected in parallel to the first relay coil 14 . and the first
The base of the transistor 15 is connected to the output terminal _R14 of the microcomputer 1 via a resistor 19. Note that the first transistor 15
A resistor 20 is connected between the base and emitter of. Reference numeral 21 denotes fixed contacts 21a, 21b, 21c and a common contact 2 selectively connected to each fixed contact.
This is a 3-contact type second power changeover switch consisting of 1t, and the common contact 21 of this changeover switch 21
t is connected to the +V terminal via the second relay coil 22, the fixed contact 21a is grounded via the second NPN transistor 23, and the fixed contact 21a is connected to the +V terminal via the second relay coil 22.
b is directly grounded. Note that the fixed contact 21c is a non-connecting contact. A normally open contact 22a energized by the front second relay coil 22 is inserted into a second power supply set circuit (not shown). A protection diode 24 and a series circuit of a resistor 25 and a light emitting diode 26 are connected in parallel to the second relay coil 22 . and the second
The base of the transistor 23 is connected to the output terminal _R15 of the microcomputer 1 via a resistor 27. Note that the second transistor 23
A resistor 28 is connected between the base and emitter of. In both circuits, the power selector switch 1
Common contacts 13t and 21t of 3 and 21 are fixed contacts 1
3a, 21a, the relay coils 14, 22 output terminals R ₁₄ , R ₁₅ at logic “1”.
When the transistors 15, 23 are energized by the output, they are energized, and when the common contacts 13t, 21t are connected to the fixed contacts 13b, 21b, the relay coils 14, 22 are always energized, and the common contact 13t is energized. , 21t are connected to the fixed contacts 13c, 21c, the relay coils 14, 22
will continue to remain inactive. FIG. 3 is a block diagram showing the basic circuit configuration of the microcomputer 1, in which 31 is a central processing unit (CPU), 32 is a random access memory (RAM), 33 is a read-only memory (ROM), and 36 is a block diagram showing the basic circuit configuration of the microcomputer 1. is an input port, 37 and 38 are output ports, 39 is a data bus, and 40 is an address bus.
Buses 41, 42, and 43 are control signal lines. The CPU 31 includes an arithmetic circuit, a program counter, a control circuit, an instruction decoder,
A command register and a memory for storing other processing signals are built-in, and the RAM 3
2. The ROM 33 and output ports 37 and 38 are controlled via a data bus 39, an address bus 40, and control signal lines 41, 42, and 43, respectively. The RAM 32 has a 128 word x 4 bit configuration and has various storage sections formed therein. Said ROM
33 has a capacity of 2 Kbytes, and stores programs for the CPU 31 to control each section according to input. Input port 36 is input terminal K ₁ ~
It is designed to input the signal from _K8 . The output port 37 outputs signals to output terminals _O0 to _O7 , and the output port 38 outputs signals to output terminals _R0 to _R15 . The RAM 32 is addressed by a 3-bit X register and a 4-bit Y register;
Each address consists of a memory with 1 word and 4 bits. Below, each word is indicated by M[X, Y], and the bit within the word is indicated by M[X, Y]<b>.
Regarding the memory configuration, as shown in FIG. 4, M[0,0] to M[0,8] are a setting storage section or a setting storage section for setting the information input from the information/signal input section 6, or as described later. The display storage section is used to display the contents of the clock counting section and each information storage section. M[0,9] is a blinking mode storage unit that stores information on whether or not the display is blinking, and which part of the display 8 should be blinked when the display is blinking.
M[0,10] is a mode storage section that stores the mode selection state of the mode selection section 5. M
[0,11]<3><2> is the counting control section, and M
[0,11]<2> constitutes a memory that stores whether or not to count up the second counting section, which will be described later, and M[0,11]<3> stores the state of the input terminal _K8 . Configuring memory. M[0,12]
is a routine control section in the form of a decimal counter for sequentially controlling the dynamic display of the fluorescent display 8, the judgment of the switch states of the mode selection section 5, the information/signal input section 6, and the frequency changeover switch 7; It is said that M[0,13] is a display mode storage unit that stores which of nine display modes to be described later. M
[0, 14] is an input information storage unit that stores the states of input terminals K ₁ , K ₂ , and K ₄ . M [0,15]
is a first counting section in the form of a hexadecimal counter that counts the commercial power frequency pulses input to the input terminal _K8 . M[1,0]<3><2> constitutes a sound alarm state storage section, M[1,0]<2> constitutes a memory that stores the sound alarm operation state, and M[1,0]
<3> constitutes a memory that stores the snooze operation state. M[1, 14] is a snooze counter that counts the time of the snooze operation. M
[1,15], M[1,1] to M[1,7] are clock counting units that count the time. M [1,8]
.about.M[1,13] is a second counting section that functions as a stopwatch. M [2,0]
~M[2,6],M[3,0]~M[3,6],M
[4,0]~M[4,6],M[5,0]~M
[5,6], M [6,0] ~ M [6,6], M
[7,0]~M[7,6],M[2,7]~M
[2,13], M [3,7] ~ M [3,13], M
[4,7]~M[4,13],M[5,7]~M
[5,13], M [6,7] ~ M [6,13], M
[7,7] to M[7,13] are the first to the first
There are 12 information storage units. M[2,14]<3
＞<2> is the switch operation state storage unit, and M
[2, 14] <3> constitutes the first switch operation state memory, and when this bit is logic "1", the output terminal R ₁₄ is set to logic "1", and when it is logic "0", the output terminal R ₁₄ is set to logic "1". is set to logic "0". M
[2, 14] <2> constitutes the second switch operation state memory, and when this bit is logic "1", the output terminal R ₁₅ is set to logic "1", and when it is logic "1", the output terminal R ₁₅ is set to logic "1". is set to logic "0". M
[2,14]<1><0>, M[2,15] is a comparison between the clock counter and the 12 information storage units, and if there is an information storage unit with the same time, then the information storage unit is According to the controlled object motion information, if it is snooze motion information, logic “1” is set to M[2,14]<1>.
is set, and if it is alarm operation information, M[2,
14] Set logic “1” to <0>, and set M if it is the operation information of the first power outlet circuit (ON1).
[2,15] Set logic “1” to <3>, and
If the second power outlet circuit is off (OFF1) operating state, M[2,15]<2> is set to logic “1”, and if the second power outlet circuit is on (ON2) operating information, M[2,15]<2> is set to logic “1”. 15] If <1> is set to logic “1” and the second power outlet circuit off (OFF2) operation information is set, M[2,1
5] A comparison result storage unit that sets logic "1" to <0>. M[7, 14] is a comparison control unit that is a hexadecimal counter and is used to sequentially control the comparison when checking the coincidence of times between the clock counting unit and the 12 information storage units every minute. .
When all time comparisons between the clock counter and the 12 information storage units are completed by this comparison control unit, based on the contents of the comparison result storage unit, the alarm state storage unit M[1,0]<3><2 > and the switch operation state storage section M[2,14]<3><2> to store logic signals. M[3,14],
M[3,15] is on-chatter of key operation,
This is a key input control section for preventing off-chattering and for preventing simultaneous operation of two or more keys using software. M[5,14],M
[6,14] is the setting storage section M[0,0]~M
This is an information setting storage section used for control when setting and storing the information [0, 8] in one of the 12 information storage sections. M[5,15], M[6,15] are
The display 8 displays information from one of the 12 information storage units.
This is an information display control section used to control when storing settings in the display storage section for displaying the information.
Writing and reading control of logic signals to and from each of these storage sections is performed by the CPU 31 based on a program set in the ROM 33. When the above-mentioned M[0,0] to M[0,8] function as the display storage section of the clock counting section M[1,15], M[1,1] to M[1,7], the display shown in FIG. As shown, M[0,0] and M[0,1] constitute the day of the week display memory, M[0,0]<3> is the Sunday display memory, and M[0,0]<2> is the Saturday display memory. memory, M
[0,0]<1> is Friday display memory, M[0,0]
<0> is Wednesday display memory, M[0,1]<3> is weekly display memory, M[0,1]<2> is Thursday display memory, M[0,1]<1> is Tuesday display memory,
M[0,1]<0> becomes the Monday display memory. This day of the week display memory contains M [1, 7] of the clock counter.
According to the day of the week information, logic "1" is set in the corresponding display memory. Also M [0,
2] to M[0,8] constitute a time display memory,
M[0,2] is 1 second display memory, M[0,3]
is 10 seconds display memory, M[0,4] is 1 minute display memory, M[0,5] is 10 minute display memory, M
[0,6] is 1 o'clock display memory, M[0,7]<1
><0> is 10 o'clock display memory, M[0,7]<3
> is the morning display memory, M[0,7]<2> is the afternoon display memory, and M[0,8]<3> is the colon display memory. And M[1,2]~M[0,
6] is the clock counter's 1 second range, 10 second range, 1 minute range,
Information for the 10 minute range and 1 o'clock range is stored. M[0,
7] <1><0> is set to logic "1" when there is information on the 10 o'clock range in the clock counter, and set to logic "0" when there is no information on the 10 o'clock range.
M[0,7]<3> is set to logic "1" when there is morning information in the clock counter, and M[0,7]<3>
2> is set to logic "1" when there is afternoon information in the clock counter. M[0,8]<3> is set to logic "1". When the above M[0,0] to M[0,8] function as the display storage section of each information storage section, as shown in FIG. A day of the week display memory similar to that shown in FIG. 5 is constructed. For M[0,2], M[0,2]<1>
constitutes a snooze display memory, and M[0,2]<0> constitutes an alarm display memory. Regarding M[0,3], M[0,3]<3> is ON1 display memory, M
[0,3]<2> is OFF1 display memory, M[0,
3] <1> is ON2 display memory, M[0,3] <0>
constitutes the OFF2 display memory. M[0,4],
M[0,5], M[0,6], M[0,7], M
Regarding [0, 8], a time display memory similar to that shown in FIG. 5 is constructed. The clock counting section M[1,15], M[1,1]
〜M[1,7] is M[1,1] as shown in FIG.
5] <2><1><0> is a 1/50 or 1/60 second counter, M[1,1] is a 1/10 second counter, M
[1,2] is a 1 second counter, M[1,3]<2>
<1><0> is a 10-second counter, M[1,4] is a 1-minute counter, M[1,5]<2><1><0
> is configured as a 10-minute counter, and M[1,6] is configured as an hour counter. Also, M[1,5]<3> is morning/afternoon memory, M[1,7]<2><1><0
> is configured in the day of the week memory. Said M[1,
15] <2><1><0> functions as a quinary counter when the power supply frequency is 50Hz, and functions as a hexadecimal counter when the power frequency is 60Hz. Said M[1,
1], M[1,2], M[1,4] function as decimal counters, M[1,3]<2><1><0
>, M[1,5]<2><1><0> function as a hexadecimal counter, and M[1,6] function as a hexadecimal counter. M[1,5]<3> is set to logic "1" in the morning and set to logic "0" in the afternoon. M[1,7]<2><1
＞<0> is a binary data of logic "1" and "0", so it is "1" on Monday, "2" on Tuesday,
"3" is stored for Wednesday, "4" for Thursday, "5" for Friday, "6" for Saturday, and "7" for Sunday. As shown in FIG.
7, 0 or 7], M [2 to 7, 1 or 8] constitute the day of the week information memory. The arrangement of the day-of-week memories in this memory is similar to that in FIG. For M[2-7, 2 or 9], M[2
~7, 2 or 9] <1> is snooze information memory,
M[2-7, 2 or 9]<0> constitutes an alarm information memory. M [2-7, 3 or 10]
For M[2-7,3 or 10]<3>
ON1 information memory, M [2 to 7, 3 or 10] <2
> is OFF1 information memory, M [2 to 7, 3 or 1
0]<1> constitutes the ON2 information memory, and M[2 to 7, 3 or 10] <0> constitutes the OFF2 information memory. M [2 to 7, 4 or 11] constitutes a 1-minute information memory, and M [2 to 7, 5 or 12] <2><
1><0> constitutes a 10-minute information memory, and M[2
~7, 6 or 13] constitutes a timetable information memory,
And M [2 to 7, 5 or 12] <3> constitutes the Ushimae/Afternoon information memory. The second counting section M[1,8] to M[1,1
3], as shown in Figure 9, M[1, 8] is a 1-second counter, M[1, 9] is a 10-second counter, and M
[1,10] is a one-minute counter, M[1,11]
is a 10-minute counter, M[1, 12] is a 1-o'clock counter, and M[1, 13] is a 10-o'clock counter. Said M[1,8], M[1,10], M
[1,12] and M[1,13] function as decimal counters, and M[1,9] and M[1,11] function as hexadecimal counters. That is, the second counting section M[1,8] to M[1,1
3] is a counter from 1 second to 99 hours, 59 minutes, and 59 seconds. Next, the control of the fluorescent display 8 by the microcomputer 1 will be described. Each segment control terminal a, b, c, d, e, f, g, D _p of the display 8 will be described.
The display pattern information is displayed on microcomputer 1.
Each output terminal O ₀ , O ₁ , O ₂ , O ₃ , O ₄ , O ₅ , O ₆ ,
The display pattern information is generated by decoding a total of 5 bits of information from a 4-bit accumulator and 1 _- bit status latch inside the microcomputer 1 using a programmable logic array. . This bit information is as shown in Table 1 when the status latch is at logic "0", and as shown in Table 2 when the status latch is at logic "1". In other words, when the status latch is at logic "0" and the contents of the accumulator are between 0 (0000) and 9 (1001), display pattern information that displays the corresponding numerical value and decimal point is output, and when it is 10 (1010), it is output as " Outputs display pattern information to display "A", and outputs display pattern information to display "U" when it is 11 (1011),
When it is 12 (1100), it outputs display pattern information to display "C", and when it is 14 (1110), it outputs display pattern information to display "L",
Display pattern that displays "F" when 15 (1111)

【table】

【table】

[Table] Information is output. Note that when the content of the accumulator is 13 (1101), it is not displayed. Also, when the status latch is logic "1", the c segment is displayed when the <0> bit of the accumulator is logic "1", and <
When the 1st bit is logic "1", display the b segment, and when the 2nd bit is logic "1", display the e segment.
The bits <0><1><2><3> of the accumulator and c, b, e of the display 8 are set so that the f segment is displayed when the <3> bit is logic "1". , f are arranged in a one-to-one correspondence with each other, and display pattern information is output. Next, display memory section M[0,0] to M of RAM32
The fifth clock counter information is set to [0,8].
Regarding the control of the fluorescent display 8 in the case shown in the figure, the information of M[0,2] is _G1 digit, M
[0,3] information is _G2 digit, M[0,4]
The information is G ₃ digits, and the information M[0,5] is
Control is performed to sequentially display the _G4 digit, the M[0,6] information on the _G6 digit, and the M[0,7] information on the _G7 digit. At this time, if logical "1" is set in Monday display memory M[0,1]<0> among day of the week display memories M[0,0] to M[0,1], the _G7 digit is displayed. At this time, a logic "1" is output to the output terminal _R12 . When displaying the _G7 digit and _G5 digit, the status latch is set to logic "1" and the display is controlled in the format shown in Table 2.
When displaying each of the digits G ₁ , G ₂ , G ₃ , G ₄ , and G ₆ , the status latch is set to logic "0" and the display is controlled in the format shown in Table 1. The morning information is displayed by the f segment of the _G7 digit, and the afternoon information is displayed by the e segment of the _G7 digit. Therefore, if the time information of, for example, 12:25:34 a.m. on Monday is set in the display storage section, the display on the fluorescent display 8 will be as follows.

[Table] 1 2 〓 2 5. ₃₄
And if the time information of 3:56:17 on Wednesday is set, the display on the fluorescent display 8 will be:

【table】 -
becomes. Next, display memory section M[0,0] to M of RAM32
6th with information in the information storage section set to [0, 8]
Regarding the control of the fluorescent display 8 in the case shown in the figure, M[0,0], M[0,1], M[0,
4], M[0,5], M[0,6], M[0,7]
The information is exactly the same as when displaying time information. The snooze display information of M[0,2]<1> is displayed by the b segment of the _G1 digit, and the alarm display information of M[0,2]<0> is displayed by the c of the _G1 digit. This is now done in segments. Also M [0,
3] Display of ON1 display information of <3> is performed by f segment of _G2 digit, and M[0,3]
The display of the OFF1 display information in <2> is performed by the e segment of the _G2 digit, and M[0,3]<
1> ON2 display information display is _G2 digit b
segment, and M[0,3]
The OFF2 display information of <0> is displayed by the c segment of the _G2 digit. Also, since the information in this information storage section is timer information, it is possible to set the timer operation to be repeated every week.
1 or 8] by setting logic "1" to <3>. Therefore, at this time, logic "1" is set in M[0,1]<3> of the display storage section. In such a case, a logic " ₁ " is output to the output terminal R1 when displaying the _G2 digit. Therefore, if timer information is set in the display storage section to turn on the first power outlet circuit at 8:00 pm on Friday, for example, the fluorescent display 8 will display:

【table】 - -
If timer information is set to turn on the second power outlet circuit and perform the snooze operation every Monday, Tuesday, Wednesday, Thursday, and Friday at 7 a.m., the display on the fluorescent display 8 will be as follows. ,

【table】 - - -
7 〓 0 0.
becomes. In the apparatus of the present invention constructed in this manner, various controls are performed by the four mode changeover switches of the mode selection section 5 and the 22 keys of the information/signal input section 6. (1) Clock setting mode This mode is set to “TIME” in mode selection section 5.
This mode is set by operating the "ADJ." key, and is a mode in which time information is set in the clock counter. In this mode, the "WEEK" key is used to invert the contents of M[0,8]<3>, lighting up the colon segment of the _G5 digit when it becomes a logic "1", and turning it on when it becomes a logic "0". Turn off the light when it gets cold. “1/
MON”, “2/TUE”, “3/WED”, “4/
THU”, “5/FRI”, “6/SAT”, “7/
Each key of "SUN" has the function of specifying the day of the week from Monday to Sunday as a day of the week specification key when M[0,8]<3> is logic "1".
When [0,8]<3> is logical "0", it has the function of specifying a numerical value from 1 to 7 as a numeric key. When each of the above keys is used as a day of the week designation key, M [0, 0], M in the designation storage section is used.
Set the day of the week memory corresponding to [0, 1] to logic “1”
and the others are set to logic "0", and the corresponding day segment of the fluorescent display 8 is lit. At the same time, M[0,8]<3> is set to logic "0" and the colon segment is turned off, indicating that the next time each key is operated, it will be used as a numeric key. This control is based on the fact that only one type of day of the week can be specified when setting time information. When each of the keys is used as a numeric key, numeric data is set in M[0,2] of the setting storage section. As a result, the data that was previously set to M[0,2] becomes M
Transferred to [0,3], and then M[0,3] → M
[0,4], M [0,4] → M [0,5], M
The data will be transferred from [0,5] to M[0,6]. When the data transferred from M[0,5] in M[0,6] is 0, 1, or 2, and the data set before it is 1, M[0,7]<1. ><0> is set to logic “1”, otherwise M[0,7]<1><0>
is set to logic “0”. As a result, M
The data set to [0, 2] is 1 on the display 8.
The _G1 digit 8-1 is used to display seconds, and the data that was displayed before is transferred and displayed one digit at a time. At this time, when the _G7 and _G6 digits 8-7 and 8-6 display 13 o'clock or more, the _G7 digit 8-7, that is, the 10 o'clock digit display section, is turned off. "0/EW", "8/M~F", "9/M~
Each key of "S" functions as a numeric key regardless of whether the theoretical value of M[0,8]<3> is "0" or "1". When each key is operated, if M[0,8]<3> is logic "1", it is inverted to logic "0". Of course, the data for each key is set to M[0,2]. “AM/
11” key is the key for specifying the morning, M[0,7]<3
> is logic "1" and M[0,7]<2> is logic "0" to light up the f segment of _G7 digit 8-7. "PM/12" key is the key for afternoon designation.
[0,7]<3> is logic “0”, M[0,7]<2
> is set to logic "1" to light up the e segment of _G7 digit 8-7. This “AM/11”
key, "PM/12" key are both M[0,8]<
3> is logic "1", it is inverted to logic "0" and the colon segment is turned off. "CLEAR"
The key is used to erase the setting memory section when a setting is made incorrectly. By operating this key, the setting memory section M[0,0], M[0,1], M
Set "0" to [0,2], M[0,3], M[0,8], "12" to M[0,4],
"13" in M[0,5], "13" in M[0,6],
Set “10” to M[0,7]. And M
For [0,2] to M[0,3], M[0,8], set the status latch to logic “1” and set the second
In the format shown in the table, M[0,4] to M[0,7]
, the status latch is set to logic "0" and displayed on the display 8 in the format shown in Table 1.
Therefore, the display at this time will be AC. This display control is performed in the same way when the mode is switched from another mode to the clock setting mode in the mode selection section 5, and it is displayed that the address has become the clock. In this clock setting mode, the display format must be set as status latch "0" or "1".As mentioned above, there are two display modes: clock display mode and address display mode.
This is stored in the display mode storage section of M[0,13]. When the mode in the mode storage section M[0,10] differs from the mode in the mode selection section 5, that is, when the mode in the mode selection section 5 is switched from another mode to the clock setting mode, press the "CLEAR" button. When is operated, the display mode is set to address display mode, and in the address display mode, "0/EW" ~ "9/M ~"
By setting the display mode to clock display mode when each of the "S" keys, "AM/11", and "PM/12" keys are operated, it is possible to set both display formats in both display modes without any problems. I have to. The "STOP" key sets M[1,0]<2> to logic "0" when M[1,0]<3> is logic "1" and sets the count value of M[1,14] to 0. , M[1,0]<3> are logic "0", M[1,0]<2> is set to logic "0", which will be described in detail later. In this clock setting mode, "ON1", "OFF1", "ON2",
The "OFF2", "ALARM" and "SNOOZE" keys have no meaning. The "INPUT" key is a transfer key for transferring time information set in the setting storage section to the clock counter. When this key is operated, if the contents of the setting storage section are correct as time information, this time information is transferred to the clock counter, and M[1, 14], M[1, 15], M
[1,0], M[1,1], M[0,15] are cleared to zero, M[0,11]<3> is set to logic “0”, and M[0,13] ] is stored in the display mode storage unit, and the setting storage unit is set to that display mode. Then, "AC" is displayed on the display 8, indicating that the clock address has been correctly set. The meaning of setting M[1,14], M[1,0] to zero will be explained later, but M[1,1
5], M[1,1], M[0,15] are set to zero and M[0,11]<3> is set to logic "0", which means that the counter of less than 1 second is reset to zero. . Further, when the time information set in the setting storage section is not correct, the following control is performed. First, if neither morning nor afternoon is specified, this is displayed. For example, if you operate the "INPUT" key in address display mode, the display mode storage section will be set to clock display mode and M[0,
0], M[0,1], M[0,7] to zero,
Set logic “0” to M[0,8]<3>,
M[0,2], M[0,3], M[0,4], M
After setting [0,5], M[0,6] to 13, it will display that there is no morning or afternoon specification. This display is
This is done by repeatedly turning on the e and f segments of the _G7 digit for 0.5 seconds and turning them off for 0.5 seconds. That is, the value according to the type of blinking, in this case, the value according to the morning and afternoon blinking modes, is stored in the blinking mode storage section of M[0,9], and the blinking cycle is M[1,1]. Setting is made by turning off the light when the count value is 0 to 4 and turning on the light when the count value is 5 to 9 using a 1/10 second counter. Segments other than this segment are displayed according to the contents of the setting storage section. Also, when performing this blinking, M[0,8]<3> is set to logic "0" and no colon segment is displayed. Then, when the "AM/11" key and the "PM/12" key are pressed, this blinking operation is stopped and the control operation by operating these two keys described above is performed. Second, if there is no day of the week specification, that is, M[0,0], M
When [0, 1] are all logical “0”, day segments 8-7b, 8-6b, 8-5b, 8
-4b, 8-3b, 8-2c, and 8-1c are all displayed blinking at 0.5 second intervals. In this case M
The flashing mode storage section [0, 9] stores the value according to the day of the week flashing mode, and also stores M.
[0,8] Set logic “1” to <3>, then “1/MON”, “2/TUE”, “3/WED”,
“4/THU”, “5/FRI”, “6/SAT”, “7/
When the "SUN" keys are operated, these keys function as day-of-the-week designation keys. Further, the blinking period is set by M[1,1] as in the case where morning or afternoon is not specified as described above. Segments other than this segment are displayed according to the contents of the setting storage section. Thirdly, if the time value is not normal, that is, in the 12-hour display system, when setting time information, a value other than 1:00:00 to 12:59:59 is not possible, so for example, 12 minutes 15 seconds. Or 12 o'clock
The number 72 minutes and 98 seconds is incorrect information. In such a case, the numerical value is displayed blinking as it is. That is, when M[1,1] is between 0 and 4, the numerical value remains lit, and when it is between 5 and 9, nothing is displayed in the time section. Also, at this time, M[0,8]<3> is set to logic "0" and then "1/MON" to "7/
When the keys up to "SUN" are operated, these keys function as numeric keys. Segments other than this segment are displayed according to the contents of the setting storage section. (2) Information setting mode This mode is set by operating the "SET" key of the mode selection section 5, and is a mode in which timer information is set in one of the 12 information storage sections. In this mode, when the mode is switched to the information setting mode in the mode selection section 5 or when the "CLEAR" key is operated, the address of the storage section for which timer information is not set among the 12 information storage sections is selected. , with priority given to the one with the younger address, and set the value according to that address in the information setting control section of M[5,14], M[6,14], and
The setting memory section of [0,8] contains M[0,0], M
Set zero to [0,1], M[0,2], M[0,3], set 13 to M[0,6], and set M[0,7] to
10 respectively, and set M[0,8]<3> to logic "0". Also, when the address is 0 to 9, the address number is set to M[0,4], and M
When [0,5] is set to 13, and the address is 10 to 12, M[0,4], M[0,
5] Set the address number. For example, if the unset address is number 1, the display 8 will show "A".
1” is displayed, and when it is number 12, “A 12” is displayed.
is displayed. At this time, the address display mode is stored in the display mode storage section M[0,13]. There are two display modes in this information setting mode, the above-mentioned address display mode and information display mode (see Figure 6), and mode change from address display mode to information display mode is the same as in the clock setting mode described above. M[0,13]
An information display mode is stored in place of the address display mode. At this time, M
[0,0]=0, M[0,1]=0, M[0,
2]=0, M[0,3]=0, M[0,4]=
13, M [0,5] = 13, M [0,6] = 13, M
Set [0,7]=0 and M[0,8]<3
> is set to logic "0" to prepare for setting new key setting information. Also, when searching for unset information storage in this information setting mode, 12
Especially when all the information storage units have already been set, M[0,4]=14, M[0,5]=
14, set M[0,6]=11, M[0,7]=15, and set M[3,15]<3> to logic "1". As a result, the display 8 displays FU LL to indicate that all information storage units are set. Also, among the key input control units, M[3,
15] <3> is set to logic "1", but this bit is a key input prohibition bit. When this bit is logic "1", all key input operations are prohibited, even if a key operation is performed by mistake. The display continues to show "FULL". In this information setting mode, the "CLEAR" key is used to clear the setting storage section, similar to the clock setting mode described above, and the contents and display of the setting storage section after operating this key are as described above. The "WEEK" key has the same effect as the clock setting mode described above. "0/EW", "1/
MON”, “2/TUE”, “3/WED”, “4/
THU”, “5/FRI”, “6/SAT”, “7/
The ten keys "SUN", "8/M~F", and "9/M~S" are It has a function as a number key, and sets the numerical value input by this to M[0,4].
Then, the values previously set in [0,4] to M[0,6] are sequentially transferred to the upper counter as in the clock setting mode, and M[0,6] is set to M[0,5]. If the data transferred from is 0, 1, or 2, and the data set before it is 1, M[0,7]<
1><0> is set to logic "1", and the others are set to logic "0". As a result, the newly set value for M[0,4] is displayed on the 1-minute display section of the _G3 digit, and the previously displayed values are shifted one digit higher. and
When the _G7 and _S6 digits display 13 o'clock or more, the _G7 digit is turned off. Also, these 10 keys are M[0,
8] When <3> is set to logic "1" and the colon segment is lit, it functions as a day of the week designation key. In other words, “1/
MON” key “7/SUN” key corresponds to Monday to Sunday, and by operating this key
The corresponding bits of [0,0] and M[0,1] are set to logic "1" and the corresponding day of the week display segment of the display 8 is lit.
The "F" key corresponds to the five days of the week from Monday to Friday, and by operating this key, <1>, <0> of M[0,0] and <2>, <1 of M[0,1]
The five bits >, <0> are set to logic "1", and the weekday segments of Monday, Tuesday, Wednesday, Thursday, and Friday on the display 8 are lit. “9/M~
The "S" key corresponds to all days of the week from Monday to Sunday, and by operating this key, <3>, <2>, <1>, <0> of M[0,0] and M[0,
1], the seven bits <2>, <1>, and <0> are set to logic "1" and all day of the week display segments on the display 8 are lit. “0/
The "EW" key is a key for specifying weekly operations, and the key is M[0,
1] Set logic “1” to <3> and display the weekly operation mark segment 8-2b on the display 8.
lights up. The weekly operation here means that the timer operation on the set day of the week is performed every week. The timer information set without operating the "0/EW" key is cleared and reserved as an unset address when the timer operation based on the information is started. In the clock setting mode described above, M[0,8]<3> is set to logic "1" to provide a day of the week designation function when operating the keys "1/MON" to "7/SUN".
In this state, when one key is operated to specify the day of the week, M[0,8]<3> is set to logic "0", and the next time each key is operated, it is used as a numeric key. However, in this information setting mode, multiple day of the week information can be set in one information storage unit, so two or more of the above 10 keys may be operated in succession. There is also. Therefore, in this information setting mode, M[0,8]<3> is maintained at the logic "1" state even if the above ten keys are operated. However, when all bits of M[0,0] and M[0,1] become logic "1" by this key operation, no more days of the week can be specified, so M
[0,8]<3> is set to logic "0" so that these 10 keys will function as numeric keys the next time they are operated. "AM/11" key,
The "PM/12" key and the "STOP" key have the same functions as in the clock setting mode described above. "ON1", "OFF1", "ON2",
The six keys "OFF2", "ALARM", and "SNOOZE" are operation information setting keys for the controlled object, and when these keys are operated, M[0,8]<3> is set to logic "0". Set. And the “ON1” key sets M[0,3]<3> to logic “1”, M[0,
3] Set <2> to logic “0”, turn on the f segment of _G2 digit, turn off the e segment,
The "OFF1" key sets M[0,3]<3> to logic "0" and M[0,3]<2> to logic "1".
G ₂ digit e segment turns on, f segment turns off, "ON2" key is M [0, 3] <
1> is logic "1", M[0,3]<0> is logic "0", the b segment of the _G2 digit is turned on, the c segment is turned off, and the "OFF2" key is set to M[0,3]. <1> is logic “0”, M[0,
3] Set <0> to logic "1" to turn on the c segment of the _G2 digit and turn off the b segment. Also, the “ALARM” key is M[0,2]<1>
is logic “0”, M[0,2]<0> is logic “1”
Lights up the c segment of the G ₁ digit as
Turn off the b segment and press the “SNOOZE” key to M
[0,2]<1> is logic “1”, M[0,2]<0
> is set to logic "0" to turn on the b segment of the _G1 digit and turn off the c segment.
The "INPUT" key has a more complex function than the clock setting mode mentioned above. First, when normal timer information is set in the setting storage section in the form of time information, the format is determined by one operation of the "INPUT" key, and the timer information is stored in the information setting control section M [5, 14], M[6, 14] to the information storage unit, and the address to be set next in the same manner as when the mode is switched to the information setting mode by the mode selection unit 5. is searched for, the address is stored in the information setting control section, this address is set in the setting storage section, and this address is displayed on the display 8 in the address display mode. This allows the user to know that the information has been reliably set in the information storage section and to know the next setting address.
Next, if the timer information is in the form of time information without any specification of morning, afternoon, or day of the week, it is determined that the time is specified when the "INPUT" key is operated.
In this case, the time specified and displayed by one operation of the "INPUT" key is added to the time information of the clock counter, and the obtained time is reset to the setting storage section and displayed on the display 8. do. In this process, the 1 minute and 10 minute digits are processed by 4-bit parallel addition, but special calculation processing is performed for the hour range. This is because the calculation result may affect the bits designated for morning and afternoon and the designated bits for the day of the week. Here, the time that can be added to the time information of the clock counter is 0 minutes ~
The deadline is 12:99 (13:39). In this way, when adding 13:39, if there is a carry from the 10 minute range, the value added to the hour digit will be 14. In other words, the maximum value added to the hour digit is 14. Therefore, when 4-bit parallel addition is performed for the time table, the result obtained is a value from 1 to 26. If this addition result is in the range 1 to 11, there is no problem because there is no switching between morning, afternoon, and day of the week, but 12
When the situation exceeds the above, various judgments are required. For example, when the clock reaches 12, it is necessary to judge whether or not it is necessary to change the morning and afternoon bits depending on whether the time in the clock counter is over 12 o'clock or less than 12 o'clock, and from pm to am. When doing so, you will also need to change the day of the week.
Also, when the clock reaches 13, the time must be changed to 1 o'clock, and changes to morning, afternoon, and day of the week must be determined based on whether the time on the clock counter is more than 12 o'clock or less than 12 o'clock. This is done in the same way for 14th and 15th, and it is necessary to change the time to 2 o'clock at 14 and 3 o'clock at 15. Furthermore, if the number is 16 or more, 4-bit parallel addition can only process from 0 to 15 at most, so it is also necessary to judge the carry of parallel addition. A similar judgment is 23
It will be carried out until At 24, when the time on the clock counter is 12 o'clock, it is necessary to change the morning or afternoon and determine whether to change the day of the week, and at 10 o'clock or 11 o'clock, it is necessary to change the day of the week without changing the morning or afternoon. twenty five,
26, it is also necessary to change the time to 1 o'clock and 2 o'clock. The processing at the time of parallel addition of the above timetables is illustrated in a graph as shown in FIG.
In other words, in this graph, the (a) line shows the line that changes afternoon to am and also changes the day of the week, and the (b) line changes 13:00 to 1:00, and it is necessary to judge whether to change the day of the week in the morning or afternoon arrangement. The (c) line indicates the line where morning should be changed to afternoon and the day of the week must be judged, and the (d) line indicates the line where 13:00 is changed to 13:00.
It shows the line where it is necessary to judge whether to change the time, morning, afternoon, or day of the week. In this way, when the time table is performed by 4-bit parallel addition, there is a problem that the number of instructions to be written to the ROM 33 described above becomes extremely large because the content of judgment differs depending on the case. This problem is solved by taking the following method. In other words, when adding the set time value to the hour digit value of the clock counter, the time value is subtracted by 1 and the tick digit value of the clock counter is added by 1, and as a result, the hour digit value becomes 12. Sometimes it changes AM and PM, and if this change is from PM to AM, it also changes the day of the week, and when it reaches 13, it changes it to 1.The program process simply adds the hour digits until the hour value becomes zero. This is done by continuing. This process is shown in more detail in FIG. 11 using a flowchart. That is, first, the 1-minute range from the clock counting section and the 1-minute range from the setting storage section are read out to the CPU 31, subjected to addition processing, and stored in the accumulator. Next, check whether the contents of the accumulator are 10 or more. If it is 10 or more, first correct the contents of the accumulator in decimal notation, then transfer the contents of the accumulator to the 1-minute range in the setting storage section, and count up the 10-minute range in the setting storage section by one. do. If the contents of the accumulator are 9 or less, the contents of the accumulator are transferred as they are to the 1 minute range of the setting storage section. Next, the 10 minute range in the clock counter and the 10 minute range in the setting storage section are added and stored in the accumulator. Next, it is checked whether the contents of the accumulator are 12 or more. and
If it is 12 or more, the contents of the accumulator are first corrected in hexadecimal, then the contents of the accumulator are transferred to the 10-minute unit in the setting storage section, and the time unit in the setting storage section is counted up by two. If the contents of the accumulator are 11 or less and 6 or more, first correct the contents of the accumulator in hexadecimal, and then convert the contents of the accumulator to 10 in the setting storage section.
The time table is transferred to the sub-table, and the time table in the setting storage section is counted up by one. If the contents of the accumulator are 5 or less, the contents of the accumulator are transferred as they are to the 10-minute range of the setting storage section. Next, the time table in the setting storage section is transferred to the time table control memory provided in the empty memory in the RAM 32, and the time table in the clock counter is transferred to the time table in the setting storage section. Further, the AM/PM information of the clock counter is transferred to the AM/PM control memory provided in the empty memory in the RAM 32, and the day of the week control memory provided in the empty memory in the RAM 32 is cleared to zero. In this state, next, the contents of the timetable control memory are subtracted by one, and it is checked whether or not a borrow signal is output as a result of the subtraction. If the borrow signal is not output, then the time table in the setting storage section is counted up by one. Then, it is checked whether the timetable in the setting memory section has reached 13 or 12 due to the count-up. If the result of this check is found to be 11 or less, the contents of the timetable control memory are subtracted by one again, and it is checked whether a borrow signal is output. If the borrow signal is not output, the time table in the setting storage section is counted up by one again. This operation is performed when the time base in the setting storage section is 11.
It is repeated as long as it is less than or equal to the value and a borrow signal is not output. Further, when the time table in the setting storage section as a result of count-up reaches 12, it is subsequently checked whether the contents of the AM/PM control memory indicate AM or PM. If it is morning, the contents of the AM/PM control memory are changed to PM. If it is in the afternoon, the contents of the AM/PM control memory are changed to AM, and the contents of the day of the week control memory are counted up by one. When this process is completed, the process returns to subtracting 1 from the time table control memory. Furthermore, when the time base in the setting storage unit reaches 13 as a result of the count-up, the time base in the setting storage unit is changed to 1. During such subtraction processing of the timetable control memory, count-up processing of the timetable in the setting storage section, and subsequent processing of checking the contents of the timetable, the contents of the timetable control memory become zero. , When a borrow signal is output by the next subtraction process from this control memory, the contents of the AM/PM control memory are transferred to the AM/PM memory of the setting storage section. Next, the contents of the day of the week control memory and the contents of the day of the week memory of the clock counter are added and stored in the accumulator.
Also, the contents of the accumulator are corrected to the correct day of the week information. For example, Monday to Sunday correspond to numbers 1 to 7, and when the addition result is 8, the number is changed to 1. Finally, day of the week information is set in the day of the week memory of the setting storage section based on the contents of the accumulator, and all settings are completed. After the timer information has been reset in the form of time information in the setting storage section, if you operate the "INPUT" key again, the timer information will be set in the information storage section in the same way as when it was set in the form of time information from the beginning as described above. be transferred. Next, we will explain the control when abnormal timer information is set in the setting storage section.
First, there may be a case where the day of the week is specified but AM and PM are not specified. In this case, the e and f segments of the G7 digit on display 8 will be displayed in AM and PM blinking modes, similar to the _clock setting mode described above. is displayed blinking. Second, there may be a case where AM or PM is specified but the day of the week is not specified, but in this case as well, all day segments of the display 8 are blinked in the day of the week blinking mode as in the clock setting mode described above, and M [0,8] Set logic "1" to <3>. Thirdly, the set time is 1 o'clock.
There may be a case where the value is not set from 00 to 12:59, but in this case as well, the display 8 should be blinked in the time blinking mode as in the clock setting mode described above, and M[0,8]<3> is set to logic “0”. Fourth, when there is no motion information specification for the controlled object, that is, M[0,2]<
1>,<0>,M[0,3]<3>,<2>,<1
>, <0> may not be set to logic "1"; in this case, the b and c segments of the _G1 digit and the _G2
The b, c, e, f segments of the digit are
When [1,1] is 0 to 4, the light is off, and when it is 5 to 9, it is lit, blinking at 0.5 second intervals. At this time, the operating blinking mode is stored in the blinking mode storage section of M[0,9]. (3) Clock display mode This mode is set to “CLOCK” in mode selection section 5.
This mode is set by key operation, and is a mode in which the display 8 displays the contents of the clock counter or the hour 2 counter. In this mode, when the mode selection section 5 switches the mode to clock display mode, the contents of the clock counter are transferred to the display storage section (the same storage section as the setting storage section is used), and M[0,8] <3> is set to logic "1", the clock display mode is stored in the display mode storage section M[0,13], and the clock display mode is displayed on the display 8. Then, when the "WEEK" key is operated when M[0,8]<3> is logic "1", M[0,8]<3>
3> to logic "0" and transfers the contents of the second counter to the display storage section, M[0,1
3] as the second counter display mode on the display 8.
to be displayed. In this case M[0,0]~M
The contents of the second counting section transferred to the display storage section [0, 8] are as shown in FIG. That is, all day of the week display memories of M[0,0], M[0,1] and colon display memory of M[0,8]<3> are set to logic "0", and M[0,
2] to M[0,7] are display memories for 1 second, 10 seconds, 1 minute, 10 minutes, 1 o'clock, and 10 o'clock, respectively. When displaying the contents of this second counting section, set 13 to all digits above 10 minutes, especially when all digits above 10 minutes are zero. In this second counter display mode, G ₁ ,
The digits G ₂ , G ₃ , G ₄ , G ₆ , and G ₇ are displayed in the first table format with the status latch set to “0”;
The _G5 digit is displayed in a second table format with the status latch set to "1". Therefore, when all digits of 10 minutes or more become zero, display 8
will be a zero suppress display where nothing will be displayed in the digits above 10 minutes. Conversely, if the "WEEK" key is operated when M[0,8]<3> is logic "0", M[0,8]<3> is inverted to logic "1" and the clock counter is turned on. The contents are transferred to the display storage section and displayed on the display 8 with M[0,13] set to clock display mode. The colon segment is lit in the clock display mode but is turned off in the second counter display mode, so whether the display is for the clock counter or not depends on whether the colon segment is lit or not. You can easily tell if it is from the counting section. Also, if the "INPUT" key is operated when M[0,8]<3> is logic "1", M[0,
8] Invert <3> to logic "0" and display the contents of the second counter in the same way as when the "WEEK" key is operated. And this "INPUT"
Upon key operation, M[0,11]<2> is set to logic "1". Said M[0,1
1] <2> is a control bit for the second counting section, which causes counting to be performed when the logic is "1", and when the logic is "0"
This bit stops counting when . Therefore, when the "INPUT" key is operated while the clock counter is displayed, the contents of the second counter will be displayed, and if the second counter is in a stopped state at that time, it will start counting, and the second counter will start counting. If the unit is in the counting state, it continues counting. Conversely, the above M[0,8]<3> is logic “0”
If you operate the “INPUT” key when
[0,11] Invert <2>. That is, if the second counting section is counting, it stops counting, and if it is stopping, it restarts counting.
The "CLEAR" key clears the second counter to zero if M[0,8]<3> is logic "0" and displays M[0,11]<2> as logic "0". Display “ _0.00 ” on the device 8. This "CLEAR" key operation has no meaning when M[0,8]<3> is logic "1".
The "STOP" key has the same function as in clock setting mode. "ON1", "OFF1", "ON2",
Each key of “OFF2” is M[2,14]<3><2
Logic "0" for the switch state memory of
Performs “1” set control. When the "ON1" key is operated, M[2,14]<3> is set to logic "1" and output terminal _R14 is set to logic "1".
At this time, if the first power selector switch 13 connects the common contact 13t to the fixed contact 13a, it turns on the first transistor 15, energizes the first relay coil 14, and closes the normally open contact 14a. and controls the energization of the first power outlet circuit. Further, the light emitting diode 18 is made to emit light to indicate this fact. When you operate the "OFF1" key, M
[2, 14] Set <3> to logic “0” to set output terminal _R14 to logic “0” and perform the opposite operation to the above “ON1” key to stop energizing the first power outlet circuit. control and turn off the light emitting diode 18. When the "ON2" key is operated, M[2,14]<2> is set to logic "1" and output terminal _R15 is set to logic "1". At this time, the second power selector switch 21 is connected to the common contact 21.
If t is connected to the fixed contact 21a, the second transistor 23 is turned on to energize the second relay coil 22, and the normally open contact 22a is closed to control the energization of the second power outlet circuit. do. Further, the light emitting diode 26 is made to emit light to indicate this fact. When you operate the "OFF2" key, M[2,
14] Set <2> to logic "0" to set the output terminal _R15 to logic "0", perform the opposite operation to the above "ON2" key, and control the energization of the second power outlet circuit to stop, and light emitting diode 2
Turn off 6. In this mode, operating any keys other than those mentioned above has no meaning. (4) Information recall mode This mode is set by operating the "CALL" key in the mode selection section 5, and allows you to recall the contents of the 12 information storage sections to the display 8 for confirmation or deletion. This is the mode where you can In this mode, when the mode is switched to the information call mode by the mode selection unit 5, M[0,0]=
0, M[0,1]=0, M[0,2]=0,M
[0,3]=0, M[0,4]=14, M[0,
5]=14, M[0,6]=10, M[0,7]=12
At the same time, M[0,8]<3> is set to logic "0", and the information call mode is stored in the display mode storage section of M[0,13]. The display in this mode is M [0, 2], M [0, 3], M
[0,8] is performed by forming the second table where the status latch is logic “1”, and M[0,4], M[0,
5], M[0,6], and M[0,7] are set so that the status latches are performed in the first table format with logic "1". Therefore, the display on the display 8 becomes CA LL. This display lets the user know that the information call mode has been entered. In this mode, the "1/MON" to "9/M to S" keys correspond to the first to ninth information storage sections, respectively, and the "0/MON" to "9/M to S" keys correspond to the first to ninth information storage sections, respectively.
EW” key corresponds to the 10th information storage section,
The "AM/11" key corresponds to the eleventh information storage section, and the "PM/12" key corresponds to the twelfth information storage section. When each of these keys is operated, a numerical value corresponding to the value set in the address display mode is displayed while the key is being operated, in the same way as when switching from the other mode to the information setting mode described above. In addition, in the information setting mode mentioned above, the addresses are M[5,14], M[6,1
4], but in this information retrieval mode, the address is M[5,15],
It comes to be stored in the information display control section of M[6,15]. For example, when the "1/MON" key is operated, "A 1" is displayed on the display 8, indicating that the address is number 1. If you release the key in this state, that is, M[0,13]
When the address display mode is stored in the M[3,14], M[3,15] key input control unit, if it is determined that the key has been released, the address of the information display control unit is stored. The contents of the information storage unit at the address that has been lost are transferred to the display storage unit in the format shown in FIG. At this time M[0,
8] <3> is set to logic "1". Then, an information display mode similar to the information setting mode is stored in the display mode storage section M[0,13] and displayed on the display 8. For example, if timer information for turning on the first power outlet circuit at 3:15 p.m. on Mondays, Wednesdays, and Fridays is stored in the first information storage section at this time, the display will be as follows.

[Table] 3 〓 1 5
becomes. If the "CLEAR" key is operated in this state, the first information storage section displayed here will be erased. That is, the information storage section at the address corresponding to the address of the information display control section is erased. This display after erasing displays the erased contents of the information storage section as ":0" in the information display mode to indicate that the contents have been erased. In this mode, by operating one of the 12 keys corresponding to each information storage section, the address of the corresponding information storage section will be displayed, and when the key is released, the information storage section at that address will be displayed. The contents are displayed. If the ``CLEAR'' key is operated in this situation, the contents of the displayed information storage section will be erased, and this fact will be displayed. Also, when the "CLEAR" key is operated in the information recall display mode, the all information recall display mode is stored in the display mode storage section of M[0,13], and the M
[0,7]=13. The status latch in this all information call display mode is used in the same way as in the information call display mode. Therefore, the display at this time is ALL, indicating that all 12 information storage units have been specified. If you operate the "CLEAR" key in this all information call display mode, the contents of all 12 information storage sections will be erased, the information call display mode will be stored in M[0,13] again, and the display will become "CALL". . In this way, the information call display mode and all information call display mode are set to M[0,
7] can be used for different purposes simply by changing the value, and its meaning can be clearly displayed. The “STOP” key is M[1,0]<
3> This is a key that sets the alarm state storage section of <2> to logic "0", sets the snooze counter section of M[1, 14] to zero, and sets the output terminal _R13 to logic "0". In this information call mode, other than these "ON1", "OFF1", "ON2", "OFF2",
"ALARM", "SNOOZE", "INPUT",
Each key of "WEEK" has no meaning. Further, in the apparatus according to the embodiment of the present invention configured as described above, the following operations are performed when the power is restored. That is, when the power is turned on, the initialization circuit 3 starts executing the program at a specific address in the ROM 33. First of all, RAM
Delete all contents of 32. Then M[3,
15] Set <3> to logic “1” to prohibit all key inputs. Also, in order to issue a power outage alarm after 5 minutes, logic "1" is set in the snooze state storage section of M[1,0]<3> in the alarm state storage section M[1,0]. Furthermore, M[0,9]
A power failure blinking mode is stored in the blinking mode storage section of M[0, 13], a power failure display mode is stored in the display mode storage section of M[0,13], and the normal routine is entered.
In this case, the reason why M[3,15]<3> is set to logic "1" is because in the power failure display mode, all key inputs must be disabled unless the mode selection section 5 is set to the clock setting mode. Because there is. For example, if you think about a situation where a power outage occurs while you are using the clock display mode as an alarm, and then the power outage is restored, if the alarm device 12 is activated to recover from the power outage, even if the "STOP" key is pressed. Even if the key is operated, the alarm operation is disabled by disabling the key input, so that the alarm operation is not stopped when the set time has come, but rather the alarm operation is performed when the power is restored. It has the function of letting you know that there is a Furthermore, when a power outage occurs, all the contents of the information storage section are erased and the clock counting section is also erased, so in order to operate it as a timer again, it is first necessary to set the time information. For this reason, key input is disabled except in clock setting mode. Specifically, in the power outage display mode, when the mode selection section 5 enters the clock setting mode, M[3,
15] Set <3> to logic "0" to enable key input, and when a key input occurs here, the non-blinking mode is stored in the blinking mode storage section of M[0,9], and then normal use is resumed. In this state (when no power outage occurs), the mode selection section 5 performs the same operation as when switching to the clock setting mode, and then performs operations according to each key input. Also, when the mode selection section 5 is set to another mode without any key input in the clock setting mode, the M
[3,15] <3> is set to logic "1" again, and key input is prohibited. In this power failure display mode, all of M[0,1] to M[0,8] are in the zero state, and the status latch displays the _G1 , _G2 , and _G5 digits in the format shown in Table 2 with the status latch at logic "0". ,
This is done by displaying the G ₃ , G ₄ , G ₆ , and G ₇ digits for 0.5 seconds in the format shown in Table 1 with the status latch at logic "1", and not displaying anything for the remaining 0.5 seconds. Therefore, the display on the display 8 will start blinking 00 00 at 0.5 second intervals. Also, at this time, since logic "1" is set in the snooze state storage section of M[1,0]<3>, the output terminal
_R0 becomes logic "1" and the alarm display segment 8-1b lights up. Further, in the apparatus according to the embodiment of the present invention configured as described above, the following operations are performed based on the commercial power supply frequency pulse inputted from the input terminal _K8 . The clock counter performs a time counting operation based on this commercial power supply frequency pulse, and in this operation, the 10-second counter of M[1,3]<2><1><0> is counted from the 10-second counter of M[1,4]. When the 1-minute counter is incremented, the time in the clock counting section and the times in the 12 information storage sections are sequentially compared. For example, the time of the clock counter is M[2,0]~M
If the time matches the time in the first information storage unit [2, 6], the comparison result storage unit M [2, 14] < 1 based on the controlled object operation information in the first information storage unit
><0>, set M[2,15]. For example, if M[2,2]<1> is logic “1”, M
[2,14] Set <1> to logic “1”, M
[2,2] If <0> is logic “1”, then M[2,
14] Set <0> to logic “1” and set M
[2,3] If <3> is logic “1”, then M[2,
15] Set <3> to logic “1” and set M
[2,3] If <2> is logic “1”, M[2,
15] <2> is set to logic “1”, M
[2,3] If <1> is logic “1”, then M[2,
15] Set <1> to logic “1” and set M
[2,3] If <0> is logic “1”, then M[2,
15] Set <0> to logic “1”. If logic "1" is set in M[2,1]<3>, then this is a weekly operation, so M[2,
2] Leave the contents of <1><0>, M[2,3] as they are and move on to comparison with the next time in the second information storage section. Also, if M[2,1]<3> is set to logic "0", this means that it will only operate for one week, so M[2,1]<2><1><
0>, M[2,0] (one of the same day of the week as the time information) is inverted to logic "0".
And this result M[2,0]<3>,<2>,<
1>,<0>,M[2,1]<2>,<1>,<0
> all become logic "0", the timer information in the first information storage section is erased and then the comparison with the second information storage section is started. Also M
[2,0]<3>,<2>,<1>,<0>,M
[2,1] If any of the bits <2>, <1>, and <0> still has a logic "1", the timer information in the first information storage section is not erased and the timer information in the second information storage section is Moving on to comparison with the information storage section. In this way 12
When the comparison is completed for all information storage units, the comparison result storage unit M[2,14]<1>,<0
>, M[2,15]<3><2><1><0>
The controlled object is operated based on the contents.
In this operation, M[2,14]<1> is logic “1”
If so, the snooze operation is performed regardless of the logic of M[2,14]<0>. In this snooze operation, if the mode selection section 5 is set to a mode other than the information call mode, the operation of the sound alarm device 12 will be immediately stopped by operating the "STOP" key, and the sound alarm device 12 will start operating again after 5 minutes. It is something to do. This snooze operation is completely stopped only when the alarm tone has been sounded for 3 minutes. This is to prevent unnecessary sounding when the user is absent. Further, when the mode selection section 5 is set to the information call mode, the sound alarm device 12 is completely stopped by operating the "STOP" key and does not start operating again. In other words, this snooze operation is used for the purpose of waking up, etc., and the mode at such times is the normal clock display mode, and even if the user operates the "STOP" key in this mode, there will be no alarm sound. It will start every 5 minutes. If the user wants to completely stop the warning sound, he or she can set the mode selection section 5 to the information display mode and then operate the "STOP" key.
In this snooze operation, the snooze counter M[1, 14] counts the time of 3 minutes for the beep and the 5 minutes for the repetition interval. That is, M
[2,14] When <1> is logic “1”, M
[1, 0] <3>, <2> are each logic “1”
and set M[1,14] to 5. M[1,0]<3> is a snooze state storage unit, and when this is logic “1”, the output terminal
_R0 is set to logic "1" to light up the alarm display segment 8-1b. M[1,0]<2>
When is logical "1", the sound alarm device 12 is operated. When the "STOP" key is operated in a mode other than the information display mode, M[1,0]<2> is set to logic "0" and the sound is stopped;
14] to zero. Then, each time one minute passes, M[1,14] is counted up by 1, and when this value reaches 5, M[1,0]<2> is set to logic "1" and the alarm is restarted. If the "STOP" key is not operated, M[1,
14] becomes 6, 7, etc. every minute.
Then, when this value becomes 8, M[1,0]<3
>, <2> are each inverted to logic "0", and the alarm operation is completely stopped. Also, when the "STOP" key is operated in information display mode, M
[1,0]<3>,<2> are set to logic "0" and M[1,14] is set to zero to completely stop the alarm operation. In addition, even when the power is restored as described above, M[1,0]<3> becomes logic "1" and M[1,14] becomes zero, just like when the "STOP" key is operated with this snooze operation. This means that the alarm starts 5 minutes after the power is restored. M [1,
0]Segment 8-1 indicates the status of <3>
b is displayed to notify the user that a re-alarm will be sounded within 5 minutes. Also, M[2,14]<1> is logic “0” and M
[2, 14] If <0> is logic "1", an alarm operation is performed. No matter which mode the mode selection section 5 is set to, the alarm operation will completely stop the alarm sound when the "STOP" key is operated.
This is an operation that stops the alarm sound in 5 seconds even if the "STOP" key is not operated. In other words, in this alarm operation, only M[1,0]<2> is set to logic "1", and M[1,0]<2> is inverted to logic "0" by operating the "STOP" key. do. Also, M[1,0]<3> is logic “0” and M
When the 1-second counter M[1,2] of the clock counter reaches 5 when [1,0]<2> is logic “1”, M[1,0]<2> is inverted to logic “0”. do.
Note that M[2,14]<1> is logic “0” and M
[2,14] Even if <0> is logic “1”, M
When [1,0]<3> is logic "1", snooze operation is entered instead of alarm operation. By the way, the control of the sound alarm device 12 when M[1,0]<2> is logic "1" is as follows: M[1,0]<2>
When the 1/10 seconds counter of 1] is 0 to 4, the output terminal _R13 is set to logic "1", and when it is 5 to 9, the output terminal _R13 is set to logic "0" to activate the sound frequency oscillator 10. This is done by operating the alarm device 12 at intervals of 0.5 seconds. Also, for on/off control based on the contents of the comparison result storage section, if M[2,15]<2> is logic "1", M[2,15]<3> is logic "1",
M[2,14]<3>, even if it is “0”
If M[2,15]<3> is logic "1" and M[2,15]<2> is logic "0", then M[2,14]<3> is set to logic "0". Set to logic “1”. This means that when controlling the first power outlet circuit on and off, priority is always given to the off operation. and M[2,
14] If <3> becomes logic “1”, output terminal R ₁₄
is set to logic "1", and when M[2,14]<3> becomes logic "0", the output terminal _R14 is set to logic "0". Also, if M[2,15]<0> is logic “1”, M[2,15]<1> is logic “1” or “0”.
In any case, M[2,14]<2> is logic "0", M[2,15]<1> is logic "1", and M[2,15]<0> is logic "0"
If so, M[2,14]<2> is set to logic "1". This means that in the on/off control of the second power outlet circuit, priority is always given to the off operation. Therefore, when information with completely opposite ON and OFF states is set in two information storage units at the same time, priority is given to the OFF operation. When each operation based on the contents of the comparison result storage unit is completed, M[2,14]<1><0
>, M[2,15]<3><2><1><0>
All bits of are set to logic "0" and the normal routine is entered. Next, 16 as the first counting part in M[0,15]
This constitutes a digit counter, which is displayed on display 8.
This is provided to equalize the duty cycle of each digit in the display. That is, each time the state of each key is checked, the state of the input terminal _K8 is determined to determine whether or not to count up the first counting section. Then, the state of each key is judged and the period during which each digit is displayed dynamically is counted.
After counting only the counter M[0, 15] of the clock and performing one cycle of determining the overall key state and displaying all digits, the count value of the first counter is transferred to the clock counter M[1, 15] and reset the first counting section to zero. In this regard, if the method is to directly count M[1, 15] of the clock counter without providing such a first counter, the clock counter M[1, 15], M
Since the calculation speed differs depending on the numerical values stored in [1,1] to M[1,7], the duty cycle of each digit differs, causing flickering on the display. That is, M[1,
The calculation time varies in the range from the minimum time required to count up M[1, 15] by 1 to the maximum time required to count up M[1, 7] to the day of the week digit by counting up M[1, 15] by 1. Therefore, the duty cycle of each digit will be different. The duty cycle of the digit also differs depending on whether M[0,15] is counted up by one or not. That is, when counting up, the number of executed instructions is greater than when not counting up, so the time for performing the next digit operation is delayed. Regarding this, dummy instructions are added so that the number of instructions is the same even when the count is not up as when the count is up, thereby making each duty cycle of the digits uniform. In FIG. 13, each digit G ₁ , G ₂ , G ₃ ,
This is a time chart showing the display period of G ₄ , G ₆ , G ₇ , G ₅ and the time interval between each digit display.
5] shows a method of directly counting. That is, in the method according to the embodiment of the present invention, as shown in a, the display period of each digit G ₁ , G ₂ , G ₃ , G ₄ , G ₆ , G ₇ , G ₅ is t ₁ to t ₂ , t ₃ to _{t 4} , t ₅ ~ t ₆ , t ₇ ~ t ₈ , t ₉ ~ t ₁₀ ,
_t11 to _t12 , _t13 to _t14 ) and the time intervals between each digit display _t2 to _t3 , _t4 to _t5 , _t6 to _t7 , _t8 to _t9 , _t10 to _t11 ,
It is possible to make t ₁₂ to _{t 13} uniform, and the only thing that changes is the count value of the first counting section M [1, 15]
The range is from the minimum time _t17 when there is no carry at all in the upper digits to the maximum time _t18 when the count-up is performed to the day of the week digit of M[1,7]. In the method of directly counting this point M[1,15], when a count-up signal is detected between digits _G1 and _G2 , b
As shown in , the time interval between digits G ₁ and G ₂ changes from t ₂ to _{t 3} at the minimum and from t ₂ to _{t 5} at the maximum, and a count-up signal is generated between digits G ₆ and G ₇ . When detected, the time interval between these digits G ₆ and G ₇ is at least t ₁₀ to _{t 11} , as shown in c.
The time width of which portion changes is uncertain, such that it changes from t ₁₀ to _{t 13} at maximum. This causes display flickering. As described above, in the method according to the embodiment of the present invention, a first counting section is provided, and this first counting section counts commercial power supply frequency pulses, and after one cycle of determining the overall key state and displaying all digits, The count value of the first counter is added to M[1,15], and dummy instructions are added to make the number of executed instructions the same whether there is a count-up or not in the first counter. Therefore, the display period of each digit and the time interval between each digit display can be made uniform, and flickering of the display does not occur. Furthermore, information is transferred from each storage section of the RAM 32 to the display storage section in the clock display mode and the second counter display mode by transferring the information from the 1-second counter M[1, 2] of the clock counter to the lower counter M[1]. ，
When there is a carry from [1], that is, 1 per second
It is circulated. In the information display mode, when the one-minute counter M[1,4] of the clock counter is incremented from the lower counter M[1,3], that is, once every minute. Therefore, these transfers end up when the count value of the first counter M[0, 15] is added to M[1, 15] of the clock counter and carry is carried out by 1 second and 1 minute, respectively. This is done so that the duty cycle of each digit does not differ. In this way, when the timer information is set in the setting storage section and the "INPUT" key is operated, it is possible to specify whether the timer information is in the form of time information or in the form of time information, such as morning, afternoon, and day of the week. Judgment will be made based on whether or not. When it is determined that the timer information is in the form of time information, the timer information is transferred to and stored in the information storage section whose address is displayed. When it is determined that the time information is in the form of time information, the time information is read from the clock counter and the set time information is added to the time information. The obtained time information is then set in the setting storage section and displayed on the display 8. As a result, by operating the "INPUT" key again, the time information that has been reset in the setting storage section is transferred to and stored in the information storage section where the address is displayed. Therefore, when timer information is set in the form of time information, the operating information is displayed after being changed to the form of time information, so at this point the user can avoid setting the timer information incorrectly. You can check whether it has been entered. For example, if you try to set the timer information to turn on the time switch at 1:30 pm on Wednesday at 11:15 a.m. on Wednesday, but forget to specify the day of the week and afternoon, you can set the timer information by pressing the "INPUT" key. The timer information is not set in the information storage unit, but is simply converted into time and displayed on display 8 as 12:00 p.m.
45 minutes is displayed. As a result, the user notices that the set timer information is incorrect, and operates the "CLEAR" key to reset the timer information. In the above case, if either the day of the week or the afternoon is forgotten, it is determined that the timer information is not normal, and the forgotten setting is displayed on the display 8. Also, when I wanted a timer to operate after 2 o'clock at 11:15 a.m. on Wednesday, I mistakenly input the timer information for 3 hours later, but the time information of 2:15 p.m. was displayed on the display 8. Once displayed, the user can easily notice the error. In this way, when timer information is set in the form of time information, it may be set in the form of time information by mistake, or when timer information is set in the form of time information, the timer information is not transferred to the information storage unit and the time information is set in the form of time information. Since it is converted into information and displayed, errors can be discovered at that point, and the timer information will not be stored in the information storage unit. To correct the timer information, you can erase the information storage unit. There is no need to perform the troublesome operation of In addition, when the set timer information is time information, addition processing with the time information of the clock counter is performed by 4-bit parallel addition for the digits of 1 minute and 10 minutes. The hour digit value of the time information set to the hour digit value of the clock counter is subtracted by 1 and added by 1, and this is done until the hour digit value of the time information becomes zero. The change in the afternoon or the day of the week can be made by determining the value of the hour digit in the clock counter, making the change extremely easy and reducing the number of processing instructions required for the change. Although the above embodiment describes a one-week timer that sets the day of the week, it is not limited to this; for example, it may be a timer of a type that does not set the day of the week; It is only necessary to judge whether the timer information is in the form of time information or time information based only on whether or not morning or afternoon is specified. Furthermore, in the above embodiments, the control object is described as having both a time switch and a sound (alarm, etc.), but the invention is not limited to this, and even if only a time switch or only a sound is provided. good. As described in detail above, according to the present invention, one or more information storage units store at least operation information of a controlled object and timer information consisting of operation time information, a clock counter unit that counts time, and the information storage unit. a setting storage section for temporarily storing timer information to be stored in the section; input means for inputting and setting timer information into the setting storage section; transfer means for transferring the timer information in the setting storage section to the information storage section; a display for displaying timer information in the setting storage section;
determination means for determining whether the timer information stored in the setting storage unit is in the form of time information or time information by the operation of the transfer means; When it is determined that the timer information is in the form of time information, the timer information is stored in the information storage section,
And when it is determined that the timer information is in the form of time information, the time information obtained by adding the time to the time information of the clock counting section is stored again in the setting storage section as timer information and displayed. The timer information is displayed on the device, and then the timer information in the setting storage section is stored in the information storage section by operating the transfer means, so when the timer information is set in the form of time information, only one transfer is required. Depending on the means, the time information obtained by adding the time of the set timer information to the time information of the clock counter is displayed to inform the user, and the timer information is then displayed when a retransfer operation is performed. By transferring the timer information to the information storage unit, it is possible to discover incorrect settings of timer information before the timer information is transferred to the information storage unit, thereby eliminating the trouble of erasing the information storage unit due to incorrect settings of timer information. Therefore, it is possible to provide an electronic timer device that can eliminate complicated operations.

[Brief explanation of the drawing]

The figures show an embodiment of the present invention; FIG. 1 is a block diagram showing the overall configuration, FIG. 2 is a block diagram showing the configuration of a fluorescent display, and FIG. 3 is a block diagram showing the circuit configuration of a microcomputer. Figure 4 shows RAM
FIG. 5 is a diagram showing the configuration of the setting storage unit/display storage unit when time information is stored.
9 is a diagram showing the configuration of the setting storage/display storage unit when storing timer information, FIG. 7 is a diagram showing the configuration of the clock counting unit, FIG. 8 is a diagram showing the configuration of the information storage unit, and FIG.
10 is an explanatory diagram of the time addition process, FIG. 11 is a flowchart showing the time addition process, and FIG. 12 is a diagram showing the configuration of the second counting unit. FIG. 13 is a time chart explaining the display control method of the fluorescent display; a is a time chart showing the method according to the embodiment of the present invention; b and c are time charts showing the conventional method. This is a time chart. DESCRIPTION OF SYMBOLS 1... Microcomputer, 5... Mode selection section, 6... Information/signal input section, 8... Fluorescent display, 12... Sound alarm device, 31... CPU (Central Processing Unit), 32... RAM (random access memory), 33...ROM (read only)
memory).

Claims (1)

[Scope of Claims] 1. One or more information storage units that store timer information consisting of at least operation information and operation time information of a controlled object, a clock counter that counts time, and a clock counter that stores time in the information storage unit. a setting storage section for temporarily storing timer information; an input means for inputting and setting timer information in the setting storage section; a transfer means for transferring the timer information in the setting storage section to the information storage section; a display for displaying timer information; and a determining means for determining whether the timer information stored in the setting storage section is in the form of time information or time information by operating the transfer means. If the determining means determines that the timer information is in the form of time information, the timer information is stored in the information storage section, and it is determined that the timer information is in the form of time information. and information storage processing means for adding the time to the time information of the clock counting section and storing the obtained time information back into the setting storage section as timer information. Device. 2. Claims characterized in that the determination means determines whether the timer information is in the form of time information or time information based on the presence or absence of morning or afternoon designation and day of the week designation. 1st
Electronic timing device as described in Section 1. 3 To add the time type timer information to the time information of the time counter, for the lower digits from the 10 minute digit, directly add the numerical value for each digit, and for the hour digit, add the time digit value of the time information of the time counter. 3. The electronic timer according to claim 1, wherein the time information is calculated by adding 1 a number of times corresponding to the time digit value of the set time information.