JPS62149168A - High speed ccd - Google Patents

High speed ccd

Info

Publication number
JPS62149168A
JPS62149168A JP28989585A JP28989585A JPS62149168A JP S62149168 A JPS62149168 A JP S62149168A JP 28989585 A JP28989585 A JP 28989585A JP 28989585 A JP28989585 A JP 28989585A JP S62149168 A JPS62149168 A JP S62149168A
Authority
JP
Japan
Prior art keywords
charge
electrode
embedded layer
high speed
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28989585A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP28989585A priority Critical patent/JPS62149168A/en
Publication of JPS62149168A publication Critical patent/JPS62149168A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make it possible to move charge at a high speed through the low resistance part of an embedded layer and to enhance transfer efficiency, by forming the embedded layer, whose polarity is different from that of a semiconductor substrate. CONSTITUTION:In Si 1, an embedded layer 2, whose polarity is different from that of the Si 1, is formed. An oxide film 3 is formed on the surface of the Si 1. Voltages having different potentials are applied to A and B of the electrode 4 so that a potential 5 is slanted. Thus charge 6 is moved. At this time, the charge beneath a of the electrode 4 is stored in the embedded layer 2. The potential beneath B of the electrode 4 is made deep. Thus the charge is transferred efficiently at a high speed through the embedded layer.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明けCODの構造に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to the structure of COD.

〔発明の概要〕[Summary of the invention]

本発明はcc’nに於て、半導体基板極性と異なる極性
の埋め込み層がt極上に形成されている事を特徴とする
The present invention is characterized in that in cc'n, a buried layer having a polarity different from that of the semiconductor substrate is formed on the t pole.

〔従来の技術〕[Conventional technology]

従来、CODは、第2図にその要部の断面と動作状況を
示す如く、5111の表面には酸化膜13が形成され、
該酸化1j莫15上にはt極14が形成され、該戒(做
14のA、Bに印加する電圧を変化させ、8111内に
ポテンシャル5の如きポテンシャル5の如きポテンシャ
ルの傾斜を形成しチャージ6をKffiA下から電極B
下へ移動させるのを基本としている。
Conventionally, COD has an oxide film 13 formed on the surface of 5111, as shown in FIG.
A t-pole 14 is formed on the oxidation layer 15, and by changing the voltage applied to A and B of the oxidation layer 14, a potential gradient such as potential 5 such as potential 5 is formed in 8111, and a charge is generated. 6 from below KffiA to electrode B
The basic idea is to move it downwards.

〔発明が解決しようとする問題点及び目的〕しかし、上
記従来技術によると、 11Ls下間を移動するチャー
ジの移動速度が遅く、且つ移動効率が悪いという問題点
があった。
[Problems and Objects to be Solved by the Invention] However, according to the above-mentioned prior art, there was a problem that the moving speed of the charge moving between the 11Ls was slow and the moving efficiency was poor.

本発明は、かかる従来技術の問題点をなくし、高速で且
つチャージの移動効率の良いCOD構造を提供する事を
目的とする。
It is an object of the present invention to eliminate the problems of the prior art and to provide a COD structure that is high-speed and has good charge transfer efficiency.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点を解決するために、本発明はOCDに於て、
半導体基板極性と異なる極性の埋込み1−t′電電極−
形成する手段金とる。
In order to solve the above problems, the present invention provides for OCD,
A buried 1-t' electrode with a polarity different from that of the semiconductor substrate.
The means to form it takes money.

〔作用〕[Effect]

本発明の如<CODに於て、半導体基板極性と異なる極
性の埋込み層を電極下に形成することにより、該埋込み
lI#の低抵抗を通して、チャージが高速で移動できる
作用があると共に、チャージの移動速度が速い事は、結
果的に転送効率を上げる作用につながることとなる。
According to the present invention, in COD, by forming a buried layer with a polarity different from that of the semiconductor substrate under the electrode, the charge can move at high speed through the low resistance of the buried lI#. Faster moving speed ultimately leads to an effect of increasing transfer efficiency.

[実施y1]〕 以下、実施例により本発明を詳述する。[Implementation y1]] Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示す要部の断面と動作状況
を示す図である。すなわち、SiI内にはSi1と異な
る極性を有する埋込み層2が形成され、前記Si10表
面には酸化膜5,1極4が形成され、該電極4のA、B
に電位の異なる′成圧をかけてポテンシャル5に傾斜を
もたせチャージ6を移動させる。この場合、礪Ahaの
A下のチャージは、埋め込み層2にためられ、を極4の
B下のポテンシャルを深くすることにより埋め込み層2
全通してチャージが高速でかつ効率良く転位する事とな
る。
FIG. 1 is a diagram showing a cross section of a main part and an operating state of an embodiment of the present invention. That is, a buried layer 2 having a polarity different from that of Si1 is formed in SiI, and an oxide film 5 and one electrode 4 are formed on the surface of the Si10, and A and B of the electrode 4 are formed.
By applying a pressure with a different potential to the potential 5, the charge 6 is moved. In this case, the charges under A of Aha are stored in the buried layer 2, and by deepening the potential under B of the pole 4, the charges in the buried layer 2 are stored.
Throughout the process, the charge is transferred at high speed and efficiently.

〔発明の効果〕〔Effect of the invention〕

本発明の如く、CODに於て半導体基板極性と異なる極
性の埋め込みj−を1煉ドにf/成することにより、高
速かつ転送効率の艮いcapが裏作できる効果がある。
As in the present invention, in the COD, by forming a buried j- with a polarity different from the semiconductor substrate polarity in one layer f/, a cap with high speed and high transfer efficiency can be produced.

更に、本発明を例λは直列配列CODの一ノーの誦速化
を計るために1゛α列配列C’CDを分、!)+1 し
て動作させる回路構成場合の分割CODからの並列CO
Dへの儒号取り出し部の本発明を適用する事により、前
記回路構成の一層の高速化を効率的にかつ容易に行なわ
すことが出来る効果がある。
Furthermore, in the present invention, in order to speed up the reading speed of the series array COD, λ is divided into 1゛α column array C'CD,! ) +1 Parallel CO from divided COD in the case of a circuit configuration that operates with
By applying the present invention to the Confucian code extraction unit to D, there is an effect that the speed of the circuit configuration can be further increased efficiently and easily.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を説明するための埋め込み層を肩するC
ODの断面図であり、第2図は従来技術によるCCDの
断面図。 1.11・・・Sl 2・・・・・・・・・・・・埋め込み層6 、 13 
・・・酸fヒ模 4.14・・・通(傘 5.15・・・ポテンシャル 6.16・・・チャージ 以   上
Figure 1 shows a C
FIG. 2 is a cross-sectional view of an OD, and FIG. 2 is a cross-sectional view of a CCD according to the prior art. 1.11...Sl 2...Buried layer 6, 13
...acid fhi model 4.14...through (umbrella 5.15...potential 6.16...charge or more

Claims (1)

【特許請求の範囲】[Claims] 半導体基板極性と異なる極性の埋込み層が電極下に形成
されている事を特徴とする高速CCD。
A high-speed CCD characterized in that a buried layer with a polarity different from that of a semiconductor substrate is formed under an electrode.
JP28989585A 1985-12-23 1985-12-23 High speed ccd Pending JPS62149168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28989585A JPS62149168A (en) 1985-12-23 1985-12-23 High speed ccd

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28989585A JPS62149168A (en) 1985-12-23 1985-12-23 High speed ccd

Publications (1)

Publication Number Publication Date
JPS62149168A true JPS62149168A (en) 1987-07-03

Family

ID=17749153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28989585A Pending JPS62149168A (en) 1985-12-23 1985-12-23 High speed ccd

Country Status (1)

Country Link
JP (1) JPS62149168A (en)

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