JPS61252665A - Charge transfer device - Google Patents

Abstract

PURPOSE:To remove the effect of trapping, by providing two peaks of impurity distribution in an embedded channel part in the surface of a substrate and within the substrate, and providing the maximum point of the potential of the channel at the intermediate point between both peaks. CONSTITUTION:The impurity distribution in an embedded channel part is made to have at least two discontinuous peaks of the distribution in the surface of a substrate and within the substrate. The maximum point of the channel potential phich (b) is made to be set at the intermediate point between both peaks. When two peaks are provided in this way, the maximum point of the channel potential can be brought to the point, where impurity doping is less at the intermediate part between both peaks, by adjusting the concentration and the distribution. Since the electric charge is transferred in the vicinity of the maximum point of the channel potential, the electric charge can be transferred in a place where impurities are less. Therefore, the trapping of the electric charge by the impurities is decreased.

Description

[Detailed Description of the Invention] [Summary] The impurity distribution in the buried channel portion of the charge transfer device is made to have at least two discontinuous distribution peaks on the substrate surface and in the substrate, and the maximum point of the channel potential is The transfer charge is placed between the two peaks, and the transfer charge is transferred through a region with low impurity concentration, thereby eliminating the influence of traps.

[Industrial application field]

The present invention relates to a charge transfer device, and more particularly to a buried channel charge transfer device suitable for low temperature operation.

[Conventional technology]

Figure 5 shows a conventional buried channel board charge transfer device (5ccn).
) shows the cross-sectional structure of In the figure, a 5-shaped buried channel portion 2 is formed on the surface of a p-type silicon substrate 1, an insulating film (S402) 5 is formed on the substrate surface, and three-phase transfer electrodes (φ1 to φS) are formed on the insulating film. is formed.

Figure 2 (- shows the impurity distribution of the conventional ECCD. Channel depth zi = L6J, dope concentration N.

(Donor concentration) = 4 x 10'', formed by ion implantation into the inertia-3.The acceptor concentration on the substrate is N people = 4 x 10
It is made in width. Note that the buried channel portion is usually formed by ion implantation), and its impurity distribution has a Gaussian distribution, which is analytically approximated in FIG. 2 (6).

On the other hand, Figure 2 (6) shows the channel potential, and the maximum channel potential at which charge is transferred is 0.4 from the substrate surface.
- Reed at the sacrificial position, impurity density is 4 x 1010l5
”. In this way, charge transfer can be performed away from the surface, so it is not affected by the interface.
A buried channel charge transfer device is characterized by high transfer efficiency.

[Problem that the invention seeks to solve]

However, the buried channel charge transfer device as described above
It is known that when operating at a low temperature below 100f, impurities forming a buried channel act as a trap, leading to a decrease in transfer efficiency (5o14d 5t
ate Devise '84-42, Institute of Electronics and Communication Engineers Solid State Device Study Group).

In other words, if the transfer speed is fast, the charge that is actually transferred is trapped in the impurity unit and added to the transferred charge again. Transfer losses will occur if the charged charges are trapped and come out later. In addition, if the charge dip and charge periods between the transfer period and the trap are the same, 1
Even if a constant charge is being sent, unevenness will occur on the transferred charge cap, resulting in noise.

[Means for solving problems]

In the present invention, the impurity distribution in the buried channel portion is made to have at least two discontinuous distribution peaks on the substrate surface and in the substrate, and the maximum point of the channel potential is located between the two peaks. In this way, the influence of traps is eliminated by transferring the transferred charge through a region with a low impurity concentration.

[Effect]

When two peaks are provided as described above, by adjusting the concentration and distribution of the peaks, the maximum point of the channel potential can be brought to a place between the two peaks where doping of impurities is small. Since charges are transferred near the maximum point of the channel potential, they can be transferred to areas with few impurities, and therefore charges are less likely to be trapped by impurities.

Furthermore, since the charge is transferred away from the interface, there is no deterioration in transfer efficiency due to the influence of the interface.

On the other hand, in the conventional part, the maximum point of the channel potential corresponds to the highest doping concentration, as shown in FIG. 2 (-) (6), and has a large effect as a trap for impurities.

〔Example〕

FIG. 1-) shows the impurity distribution of the buried channel charge transfer device according to the embodiment of the present invention. In this case, impurities such as antimony (Sb) and phosphorus <p> are present in the surface area (1) adjacent to 84025 and in the area (1) near the depth of 1.8 μm.
K) has two peaks, and the middle portion (II) has a low concentration. In this case, the maximum channel potential at which charge is transferred is α5 from the substrate surface as shown in Figure 1 (6).
μ), the low concentration part of Figure 1 (α) (8X
101014a'), the influence of traps is small, the conventional part is not affected, and the decrease in transfer efficiency is alleviated.

The impurity distribution shown in FIG. 1 (α) can be easily formed using channeling ion implantation. For example, 84 (110)
The sh+ and r of impurities are 500 to 500 to the substrate.
If KgF is implanted, an impurity (If) having a peak approximately 2styh from the surface can be introduced, and by subsequent implantation at a low energy, for example, 100 fsF,
1) Impurities can be introduced.

〔Effect of the invention〕

According to the present invention, as described above, the impurity distribution in the buried channel portion has two peaks on the substrate surface and inside the substrate, and the maximum point of the channel potential is located at the midpoint between the two peaks. Second, since the transferred charge can be transferred through a region with a low impurity concentration, the influence of traps can be removed, and high transfer efficiency can be obtained with low temperature operation.

[Brief explanation of the drawing]

Figures 1(a) and (6) are diagrams showing the impurity concentration distribution diagram and channel potential of the buried channel portion of the embodiment of the present invention, respectively, and Figures 2(a) and (6) are diagrams respectively showing the conventional BCC:D O
FIG. 3 is a diagram showing an impurity concentration distribution diagram and channel potential of a buried channel portion. FIG. 3 is a cross-sectional diagram of the BCCD. 1... P-type silicon substrate 2... Buried channel part 3... Insulating film

Claims (2)

[Claims] (1) In a charge transfer device in which a plurality of electrodes are disposed on a semiconductor substrate with an insulating film interposed therebetween, the charge transfer portion of the charge transfer device contains impurities deep in the substrate that provide conductivity of opposite polarity to that of the substrate. The charge transfer portion is introduced so as to have at least two peaks in the horizontal direction, and the maximum point of the potential of the charge transfer portion is located in the middle of both peaks, so that the transferred charge covers a region with a low impurity concentration between the two peaks. A charge transfer device characterized in that charge transfer is performed. (2) The charge transfer device is formed on a semiconductor substrate (110) surface.
The charge transfer device described in Section 1.