JPS62145870A - Thin film transistor - Google Patents
Thin film transistorInfo
- Publication number
- JPS62145870A JPS62145870A JP28848085A JP28848085A JPS62145870A JP S62145870 A JPS62145870 A JP S62145870A JP 28848085 A JP28848085 A JP 28848085A JP 28848085 A JP28848085 A JP 28848085A JP S62145870 A JPS62145870 A JP S62145870A
- Authority
- JP
- Japan
- Prior art keywords
- tungsten
- film
- chromium
- thin
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 27
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims abstract description 30
- 239000011651 chromium Substances 0.000 claims abstract description 29
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 27
- 239000010937 tungsten Substances 0.000 claims abstract description 27
- 229910000599 Cr alloy Inorganic materials 0.000 claims description 5
- 229910001080 W alloy Inorganic materials 0.000 claims description 5
- 239000010408 film Substances 0.000 abstract description 29
- 229910052804 chromium Inorganic materials 0.000 abstract description 24
- 229910045601 alloy Inorganic materials 0.000 abstract description 7
- 239000000956 alloy Substances 0.000 abstract description 7
- 238000004544 sputter deposition Methods 0.000 abstract description 6
- 239000012535 impurity Substances 0.000 abstract description 2
- OLBVUFHMDRJKTK-UHFFFAOYSA-N [N].[O] Chemical compound [N].[O] OLBVUFHMDRJKTK-UHFFFAOYSA-N 0.000 abstract 1
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 238000000151 deposition Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005477 sputtering target Methods 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はアクティブマトリクス型液晶表示装置、イメー
ジセンサ−等に用いられる薄膜トランジスタ（以下、Ｔ
ＰＴと略称する）に関するものであモルファスシリコン
ＴＰＴを液晶表示装置、イメージセンサ−等に利用する
研究開発が活発である。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to thin film transistors (hereinafter referred to as T) used in active matrix liquid crystal display devices, image sensors, etc.
There is active research and development into using amorphous silicon TPT for liquid crystal display devices, image sensors, etc.
以下図面を参照しながら従来のＴＰＴの一例について説
明する。第２図は基本的なＴＰＴの断面図であり、３は
ガラス等の絶縁性基板であり、この上にゲート電極４、
ゲート絶縁膜５、アモルファスシリコン半導体膜６・、
およびソース・ドレイン電極７が順次形成されている。An example of a conventional TPT will be described below with reference to the drawings. FIG. 2 is a cross-sectional view of a basic TPT. 3 is an insulating substrate made of glass or the like, and a gate electrode 4 is placed on top of this.
Gate insulating film 5, amorphous silicon semiconductor film 6,
and source/drain electrodes 7 are sequentially formed.
従来、ゲート電極４にはクロム膜が用いられていた。Conventionally, a chromium film has been used for the gate electrode 4.
ゲート電極として要求される条件は、ＴＰＴのスイッチ
ング速度を遅くしないため、電気抵抗がなるべく低いこ
と、ゲート絶縁膜のエツチング液、例えばＨＦ水溶液な
どに対して耐蝕性があること、プラズマＣＶＤ法などに
よりゲート電極上にゲート絶縁膜を形成するとき、耐久
性があることなどである（例えば、「日経エレクトロニ
クスＪ １９８２年１２月２０日号、第１０５〜１７９
ページ）。The conditions required for the gate electrode are that the electrical resistance should be as low as possible in order not to slow down the switching speed of TPT, that it should be corrosion resistant to the etching solution of the gate insulating film, such as an HF aqueous solution, and that it should be etched using a plasma CVD method. When forming a gate insulating film on a gate electrode, it must be durable (for example, "Nikkei Electronics J, December 20, 1982 issue, Nos. 105-179").
page).
発明が解決しようとする問題点
しかしながら、近年液晶表示装置などは大面積化の要求
が強くなっており、従来のように、ゲート電極をクロム
膜にすると、シート抵抗が厚さ１０００Ａのとき約２．
５〜３．０Ω／口であるため、大面積化によりゲート電
極の配線長が長くなると、ゲート抵抗とゲート容量とが
増大し、そのＲＣ遅延時間が長くなり、ＴＰＴのスイッ
チング速度が遅くなってしまうという問題点が生じてき
た。そのため、抵抗率の低いアルミニウム膜などを用い
たソース・ドレイン電極の配線でゲート配線を補強し、
その配線抵抗を低下させる工夫も行われているが、ソー
ス・ドレイン配線とゲート配線のクロスオーバーする部
分は高抵抗のまま残っているので、上記問題点が依然と
して残っていた。Problems to be Solved by the Invention However, in recent years, there has been a strong demand for larger areas for liquid crystal display devices, etc., and if the gate electrode is made of a chrome film as in the past, the sheet resistance will be approximately 2 when the thickness is 1000A. ．．
5 to 3.0 Ω/port, so when the wiring length of the gate electrode becomes longer due to the enlargement of the area, the gate resistance and gate capacitance increase, the RC delay time becomes longer, and the switching speed of the TPT becomes slower. The problem of storage has arisen. Therefore, the gate wiring is reinforced with source/drain electrode wiring using a material such as an aluminum film with low resistivity.
Efforts have been made to reduce the wiring resistance, but the crossover portion between the source/drain wiring and the gate wiring remains high in resistance, so the above-mentioned problem still remains.
本発明は上記問題点に鑑み、ゲート配線抵抗の低いＴＰ
Ｔを提供するものである。In view of the above problems, the present invention provides a TP with low gate wiring resistance.
It provides T.
問題点を解決するための手段
上記問題点を解決するために本発明の薄膜トランジスタ
は、ゲート電極としてクロムとタングステンとの合金薄
膜、またはタングステン薄膜のいずれかを用いている。Means for Solving the Problems In order to solve the above problems, the thin film transistor of the present invention uses either a chromium and tungsten alloy thin film or a tungsten thin film as the gate electrode.
作用
本発明は上記した構成によって、従来より電気抵抗の低
いゲート電極が実現できる。Operation The present invention can realize a gate electrode with lower electric resistance than the conventional one by the above-described structure.
クロム、タングステンの電気抵抗率は、各々１２．９μ
Ω（２）、５．５μΩｃＩ１１（いずれも２０℃の値）
であり、タングステンのほうがクロムより低い値を示す
。The electrical resistivity of chromium and tungsten is 12.9μ each.
Ω(2), 5.5μΩcI11 (both values at 20℃)
, and tungsten shows a lower value than chromium.
従って、電気抵抗の点で“はクロムよりタングステンの
方が優れているといえるが、上記の値はバルクの場合で
あり、蒸着、スパッタ、ＣＶＤなどの方法により薄膜に
した場合は必ずしもバルク値通りの電気抵抗率を示すわ
けではない。蒸着膜は、特別な条件で作製しない限り、
通常、粒界を多く含む多結晶であり、かつ酸素、窒素な
どの不純物を含むためバルクの場合に比べて電気抵抗率
が高くなる。発明者らは、クロムとタングステンの合金
膜、またはタングステン膜がクロム膜より低抵抗を実現
できることを見出した。Therefore, it can be said that tungsten is superior to chromium in terms of electrical resistance, but the above values are for bulk, and when made into a thin film by evaporation, sputtering, CVD, etc., the bulk value is not necessarily the same. Unless the deposited film is made under special conditions, it does not show the electrical resistivity of
Usually, it is polycrystalline with many grain boundaries and contains impurities such as oxygen and nitrogen, so its electrical resistivity is higher than in the bulk case. The inventors have discovered that an alloy film of chromium and tungsten or a tungsten film can achieve lower resistance than a chromium film.
実施例
以下本発明の一実施例の薄膜トランジスタについて、図
面を参照しながら説明する。EXAMPLE Hereinafter, a thin film transistor according to an example of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例における薄膜トランジスタの
ゲート電極を成膜する場合に用いたスパッタ用ターゲ・
ノドの構成図である。第１図はクロムよりなる直径６イ
ンチの平板円形ターゲット１とその上に配置する６個の
１ａ１１角のタングステン板２を上方から見た図である
。Figure 1 shows a sputtering target used to form a gate electrode of a thin film transistor in an embodiment of the present invention.
It is a block diagram of a throat. FIG. 1 is a view from above of a flat circular target 1 made of chromium and having a diameter of 6 inches, and six 1a11 square tungsten plates 2 placed thereon.
同一スパッタ装置を用いて、上記ターゲット構成による
クロムとタングステンとの合金薄膜、単一のクロムター
ゲットによるクロム薄膜、および単一のタングステンタ
ーゲットによるタングステン薄膜の３種の薄膜を同一膜
厚になるよう作製し、その電気抵抗率を比較した。Using the same sputtering equipment, three types of thin films were produced to the same thickness: a chromium and tungsten alloy thin film with the above target configuration, a chromium thin film with a single chromium target, and a tungsten thin film with a single tungsten target. and compared their electrical resistivities.
その結果、クロム膜は２９μΩ印、クロムとタングステ
ンとの合金膜は２１μΩ〔、そしてタングステン膜は２
０μΩ国であった。As a result, the chromium film had a mark of 29μΩ, the alloy film of chromium and tungsten had a mark of 21μΩ, and the tungsten film had a mark of 29μΩ.
It was a 0 μΩ country.
以上のように、クロム膜に比べて、クロムとタングステ
ンとの合金膜、タングステン膜の方が低い電気抵抗率を
実現できる。As described above, an alloy film of chromium and tungsten and a tungsten film can achieve lower electrical resistivity than a chromium film.
なお、上記実施例においてはクロムとタングステンとの
合金薄膜を、クロムターゲット上にタングステンの小片
を配置した複合ターゲットを用いてスパッタにより作製
したが、あらかじめクロムとタングステンを冶金的に合
金化した合金ターゲットを用いてもよい。In the above example, the alloy thin film of chromium and tungsten was produced by sputtering using a composite target in which small pieces of tungsten were placed on a chromium target. may also be used.
また、クロムとタングステンの混合比率も比較的広い範
囲から選んでよい。Further, the mixing ratio of chromium and tungsten may be selected from a relatively wide range.
なお、本実施例にて使用したスパッタ装置は、１３．５
６ＭＨｚの発振器を備えたＲＦマグネトロンスパッタ装
置であり、□スパッタ条件としては、到達圧力５ Ｘ
１０”？Ｔｏｒｒ以下、Ａｒガス圧力２〜３ Ｘｌ０−
３Ｔｏｒｒ、基板温度１００℃、そして使用基板はＳｉ
ｎ。Note that the sputtering equipment used in this example was 13.5
It is an RF magnetron sputtering device equipped with a 6MHz oscillator, and the sputtering conditions are an ultimate pressure of 5
10"? Torr or less, Ar gas pressure 2-3 Xl0-
3Torr, substrate temperature 100℃, and the substrate used is Si.
n.
膜を表面にコートしであるガラスである。膜厚は約１０
００人になるようにした。It is glass whose surface is coated with a film. Film thickness is approximately 10
I set it to 00 people.
発明の効果
以上のように本発明は、薄膜トランジスタのゲート電極
としてクロムとタングステンとの合金薄膜、または、タ
ングステン薄膜のいずれかを用いることにより、ゲート
配線抵抗の低い薄膜トランジスタを実現できる。しかも
、クロムとタングステンとの合金薄膜を用いる場合、従
来のクロム薄膜を用いる場合の薄膜トランジスタの製造
方法を大きく変更する必要がない。また、各種構造の薄
膜トランジスタに容易に適応可能である。Effects of the Invention As described above, the present invention can realize a thin film transistor with low gate wiring resistance by using either a chromium and tungsten alloy thin film or a tungsten thin film as the gate electrode of the thin film transistor. Moreover, when a chromium and tungsten alloy thin film is used, there is no need to significantly change the conventional manufacturing method of thin film transistors using a chromium thin film. Further, it can be easily applied to thin film transistors of various structures.
第１図は本発明の実施例において使用したスパッタ用タ
ーゲットの上面図、第２図は基本的な薄膜トランジスタ
の断面図である。
１・・・・・・クロム、２・・・・・・タングステン、
３・旧・・絶縁性基板、４・・・・・・ゲート電極、５
・・・・・・ゲート絶縁膜、６・・・・・・アモルファ
スシリコン半導体膜、７・・・・・・ソース・ドレイン
’ＦｌｔＪｉ。
代理人の氏名 弁理士 中尾敏男 はか１名第１図
第２図
４ゲ′−ト１」かFIG. 1 is a top view of a sputtering target used in an example of the present invention, and FIG. 2 is a sectional view of a basic thin film transistor. 1...Chromium, 2...Tungsten,
3. Old... Insulating substrate, 4... Gate electrode, 5
. . . Gate insulating film, 6 . . . Amorphous silicon semiconductor film, 7 . . . Source/drain 'FltJi. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 1 Figure 2 Figure 4 Gate 1
Claims (1)
期ゲート電極がクロムとタングステンとの合金薄膜、ま
たは、タングステン薄膜のいずれかで構成されているこ
とを特徴とする薄膜トランジスタ。1. A thin film transistor having an insulated gate electrode, wherein the gate electrode is made of either a chromium and tungsten alloy thin film or a tungsten thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28848085A JPS62145870A (en) | 1985-12-20 | 1985-12-20 | Thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28848085A JPS62145870A (en) | 1985-12-20 | 1985-12-20 | Thin film transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62145870A true JPS62145870A (en) | 1987-06-29 |
Family
ID=17730750
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28848085A Pending JPS62145870A (en) | 1985-12-20 | 1985-12-20 | Thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62145870A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63246873A (en) * | 1987-04-02 | 1988-10-13 | Seikosha Co Ltd | Thin film transistor |
| WO1997030476A1 (en) * | 1996-02-16 | 1997-08-21 | Alliedsignal Inc. | Chromium refractory metal alloys conductors for use in high temperature integrated circuits |
| US6399960B1 (en) | 1998-07-16 | 2002-06-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it |
| US6608357B1 (en) | 1998-07-16 | 2003-08-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60103676A (en) * | 1983-11-11 | 1985-06-07 | Seiko Instr & Electronics Ltd | Manufacture of thin film transistor array |
-
1985
- 1985-12-20 JP JP28848085A patent/JPS62145870A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60103676A (en) * | 1983-11-11 | 1985-06-07 | Seiko Instr & Electronics Ltd | Manufacture of thin film transistor array |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63246873A (en) * | 1987-04-02 | 1988-10-13 | Seikosha Co Ltd | Thin film transistor |
| WO1997030476A1 (en) * | 1996-02-16 | 1997-08-21 | Alliedsignal Inc. | Chromium refractory metal alloys conductors for use in high temperature integrated circuits |
| US6399960B1 (en) | 1998-07-16 | 2002-06-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it |
| US6586766B2 (en) | 1998-07-16 | 2003-07-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device with semiconductor circuit comprising semiconductor units, and method of fabricating it |
| US6608357B1 (en) | 1998-07-16 | 2003-08-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof |
| US6822293B2 (en) | 1998-07-16 | 2004-11-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof |
| US7078768B2 (en) | 1998-07-16 | 2006-07-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof |
| US7371623B2 (en) | 1998-07-16 | 2008-05-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device with semiconductor circuit comprising semiconductor units, and method for fabricating it |
| US7709844B2 (en) | 1998-07-16 | 2010-05-04 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and processes for production thereof |
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