JPS62145761A - Semiconductor device - Google Patents

Abstract

PURPOSE:To achieve a groove type capacitor structure having high reliability by using a dense conductor layer which can be readily controlled at its sheet resistance value and stably formed as compared with an impurity diffused layer on the inner surface of the groove. CONSTITUTION:After an N-type diffused layer 301 is formed on a P-type silicon substrate 31, a silicon oxide film 32 and a silicon nitride film 33 are formed, etched by a normal photo-etching method and an anisotropic dry etching method to form a groove 310 to become a capacitor. Then, a polycrystalline silicon film 34 to which an N-type impurity is added is formed on the entire surface by a chemical vapor-phase growing method. Thereafter, a resin film 35 is buried in the groove to flatten the surface, the surface of the film 34 is etched to remain it only in the groove 310. After etching the film 35, the film 33 and the film 32 are removed, and a silicon oxide film 36 is formed on the entire surface. Thereafter, when the polycrystalline silicon film to become a capacitor electrode is buried and flattened and then patterned, a groove type capacitor structure is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a trench type capacitor that can be stably manufactured with high controllability and is suitable for high reliability.

[Background of the invention]

FIG. 2 shows a cross-sectional structure of a trench type capacitor (Japanese Patent Publication No. 58-12739) used in a conventional semiconductor device.

In FIG. 2, the symbol 21 represents a silicon substrate, 26 an insulating film, 27 a capacitor electrode, and 201 and 202 an n-type diffusion layer.

According to this structure, since the capacitor area is set by the area of the inner wall of the groove, there is an advantage that a large capacitance capacitor can be formed even within a narrow plane area.

However, when forming the n-type diffusion layer 202 on the inner wall of the trench, it is technically difficult to control the diffusion depth and impurity concentration. In other words, thermal diffusion has traditionally been used as a method for diffusing impurities into the inner walls of grooves, but with thermal diffusion, the diffusion depth and impurity concentration tend to fluctuate due to subtle temperature changes in the diffusion atmosphere. However, it was difficult to measure the diffusion depth and impurity concentration, especially on the sides. Therefore, it is difficult to control the sheet resistance value of the impurity diffusion layer 202, which is one factor that determines the characteristics of the capacitor, and this has been an obstacle to increasing the multiplication ratio of the trench type capacitor.

[Purpose of the invention]

An object of the present invention is to solve the above-mentioned conventional problems and provide a highly reliable semiconductor device.

[Summary of the invention]

In order to achieve the above object, the present invention provides a highly reliable trench capacitor structure by using a conductive layer on the inner surface of the trench whose sheet resistance value can be more easily controlled than an impurity diffusion layer and which can be formed more stably. It is something that will be realized. That is, instead of the impurity diffusion layer 202 shown in FIG.
The above problem was solved by forming the conductor layer 14 by chemical vapor deposition as shown in the figure. The sheet resistance value of this conductive layer 14 is determined by its film thickness and the amount of impurities added.
Since these controls can be easily performed using chemical vapor deposition, the electrical characteristics of the trench capacitor can also be stably controlled and reliability can be increased.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using Examples.

Embodiment 1 FIG. 3 shows the manufacturing process of a trench type capacitor according to this embodiment, and shows the process for forming the cross-sectional structure of FIG. 1.

FIG. 3(a) N-type diffusion layer 3 on HP-type silicon substrate 31
After forming 01, a silicon oxide film 32 and silicon nitride 11133 are formed.

FIG. 3(b): Desired portions of the silicon nitride film 33 and silicon oxide film 32 are selectively etched using a normal photoetching method, and the silicon substrate 31 is further etched using an anisotropic dry etching method to form a capacitor. A groove 310 is formed.

FIG. 3(C): A polycrystalline silicon film 34 doped with n-type impurities is formed over the entire surface by chemical vapor deposition. At this time, the sheet resistance value of the polycrystalline silicon film layer 34 depends on the concentration of impurities added to the film and the film thickness, and according to the chemical vapor deposition method, these values depend on the reaction in the growth reaction atmosphere. It can be easily controlled by the gas flow rate ratio, reaction time, etc.

Thereafter, a resin film 35 is buried in the groove and the surface is planarized.

FIG. 3(d): The exposed portion of the polycrystalline silicon film 34 is etched, leaving only the inside of the groove 310.

After etching, the resin film 35 is removed.

FIG. 3(e): The silicon nitride film 33 and the silicon oxide film 32 are removed, and a silicon oxide film 36 is formed on the entire surface.

Thereafter, a polycrystalline silicon film that will become a capacitor electrode is buried and planarized, and then patterned by a normal photoetching method to obtain a trench-type capacitor structure as shown in FIG.

Note that the polycrystalline silicon layer 34 used in this example is
A similar structure and effect can be obtained by replacing it with an epitaxial silicon layer doped with impurities.

Furthermore, if a method is used in which a polycrystalline silicon film or an epitaxial silicon film is selectively grown only on the silicon surface of the inner wall of the groove 310 in FIG. 3(b), FIG. 3(c) can be obtained.
The manufacturing steps shown in can be omitted.

Further, instead of the silicon oxide llll36, a high dielectric constant material such as a silicon nitride film or a tantalum oxide film, or a multilayer film material formed from a combination thereof may be used. Furthermore, as the capacitor electrode 17 shown in FIG. 1, not only polycrystalline silicon doped with impurities, but also metal silicides such as molybdenum silicide, metals such as tungsten, or multilayer materials made of a combination thereof can be used.

Embodiment 2 In this embodiment, a case will be described in which the trench capacitor of the present invention is applied to a one-transistor-one-capacitor type MOS dynamic random access memory (hereinafter abbreviated as D-RAM).

FIG. 4 shows a cell cross section of the D-RAM of this embodiment.

A transistor is composed of polycrystalline silicon 46 that becomes a gate electrode, a silicon oxide film 49 that becomes a gate insulating film, and an n-type impurity diffusion layer 402 that becomes a source/drain region, and polycrystalline silicon that becomes a capacitor electrode. 45
, a silicon oxide film 4B serving as a capacitor insulating film, and n
The trench type capacitor of the present invention is constituted by the polycrystalline silicon layer 44 doped with type impurities. Furthermore, the polycrystalline silicon layer 44 and the n-type diffusion layer 402 are different from each other.
electrically connected.

According to this structure, the sheet resistance value of the polycrystalline silicon layer 44 can be easily controlled by the amount of impurity added in the chemical vapor deposition process and its film thickness, so the reliability of the capacitor is increased and The reliability of the D-RAM can also be increased.

In this example, the capacitor electrode 45 and the capacitor insulating film 43 can be made of other materials as in Example 1, and the polycrystalline silicon layer 44 can be made of an epitaxial silicon layer or a selectively grown layer. A similar effect can be obtained.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the reliability of a semiconductor device having a trench capacitor having a large capacity can be significantly improved, and the controllability during manufacturing can be improved.
It is extremely advantageous for practical use because of its low heat.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the structure of the trench type capacitor of the present invention;
FIG. 2 is a sectional view showing the structure of a conventional trench capacitor, FIG. 3 is a sectional view showing one embodiment of the present invention, and FIG. 4 is a sectional view showing another embodiment of the present invention. , 21. ,3
],, 41...Silicon substrate, 14°34.33
...Polycrystalline silicon film formed by chemical vapor deposition and doped with impurities at the same time, 16°26.36.43...
・Capacitor isolation + 1# film, 17°27.37,45...
・Capacitor electrode, 32...Silicon oxide film, 33・
...Silicon nitride film, 35...Resin film, 42...Field oxide film, 46...Gate electrode, 47...Interlayer insulating film, 48...Aluminum wiring, 49...Gate insulating film ,101,201,202゜301.401
, 402...n-type impurity diffusion layer, 310... groove portion.

Claims (1)

[Claims] a groove formed in a semiconductor substrate having a first conductivity type; a first conductor layer having the first conductivity type formed on the surface of the groove; and laminated on the first conductor layer. A semiconductor device comprising a capacitor including at least an insulating film and a second conductor layer.