JPS62145376A - Image processing method - Google Patents

Abstract

PURPOSE:To efficiently perform an image processing by which a useful part can be easily identified from a useless part at a late image processing by writing null data at all of the areas where a useless image part is stored. CONSTITUTION:The first image stored at the first frame memory 11 is shifted in a horizontal and/or vertical direction relatively to the second image stored at the second frame memory 21. And a prescribed arithmetic processing is applied at an overlapped part between the first and the second images, and at the time of assuming that an image part constituted with an arithmetic result as the useful part, and a part other than that as a useless image part, the null data (NULL data, it is generally a logic 0) are written at all of the storage areas of the third frame memory 31 which stores the useless image part. In this way, it is easily possible to identify the useful part from the useless part by a processor which performs the image processing at a late time.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to an image processing method, and particularly to a method for shifting one image stored in first and second frame memories by a predetermined amount relative to the other. , relates to an image processing method for generating an image by performing a predetermined calculation between first and second images in an overlapping portion.

<Prior art> A first image stored in a first frame memory is shifted horizontally and/or vertically relative to a second image stored in a second frame memory, so that the first image is overlapped with the second image stored in the second frame memory. There is image processing in which an image is generated by performing predetermined calculation processing between the first and second images of a rectangular portion, and a desired result is obtained using the image portion obtained by the calculation.

By the way, in order to perform such processing, it is necessary to determine which parts of the generated image are useless parts and which parts are useful parts, in other words, which parts need to be subjected to image processing. The processing device performing the processing must be easily recognizable.

<The problem that the invention is trying to solve> However,
Conventionally, it has not been possible to distinguish which parts are useless parts and which parts are useful parts by simple processing.

From the above, it is an object of the present invention to make it possible to distinguish which parts are useless parts and which parts are useful parts, by simple processing and high-speed processing, and to distinguish between blank features in images. It is an object of the present invention to provide an image processing method that can be carried out by oneself.

Means to solve problems〉 FIG. 1 is a block diagram of an image processing device.

11.21.31 is the 1st. Second. The third frame memory, 12, 22, and 32 are serial access memories (SA
M), 13 and 23 are address counters, 41 is an arithmetic unit, 142 is a horizontal width register, 43 is a vertical width register, 45 is a horizontal scan counter, and 46 is a vertical scan counter.

Action> The first image stored in the first frame memory 11 is shifted horizontally and/or vertically relative to the second image stored in the second frame memory 21, so that the first image is overlapped with the second image stored in the second frame memory 21. When performing predetermined arithmetic processing between the first and second images of a rectangular part, and making the image part composed of the result of the calculation useful and the others useless, the useless image part is stored. It is possible to write all null data (NULL data, usually logic "0") into the storage area of the third frame memory 31.

In this way, a processing device that processes the image later can easily identify which parts are useful and which are useless.

<Embodiment> FIG. 1 is a block diagram of an image processing apparatus that implements the present invention.

11.21.31 is the 1st. Second. The third frame memory, 12, 22, 32 are serial access memories (SA
M), 13.23 is an address counter, 41 is an arithmetic unit, 42 is a horizontal width register, 43 is a vertical width register, 451 is a horizontal scan counter, and 4G is a vertical scan counter.

The first and second frame memories 11.21 each have a first
, a second image is stored, an image generated using the first and second TB images is stored in the third frame memory 31,
Each has a size of 256x256.

address counters 13.23; horizontal counters 13a, 13b; 23a, each having a capacity of 256 and indicating the horizontal and vertical memory scan positions;

23b.

Serial access memory 12.22 is vertical counter 13
b, 23b indicate the first and second frame memories 11.
One horizontal line of image data is transferred from 21, and the image data is output from the address indicated by the horizontal counters 13a and 23a.

The serial access memory 32 writes data to the address indicated by the horizontal counter 13a of the address counter 13, and every time one horizontal scan is completed, the contents are written to the line of the third frame memory 31 indicated by the vertical counter 13b of the address counter 13. Transferred in parallel.

Arithmetic unit 41 is serial access memory 12.22
A predetermined calculation process is sequentially performed on one pixel of image data inputted from the 1-pixel image data, and the data is output.

Note that the arithmetic processing includes logical OR, logical product, exclusive OR, and other operations, and the type of operation to be performed is separately instructed.

The operation shown in FIG. 1 will be explained below.

Note that the first image IM stored in the first frame memory 11 (see FIG. 2 (A)) is relative to the second image M2 stored in the second frame memory 21. The image is then shifted horizontally and/or vertically, and predetermined calculation processing is performed between the first and second images of the overlapping rectangular portion (shaded area in Figure 2 (A)) OP, and the image is composed of the calculation results. Image part IM.

(See the shaded area in FIG. 2 CB) are useful, and the rest are useless image parts IM. And the useless image part IMN
Null data (NULL data, usually logic 0'°) is written in all the storage areas of the frame memory 31 that store IM, and the results of the calculation are stored in the storage areas that store useful image parts IM. shall be.

In advance, among the four corner points of the rectangular portion OP, the first and second points of points I-P that are scanned earliest by raster scanning are selected.
Horizontal and vertical positions in the frame memory are determined by address counters 13.23 horizontal and vertical counters 13a,
13 bH23a and 23 b, respectively. In the example of FIG. 2, H,=H,.

V,=V,i H2=O,V2. =0. Also, the horizontal width HA and vertical width vA of the rectangular portion OP are stored in the horizontal width register 42 and the vertical width ')x', respectively.
Cero memorized in 143. Note that when HA>0SvA>O, a low level (logic "ON") is output. Therefore, the AND gate 44a is initially open.

When a request for image generation occurs in this state, the vertical positions V, , V indicated by the vertical counters 13b and 23b
The first and second image data for one horizontal line in No. 2 are respectively read out to the serial access memories 12 and 22.

Next, the horizontal counters 13a and 23a respectively specify 1 from the address of the serial access memory 12 and 22.
Image data for pixels is input to the arithmetic unit 41.

The arithmetic unit 41 executes a separately designated arithmetic process using the input image data, and outputs the result of the arithmetic operation.

The serial access memory 32 stores the calculation result input via the AND gate 44a at the address indicated by the horizontal counter 13a of the address counter 13.

When the above processing is completed, each horizontal counter 13a, 13
b increases its content by 1 count H, + 1-H,
, H2+ 1→H2), and the horizontal width register 42 counts down its contents by 1 (HA-1→HA). or,
The horizontal scan counter 45 with a capacity of 256 has its contents c
Count up H (initial value of CH is zero).

Thereafter, the same process is repeated and the calculation results are stored in the serial access memory 32 one after another.

Then, when the above process is repeated HA times, the content of the horizontal width register 42 becomes zero, and its output becomes high level (
“1”). As a result, the output of the AND gate 44a becomes 0' via the OR gate 44b1 and the NOT gate 44c.
become. At this time, the content of the horizontal counter 13a is O1, the content of horizontal counter 23fi is HA1, and the content CH of horizontal scan counter 45 is HA. As a result of the above, the calculation result is stored at tζ from address Hs to address 2554 of the serial access memory 32.

Thereafter, the above processing is repeated until CH=O, in other words, until one horizontal scan is completed, but regardless of the calculation result, the output of the AND gate 44a is at a low level (logical
0°°), so ""0'° is sequentially O? of the Norial access memory 32? ]Hnl to address (H9-1).

Then, if C,,=0, in other words, if one raster scan is completed, the contents of the vertical width register 43, ■,
is counted down by 1, and the horizontal width register 42 is set to HA again. As a result, AND gate 44a opens.

Also, when the time reaches C8-0, the contents of the vertical counters 13b and 23b increase by one count, V, +1→V.

(2+1→2), and the content CV of the vertical scan counter 46 is also incremented by 1 (however, the initial value of CV is zero). At this time, the content of the horizontal counter 13a is HS.
The content of the 1 horizontal counter 23a is O.

Thereafter, the above process is repeated until VA-0 is reached.

■When A-0 is reached, the image of the part 31a enclosed by the dotted line in FIG.
1 (This means that this has been completed. From then on, the output of the vertical width register 43 remains at a high level until the content CV of the vertical scan counter 46 becomes zero, in other words, until the scanning of one frame is completed. becomes and gate 44a
The output becomes zero when it reaches ``°0pa.''

In addition, when ■=0, the contents of the horizontal counter 13a are Hs, the contents of the horizontal counter 23a are 0, the contents of the vertical counter 13b are 01, and the contents of the vertical counter 23b are ■6.
, the content of the horizontal width register 42 is HA1, the content of the horizontal scan counter 45 is 0, and the content of the vertical scan counter 46 is ``■9''.

Thereafter, the above process is repeated until CV=O, in other words, until one frame of scanning is completed, but regardless of the calculation result, the output of the AND gate 44a remains at a low level (
The logic is ``0°°), so ゛.

0'' are sequentially written to the serial access memory 32,
Thereafter, it is stored in the storage area of the third frame memory 31.

As a result of the above, NULL data ("0") is stored in the storage area excluding the storage area for storing the image data IM (see diagonal lines in Figure 2 (B)) that has been subjected to arithmetic processing ( Konaro.

Therefore, when the processing device subsequently performs a predetermined process on the image stored in the frame memory 31, it can easily distinguish between useless portions and useful image portions.

3 to 5 show various examples in which the relative shift directions of the first image IM and the second image IM2 are changed, and the same parts as in FIG. 2 are given the same reference numerals. .

<Effects of the Invention> According to the present invention, the first image stored in the first frame memory is horizontally and/or When performing a predetermined calculation process between the first and second images of the overlapping rectangular portion by shifting in the vertical direction, and making the image part composed of the calculation result useful and the other image parts useless, All null data (NU
Since the LL disk (usually a logical "o") is written, the processing device that processes the image later can easily identify which parts are useful and useless, making image processing more efficient. Now I can do it.

Further, according to the present invention, the first and second image data for one horizontal line are read out to the serial access memory respectively, and the image data is sequentially read from each serial access memory and input to the logic operation section, and the logic operation is performed. Since the results are stored in the third serial access memory and the contents of the third serial access memory are stored in the third frame memory, images can be generated by high-speed processing.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an image processing apparatus that implements the present invention, and FIGS. 2 to 5 are explanatory diagrams of the image processing of the present invention. 11.21. ．． 31 - Frame memory, 12,2
2.32... Real access memory 13.23... Address color reflex, 13a, 23a--Horizontal counter, 13b, 23b... Vertical counter, 41... Arithmetic unit, 42... Horizontal width one disc, 43...Vertical width register, 45...Horizontal scan counter, 46...Vertical scan counter Patent applicant Fana Nku Co., Ltd. Representative Patent attorney Chiki Saito Figure 5

Claims (2)

[Claims] (1) shifting the first image stored in the first frame memory in the horizontal and/or vertical direction relative to the second image stored in the second frame memory;
In an image processing method that generates an image by performing predetermined arithmetic processing between first and second images of an overlapping rectangular portion, the point scanned earliest by raster scanning among the four corner points of the rectangular portion; the first and second addresses in the first and second frame memories, the horizontal width and the vertical width of the rectangular portion, and the first address of the first frame memory and the second frame memory. The image data is sequentially read for each picture element from the second address, and a predetermined calculation is performed on the image data, and the calculation result is stored in the third frame memory, and the horizontal direction of the image data read from the first and second frame memories is It monitors whether the reading width exceeds the set horizontal width, and if it does, it stores null data in the third frame memory until the end of one horizontal scan cycle, and after the end of one horizontal scan cycle. , advance the vertical position of the first and second addresses by one, and thereafter perform the above processing until the vertical reading width of the image data read from the first and second frame memories exceeds the set vertical width. An image processing method characterized in that, when a set vertical width is repeatedly exceeded, null data is stored in a third frame memory until a raster scan cycle for one screen is completed. (2) The first and second image data for one horizontal line corresponding to the vertical address included in the first and second addresses are respectively read out to the serial access memory, and
, reads image data from each serial access memory for each pixel from the horizontal address included in the second address and inputs it to the calculation section, stores the calculation result in the third serial access memory, and stores the calculation result in the third serial access memory. The image processing method according to claim 1, characterized in that the contents of the access memory are stored in a third frame memory.