JPS62144937A - Process for adhesion in multi-layer state for multi-layered printed circuit board - Google Patents

Process for adhesion in multi-layer state for multi-layered printed circuit board

Info

Publication number
JPS62144937A
JPS62144937A JP60286701A JP28670185A JPS62144937A JP S62144937 A JPS62144937 A JP S62144937A JP 60286701 A JP60286701 A JP 60286701A JP 28670185 A JP28670185 A JP 28670185A JP S62144937 A JPS62144937 A JP S62144937A
Authority
JP
Japan
Prior art keywords
circuit board
prepreg
stacked
wire
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60286701A
Other languages
Japanese (ja)
Inventor
Shinnosuke Watanabe
渡辺 信之介
Harumi Shiozaki
塩崎 晴美
Fumiaki Sasaki
佐々木 文秋
Haruo Tonegawa
利根川 治夫
Fumio Miyata
宮田 文男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP60286701A priority Critical patent/JPS62144937A/en
Publication of JPS62144937A publication Critical patent/JPS62144937A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)

Abstract

PURPOSE:To maintain the accuracy of positions between circuits and to raise workability, by adhering with pressing under heating after fastening previously with a wire the required number of stacked circuit boards, prepregs, and copper foils. CONSTITUTION:Guide holes 3 are provided at the four corners departed from the circuit area 2 of a circuit board 1, and holes of more than same diameter are opened at the four corners of a prepreg 4 on same positions corresponding to the circuit board. A positioning pin 7 with an air-cylinder at a fastening tool table 6 is lifted and the pin is inserted into the guide holes. Then a pressing board 9 is lowered and presses the positioned circuit board 1 and prepreg 4, and the positioning pin 7 is pulled out. With a fastening tool 10 a wire 11 is struck at A spot on the circuit board 1, prepreg 4, and caulked with a caulking jig A 12 and a caulking jig B 13. A copper foil 14 is stacked above and below the circuit board 1, prepreg 4, then several layers of set hold between panel boards 18 are stacked, and above and below them cushion 17 and plate B 16, cushion 17 and plate A 15 are placed. This is set to a multi-layering adhesion apparatus 19 to be adhered. A dismounted article 20 is unloaded to obtain a product 21 by cutting the wire part.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、多層印刷配線板において複数の回路相互の位
置精度を保持しながら多層化Ifj着を行う方法に関す
る。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for performing multilayer Ifj deposition while maintaining mutual positional accuracy of a plurality of circuits in a multilayer printed wiring board.

(従来の技術) 多層印刷配線板は、複数の回路相互の位置精度を保持す
る方法として回路板、プリプレグ、銅箔にガイド穴を所
定の数だけ加工し、鏡板にピンを立て複数の回路板、プ
リプレグ、銅箔を重ねて行き、多層化接Nを行う。
(Prior art) Multilayer printed wiring boards are made by drilling a predetermined number of guide holes in circuit boards, prepregs, and copper foil, and attaching pins to mirror plates to maintain positional accuracy between multiple circuits. , prepreg, and copper foil, and perform multilayer bonding.

(発明が解決しようとする問題点) 前記方法は、多層化接着のために加熱する際ガイド穴及
び端部から樹脂が流出し、ガイドピンと鏡板端部に付着
する。したがって接層後の一板と製品の解体が困難であ
シ、鏡板に付着し次樹脂の除去に時間を要し、除去もn
、がらると次に鏡板を使用する時に凹みを生ずる問題が
ある。
(Problems to be Solved by the Invention) In the above method, when heating is performed for multilayer adhesion, resin flows out from the guide hole and the end, and adheres to the guide pin and the end of the end plate. Therefore, it is difficult to disassemble the product and the plate after bonding, and it takes time to remove the resin that adheres to the mirror plate and is difficult to remove.
, there is a problem in that if the mirror plate is empty, it will create a dent when the mirror plate is used next time.

(問題点を解決するtめの手段) 本発明は、複数の回路板、プリプレグ、鋼箔全針金によ
って綴じ、回路間の位置精度全保持して多層化接着全行
い、その後綴じ部を廃棄する方法である。
(Tth means for solving the problem) The present invention binds a plurality of circuit boards, prepregs, and steel foils with wire, maintains the positional accuracy between the circuits, performs all multilayer bonding, and then discards the binding portion. It's a method.

(作用) 針金によって複数の回路5f2、プリプレグ、銅箔を綴
じることにより、回路相互の位t@度を保持する。又、
一板サイズ内に穴を使用しない九め、鏡板に樹脂が付着
しない。さらに、綴じ部を切断廃棄する定め、針金のJ
f!シ外し作条が不要であり解体作業が容易である。
(Function) By binding a plurality of circuits 5f2, prepreg, and copper foil with wire, the mutual position of the circuits is maintained. or,
9th, do not use holes within the size of one plate, and resin will not adhere to the mirror plate. In addition, there is a provision to cut and discard the binding section, and
f! There is no need to remove the strips and the dismantling work is easy.

実施例 本発明の方法実施例を第1. 2. 5図に示す。Example Embodiments of the method of the present invention are described in Section 1. 2. Shown in Figure 5.

回路@1の回路エリア2を外rt、た四隅にガイド穴5
を設け、プリプレグ4の四隅に回路板と対応して同位置
に同径以上の穴を明ける。前記回路板とプリプレグを搬
送装置5で搬送し、綴じ装置テーブル6のエアシリンダ
何位@決めビン7を上昇させ、ガイド穴にビンを挿入さ
せて回路間の位置合わせを行う。次に押え板9が下降し
位置決めさj、定回踏板1、プリプレグ4を押え、位置
決めピン7を抜く。さらに、テーブル6を上下のみ移動
させて足位置で停止する。綴じ装置10によって回路板
1、プリプレグ4に針金11をA部に打つ。第2図にお
いてかしめ治具A12及びかしめ治具B15によってか
しめる。かしめ個所は、回路板、プリプレグの2辺にお
いて各辺5個所とする。次いで第5図において打斜さn
、た回路板、プリプレグの上下に銅箔14を重ね、さら
に鏡1i18で挟むセット全数層重ね、その上下Vこク
ッション17とプレートB16、クッション17とプレ
ートA15を置く。07″lを多ノー化接着装置19に
セットして接着を行う。接着後、解体して解体品20を
取り出し、切断機によって針金部全切断して製品21と
する。
External circuit area 2 of circuit @1, and guide holes 5 in the four corners.
, and holes with the same diameter or more are made at the same positions in the four corners of the prepreg 4 in correspondence with the circuit board. The circuit board and the prepreg are transported by the transport device 5, and the pin 7 for determining the position of the air cylinder on the binding device table 6 is raised, and the pin is inserted into the guide hole to align the circuits. Next, the holding plate 9 is lowered to hold down the positioning plate 1, the fixed rotation tread plate 1, and the prepreg 4, and the positioning pin 7 is pulled out. Further, the table 6 is moved only up and down and stopped at the foot position. A wire 11 is attached to a portion A of the circuit board 1 and the prepreg 4 using a binding device 10. In FIG. 2, caulking is performed using a caulking jig A12 and a caulking jig B15. The caulking points shall be five on each side of the circuit board and the two sides of the prepreg. Next, in Fig. 5, the slope n
Copper foils 14 are stacked on top and bottom of the circuit board and prepreg, and all the layers of the set sandwiched by mirrors 1i18 are stacked, and a cushion 17 and a plate B16, and a cushion 17 and a plate A15 are placed above and below the set. 07''l is set in the multi-node bonding device 19 and bonded. After bonding, it is dismantled and the disassembled product 20 is taken out, and the entire wire portion is cut by a cutting machine to obtain the product 21.

(発明の効果〕 本発明によって次の顕者な効果を得た。(Effect of the invention〕 The present invention has achieved the following remarkable effects.

(1)  回路間の位#精度七十分に保持でき、作業性
が向上しto (2)多層化接着後の解体作条性が同上しto(3)鏡
板に樹脂が付着したい友め、その洗浄が容易となった0
(1) The position accuracy between the circuits can be maintained at 70%, improving workability. (2) The ease of disassembly after multi-layer bonding is the same as above. (3) For those who want resin to adhere to the end plate. Its cleaning has become easier0

【図面の簡単な説明】[Brief explanation of drawings]

第1因は、本発明の綴じ装置まで、第2図は綴じ完了ま
で、第5図は接7ft児了までの断面図及び斜視図であ
る。 符号の説明 1 回路板      2 回路エリア5 ガイド穴 
    4 プリプレグsi送装fl      6 
 綴じ装置テーブル7 位置決めピン   8 エアー
シリンダー9 押え阪      10  綴じ装置1
1  針金       12  かしめ治具A13 
 かしめ治具B    14  銅箔15  プレート
A     16  プレートB17  クッシヨン 
  18  @板19  多層化接着装置  20  
解体品、21   切断による仕上げ製品 代理人弁理士 若 林 邦 彦l− し“・□ ・・か 第1図 第2図 第3圓
The first factor is the binding device of the present invention, FIG. 2 is a sectional view and perspective view until the binding is completed, and FIG. Explanation of symbols 1 Circuit board 2 Circuit area 5 Guide hole
4 Prepreg si feeding fl 6
Binding device table 7 Positioning pin 8 Air cylinder 9 Presser foot 10 Binding device 1
1 wire 12 caulking jig A13
Caulking jig B 14 Copper foil 15 Plate A 16 Plate B 17 Cushion
18 @ Board 19 Multilayer adhesive device 20
Dismantled products, 21 Finished products by cutting Patent attorney Kunihiko Wakabayashi ``・□ ...or Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1、回路板、プリプレグ、銅箔を所定枚数だけ重ねて加
熱加圧する多層印刷配線板の接着工程において、所定の
枚数を重ねた回路板、プリプレグ、銅箔を予め針金によ
って綴じた後加熱加圧して接着することを特徴とする多
層印刷配線板の多層化接着方法。
1. In the adhesion process of multilayer printed wiring boards, in which a predetermined number of circuit boards, prepregs, and copper foils are stacked and heated and pressed, a predetermined number of stacked circuit boards, prepregs, and copper foils are bound in advance with wire and then heated and pressed. A multilayer adhesion method for a multilayer printed wiring board, characterized by adhering the multilayer printed wiring board.
JP60286701A 1985-12-19 1985-12-19 Process for adhesion in multi-layer state for multi-layered printed circuit board Pending JPS62144937A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60286701A JPS62144937A (en) 1985-12-19 1985-12-19 Process for adhesion in multi-layer state for multi-layered printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60286701A JPS62144937A (en) 1985-12-19 1985-12-19 Process for adhesion in multi-layer state for multi-layered printed circuit board

Publications (1)

Publication Number Publication Date
JPS62144937A true JPS62144937A (en) 1987-06-29

Family

ID=17707865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60286701A Pending JPS62144937A (en) 1985-12-19 1985-12-19 Process for adhesion in multi-layer state for multi-layered printed circuit board

Country Status (1)

Country Link
JP (1) JPS62144937A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01177522A (en) * 1988-01-06 1989-07-13 Canon Electron Inc Method and structure for caulking light shielding blade
JPH01248695A (en) * 1988-03-30 1989-10-04 Aica Kogyo Co Ltd Manufacture of multilayer printed wiring board
JPH02208998A (en) * 1989-02-08 1990-08-20 Sumitomo Bakelite Co Ltd Manufacture of multilayer printed circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01177522A (en) * 1988-01-06 1989-07-13 Canon Electron Inc Method and structure for caulking light shielding blade
JPH01248695A (en) * 1988-03-30 1989-10-04 Aica Kogyo Co Ltd Manufacture of multilayer printed wiring board
JPH02208998A (en) * 1989-02-08 1990-08-20 Sumitomo Bakelite Co Ltd Manufacture of multilayer printed circuit board

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