JP2507238B2 - Method for manufacturing multilayer printed circuit board - Google Patents

Method for manufacturing multilayer printed circuit board

Info

Publication number
JP2507238B2
JP2507238B2 JP2419308A JP41930890A JP2507238B2 JP 2507238 B2 JP2507238 B2 JP 2507238B2 JP 2419308 A JP2419308 A JP 2419308A JP 41930890 A JP41930890 A JP 41930890A JP 2507238 B2 JP2507238 B2 JP 2507238B2
Authority
JP
Japan
Prior art keywords
printed circuit
circuit board
printed wiring
multilayer printed
positioning jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2419308A
Other languages
Japanese (ja)
Other versions
JPH04225298A (en
Inventor
和則 竹口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Risho Kogyo Co Ltd
Original Assignee
Risho Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Risho Kogyo Co Ltd filed Critical Risho Kogyo Co Ltd
Priority to JP2419308A priority Critical patent/JP2507238B2/en
Publication of JPH04225298A publication Critical patent/JPH04225298A/en
Application granted granted Critical
Publication of JP2507238B2 publication Critical patent/JP2507238B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Laminated Bodies (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Reinforced Plastic Materials (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は電子回路機器に用いら
れる多層プリント回路基板の製造法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed circuit board used in electronic circuit equipment.

【0002】[0002]

【従来技術およびその問題点】5層以上の多層プリント
回路板は、一般に、内層用プリント回路板2枚以上を、
プリプレグを介し、銅箔または銅箔張積層板を少なくと
も1表面に配置して重ね合せ、全体を加熱加圧積層一体
化して多層プリント回路用基板を作成し、次いで層間を
回路接続させるためにスルーホール孔を開けてスルーホ
ール孔の壁面にスルーホール鍍金して接続し、外層に回
路パターンを形成する、等の種々の工程を経て、多層プ
リント回路板を得ている。このように、加熱加圧積層後
に外側からスルーホール孔を加工し、スルーホール孔の
壁面にスルーホール鍍金して、内層の層間および外層銅
箔との間を電気的に接続するので、内層プリント回路板
の層間位置は正確に合わせる必要があり、最低50〜1
00ミクロン以下に保つ必要がある。そこで従来の製造
法はピンラミと称せられる方法が用いられている。六層
プリント回路基板を例にとると、第7図に説明するよう
に、位置合せ用のガイドビン14,…,14を立設した
上下合せ金型10,10′を用い、2枚の内層用両面プ
リント回路板18,19、2枚の外層用片面銅張積層基
板16a,16b、および間に介装するプリプレグ1
7,17,17に、それぞれ位置合せ用のガイド孔を形
成して、下側金型10に立設のガイドピン14,…,1
4に下側外層用片面銅張積層板16a、プリプレグ1
7、内層用両面プリント回路板18、プリプレグ17、
内層用両面プリント回路板19、プリプレグ17、上側
外層用片面銅張積層板16bの順にそれぞれガイド孔に
挿入しながら位置合せして多層プリント回路基板1枚分
を積み重ね、必要により多数枚分を積み重ねる場合は間
に予めガイドピンが遊挿する孔を開けた鏡面板15を介
して同様に積み重ね、最後に上側金型10′を合わせて
加圧加熱し積層一体化することがおこなわれていて、内
層用両面プリント回路板2枚の層間の位置精度は約10
0ミクロン以下とされている。しかしながら、この従来
の多層プリント回路基板の製造法は加圧加熱時にプリプ
レグ17,17,17の樹脂が流れ出てガイドピン1
4,…,14の回りまで至り、更にプリプレグ樹脂の硬
化による収縮がガイドピンに大きなストレスとしてかか
り強固に接着する事態が発生する問題点がある。また、
プリプレグ樹脂がガイドピンに一旦接着するとガイドピ
ン14,…を取り外すことになるが、ガイドピンを取り
外す作業の際に、積層一体化物に金型10,10′の重
量が加算され大変に重いものを移動することが屡々必要
になりその移動作業に危険を伴うと云う問題点があると
共に、ガイドピンを取り外す等の解板作業に手間取ると
云う問題点もある。また、重量が重いために大型プレス
での成形が難しく、量産性に劣ると云う問題もある。
2. Description of the Related Art A multilayer printed circuit board having five or more layers generally includes two or more inner layer printed circuit boards.
A copper foil or a copper foil-clad laminate is placed on at least one surface through a prepreg and laminated, and the whole is laminated under heat and pressure to form a multilayer printed circuit board, and then through for connecting circuits between layers. A multi-layer printed circuit board is obtained through various processes such as forming a hole hole, plating by connecting to a wall surface of the through hole hole by through hole, and forming a circuit pattern on an outer layer. In this way, through-holes are processed from the outside after heat-press lamination, and the walls of the through-holes are plated with through-holes to electrically connect the inner-layer interlayer and the outer-layer copper foil. It is necessary to align the interlayer positions of the circuit board accurately, and at least 50 to 1
It should be kept below 00 microns. Therefore, the conventional manufacturing method uses a method called pin lami. Taking a six-layer printed circuit board as an example, as shown in FIG. 7, the upper and lower alignment molds 10, 10 'with the guide bins 14, ... Double-sided printed circuit boards 18, 19, two single-sided copper clad laminates 16a, 16b for outer layers, and a prepreg 1 interposed therebetween
Guide holes 14 for positioning are formed in 7, 17 and 17, respectively, and guide pins 14, ...
4. One side copper clad laminate 16a for lower outer layer, prepreg 1
7, double-sided printed circuit board for inner layer 18, prepreg 17,
The inner-side double-sided printed circuit board 19, the prepreg 17, and the upper-side outer-layer single-sided copper clad laminate 16b are inserted into the guide holes in this order and aligned to stack one multilayer printed circuit board, and if necessary, stack multiple boards. In this case, stacking is performed in the same manner through a mirror surface plate 15 in which a hole into which a guide pin is loosely inserted is previously formed, and finally, the upper mold 10 'is combined and pressure-heated to be laminated and integrated. Position accuracy between two inner-sided double-sided printed circuit boards is about 10
It is said to be 0 micron or less. However, in this conventional method for manufacturing a multilayer printed circuit board, the resin of the prepregs 17, 17, 17 flows out during pressurization and heating, and the guide pin 1
There is a problem that the contraction due to the curing of the prepreg resin is applied to the guide pins as a large stress to reach around 4, ... Also,
Once the prepreg resin has adhered to the guide pins, the guide pins 14, ... Are to be removed. However, when the guide pins are removed, the weight of the molds 10 and 10 'is added to the laminated integrated product, making it very heavy. There is a problem in that it is often necessary to move it, and the moving work is dangerous, and there is also a problem that it takes time to remove the guide pin and other work to remove the plate. In addition, since the weight is heavy, it is difficult to mold with a large-sized press, and there is a problem that mass productivity is poor.

【0003】[0003]

【問題点を解決するための手段】この発明は、上記問題
点を解決するために、内層用プリント配線板2枚以上
を、プリプレグを介し、導電箔または導電箔張積層板を
少なくとも1表面に配置して重ね合せ、鏡面板に挟んで
熱盤間で加熱加圧積層一体化する多層プリント回路用基
板の製造法において、鏡面板周辺の周囲四辺または対向
二辺に熱盤に対して垂直に立設されたガイドピンを有す
る位置決め治具を配置し、内層用プリント配線板を鏡面
板に対して拡大幅に形成すると共に該拡大幅部に内層用
プリント配線板相互間の位置合せ用のガイド孔を形成し
て、該ガイド孔に前記位置決め治具のガイドピンを挿通
させて内層用プリント配線板相互の位置合せ状態を保ち
つつ全体を加熱加圧積層一体化することを特徴とする多
層プリント回路用基板の製造法に構成したのである。位
置決め治具は、第3図に示すように棒状または環状に形
成したものである。棒状のものはこれを、第4図に示す
ように、環状に組合せ固定してもよくまた対向2列配置
でもよい。尚、対向2列配置する場合は、第4図(イ)
に示すように棒状体の端縁部に突出部3aを形成すると
垂直安定性がよくなる。棒状または環状の位置決め治具
は、第5図に示すように、その断面が一般的には矩形で
あるが、長手方向にリブ3bを形成すると重量の増加を
少なくして補強できるので長尺物に対して変形が少なく
なる。また位置決め治具は加熱温度に対し寸法安定性に
優れたものが好ましく、高精度のものを要求する場合に
は、第6図に示すように、芯材3の両側に芯材の熱膨
張係数を補償する熱膨張係数の別材3,3で挟む積
層構造物を用いて位置決め治具を形成すると温度変化が
極めて少なくすることができる。
SUMMARY OF THE INVENTION In order to solve the above problems, the present invention provides two or more printed wiring boards for inner layers with a conductive foil or a conductive foil-clad laminate on at least one surface via a prepreg. In a method for manufacturing a multilayer printed circuit board that is placed and overlapped, and is sandwiched between mirror plates to heat and pressure laminate them between hot plates, in the four sides or the opposite two sides around the mirror plate, perpendicular to the hot plate. A positioning jig having standing guide pins is arranged to form the inner layer printed wiring board in an enlarged width with respect to the mirror surface plate, and a guide for alignment between the inner layer printed wiring boards in the enlarged width portion. A multi-layer print characterized in that a hole is formed, and the guide pin of the positioning jig is inserted into the guide hole to maintain the alignment of the inner layer printed wiring boards with each other while heating and pressurizing and laminating the whole. Circuit board Than it was constructed in the manufacturing process. The positioning jig is formed into a rod shape or an annular shape as shown in FIG. As shown in FIG. 4, the rod-shaped members may be combined and fixed in an annular shape, or may be arranged in two opposite rows. Incidentally, in the case of arranging in opposite two rows, FIG.
As shown in (3), the vertical stability is improved by forming the protrusion 3a on the edge of the rod-shaped body. As shown in FIG. 5, the rod-shaped or ring-shaped positioning jig has a generally rectangular cross section, but if ribs 3b are formed in the longitudinal direction, it can be reinforced by reducing the increase in weight, so that it is a long object. However, the deformation is reduced. The positioning jig is preferably excellent in dimensional stability against heating temperature, to request of high accuracy, as shown in FIG. 6, the thermal expansion of the core on both sides of the core 3 1 When the positioning jig is formed by using the laminated structure sandwiched by the separate materials 3 2 and 3 2 having the coefficient of thermal expansion that compensates for the coefficient, the temperature change can be extremely reduced.

【0003】[0003]

【作用】本願発明は積層材の拡大幅を有する内層用プリ
ント回路板のみの拡大幅部に位置合わせ用のガイド孔を
形成するので、プリプレグ樹脂のフローがガイドピンま
で到ることが少なくなり、従ってガイドピンを接着固定
することが少なくなる。仮に、プリプレグ樹脂のフロー
がガイドピンに至った場合でも、全体の重量が位置決め
治具が軽量化している重量だけ軽くなって、接着したガ
イドピンを取り外し解板するための移動作業の危険度が
軽減する。
According to the present invention, since the guide hole for alignment is formed in the enlarged width portion of only the inner layer printed circuit board having the enlarged width of the laminated material, the flow of the prepreg resin does not reach the guide pin. Therefore, the guide pin is less likely to be fixed by adhesion. Even if the flow of the prepreg resin reaches the guide pins, the overall weight is reduced by the weight of the positioning jig, and the risk of moving work to remove and remove the adhered guide pins is reduced. Reduce.

【0004】[0004]

【発明の効果】このように、この発明の多層プリント回
路基板の製造法は、軽量な位置決め治具を用いて層間位
置を高精度に保つことができると共に、プリプレグ樹脂
のフローによるガイドピンへの接着が少ないものとな
り、仮にガイドピンに接着した場合でも全体の重量が位
置決め治具が軽量化している重量だけ軽くなって、接着
したガイドピンを取り外し解板するための移動作業の危
険度が軽減すると云う効果がある。また、位置決め治具
を用いる以外は従来の鏡面板をそのまま使用するので、
大型のプレスでも成形が可能となり、量産性に優れると
云う効果もある。
As described above, according to the method for manufacturing a multilayer printed circuit board of the present invention, the position of the interlayer can be maintained with high accuracy by using a lightweight positioning jig, and at the same time, the guide pin is moved to the guide pin by the flow of the prepreg resin. Even if it is adhered to the guide pin, the total weight will be lightened by the weight of the positioning jig, which reduces the risk of moving work to remove the adhered guide pin and dismantle it. Then there is the effect. Also, since the conventional mirror surface plate is used as it is, except for using the positioning jig,
Molding is possible even with a large press, and it has the effect of being excellent in mass productivity.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例に係る六層プリント配線基板
の製造法の説明断面図である。
FIG. 1 is an explanatory cross-sectional view of a method for manufacturing a six-layer printed wiring board according to an embodiment of the present invention.

【図2】図1のII−II′断面図である。FIG. 2 is a sectional view taken along the line II-II ′ of FIG.

【図3】位置決め治具の配置図である。FIG. 3 is a layout view of a positioning jig.

【図4】位置決め治具の配置図である。FIG. 4 is a layout view of a positioning jig.

【図5】置決め治具の立体断面図である。FIG. 5 is a three-dimensional cross-sectional view of a placement jig.

【図6】位置決め治具の立体断面図である。FIG. 6 is a three-dimensional cross-sectional view of a positioning jig.

【図7】従来例を説明する六層プリント配線基板の製造
法説明図である。
FIG. 7 is an explanatory view of a method for manufacturing a six-layer printed wiring board for explaining a conventional example.

【図8】従来例における積層一体化物と下側金型とが接
着一体化した状態の説明図である。
FIG. 8 is an explanatory view of a state in which a laminated integrated product and a lower mold are bonded and integrated in a conventional example.

【符号の説明】[Explanation of symbols]

1,1′,11,11′…それぞれ熱盤。 2,2′,12,12′…それぞれクッション材。 3…位置決め治具。 3a…突出部。 3b…リブ。 4,14…それぞれガイドピン。 5,15…それぞれ鏡面板。 6a,16a…それぞれ下側の外層用片面銅張積層板。 6b,16b…それぞれ上側の外層用片面銅張積層板。 7,17……それぞれプリプレグ。 8a,18a,9a,19a……それぞれ内層用両面プ
リント回路板。 10……下側金型。 10′……上側金型。
1, 1 ', 11, 11' ... Hot plates respectively. 2, 2 ', 12, 12' ... Cushion materials, respectively. 3 ... Positioning jig. 3a ... Projection. 3b ... rib. 4, 14 ... Guide pins respectively. 5, 15 ... Each is a mirror plate. 6a, 16a ... Single-sided copper clad laminates for outer layers on the lower side respectively. 6b, 16b ... Single-sided copper clad laminates for outer layers on the upper side. 7, 17 ... Each is a prepreg. 8a, 18a, 9a, 19a ... Double-sided printed circuit boards for inner layers, respectively. 10 ... Lower mold. 10 '... Upper mold.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 B29L 31:34 B29L 31:34 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display location B29L 31:34 B29L 31:34

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 内層用プリント配線板2枚以上を、プリ
プレグを介し、導電箔または導電箔張積層板を少なくと
も1表面に配置して重ね合せ、鏡面板に挟んで熱盤間で
加熱加圧積層一体化する多層プリント回路用基板の製造
法において、鏡面板周辺の周囲四辺または対向二辺
に熱盤に対して垂直に立設されたガイドピンを有する位
置決め治具を配置し、内層用プリント配線板を鏡面板に
対して拡大幅に形成すると共に該拡大幅部に内層用プリ
ント配線板相互間の位置合せ用のガイド孔を形成して、
該ガイド孔に前記位置決め治具のガイドピンを挿通させ
て内層用プリント配線板相互の位置合せ状態を保ちつつ
全体を加熱加圧積層一体化することを特徴とする多層プ
リント回路用基板の製造法。
1. Two or more inner layer printed wiring boards are placed on at least one surface of a conductive foil or a conductive foil-clad laminate through a prepreg, and they are superposed, sandwiched between mirror surface plates, and heated and pressed between hot plates. in the production process of the substrate for a multilayer printed circuit integrally laminated, the positioning jig having a guide pin provided upright perpendicularly to the heating plate around four sides or opposite two sides <br/> near specular plate The inner layer printed wiring board is formed in an enlarged width with respect to the mirror surface plate, and a guide hole for aligning the inner layer printed wiring boards with each other is formed in the enlarged width portion.
A method for manufacturing a multilayer printed circuit board, characterized in that a guide pin of the positioning jig is inserted into the guide hole, and the entire printed wiring boards for inner layers are kept in alignment with each other and integrated by heating and pressing. .
JP2419308A 1990-12-26 1990-12-26 Method for manufacturing multilayer printed circuit board Expired - Lifetime JP2507238B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2419308A JP2507238B2 (en) 1990-12-26 1990-12-26 Method for manufacturing multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2419308A JP2507238B2 (en) 1990-12-26 1990-12-26 Method for manufacturing multilayer printed circuit board

Publications (2)

Publication Number Publication Date
JPH04225298A JPH04225298A (en) 1992-08-14
JP2507238B2 true JP2507238B2 (en) 1996-06-12

Family

ID=18526905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2419308A Expired - Lifetime JP2507238B2 (en) 1990-12-26 1990-12-26 Method for manufacturing multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JP2507238B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115715060B (en) * 2022-11-17 2023-06-16 深圳市海凌科达科技有限公司 HDI board manufacturing method for improving through blind hole matching precision

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63305594A (en) * 1987-06-05 1988-12-13 Sumitomo Bakelite Co Ltd Manufacture of multilayer printed circuit board

Also Published As

Publication number Publication date
JPH04225298A (en) 1992-08-14

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