JPS62144233A - Analog input device - Google Patents

Abstract

PURPOSE:To attain an offset correction in a short time and with highs accuracy without applying load on to a CPU by performing the offset correction after subtracting the offset value obtained when an input point is short-circuited from the input signal value. CONSTITUTION:A CPU controls a controller 5, turns on a switch Q3 with a signal T1 and connects an input part 2-1 to an analog processing part 4. At the same time, the controller 5 outputs a signal T10 to a driver 23 at the primary side and turns off a switch Q4 with a signal T11 together with a signal T12 and a switch Q5 turned on respectively. Then the input side of an amplifier 10 is short-circuited. The output value (e) of the amplifier 10 is turned into the offset value eoff at a time point when the switch Q5 is turned on. The value eoff is modulated by the ON/OFF of both switches Q1 and Q2 and outputted to sample holding circuits 16, 17, 20 and 21 via a buffer amplifier 15 to be held there.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] Input part to 1 full 41 etc./11 of 0 pieces of wood Z
)'? Select and input one signal from the I-log signals,
The present invention relates to an analog input device that converts this into a digital signal and outputs it.

[Technical Background of the Invention] FIG. 3 is a block diagram showing an example of a conventional input device of this type. Input signals (analog quantities) output from the plurality of sensors 1-1 to 1-n are input to input sections 2-1 to 2-n and undergo processing such as modulation. These input sections 2-1~
Among the modulated signals output from 2-n, multi-break 1
The modulation signal selected by step 3 is input to analog processing section 4. Analog processing section 4 samples the manually inputted modulation signal, converts it into a digital signal, and outputs it to CPU 6 via controller 5. In addition, 7 is an off-reno 1 of the analog input device - a reference voltage (○ holt) generator for correction; This is the human resources department. The modulation signal 9 of this input section 8 is also inputted to the analog processing section 4 via the input filter FJ3. In addition,
Input section 2-1~? -n, 8, multiplex l:J-3 and the operation timing of the analog processing section 4 are controlled by the controller 5.

FIG. 4 is a block diagram showing a detailed example of the input section 2-1 ((the input section of t!! is also the same) and the analog processing section 4 shown in FIG. A noise filter removes noise from the input signal, and 10 is an amplifier (gain; xlooo, X50) that amplifies the input signal to a set level.
018, etc.) Ql, Q2 are semiconductor switches for modulating the output signal of the amplifier 10, 11 is a semiconductor switch Q1,
This is a pulse transformer that extracts the modulated signal output from Q2 to the outside, and is used for insulating analog signals. Q3 is a cliff conductor switch that constitutes a multiplexer.
Select the signal g from the input section 2-1 and input it to the analog [1
There is an input C. , 12 is a pulse transformer, 1
The control signal T2 input from the controller 5 via the next driver 13 is output to the control signal generation circuit 14, and the control signal generation circuit 14 generates a control signal g in response to the control signal T2.
Output T3.1-4 to semiconductor switch: f-01°Q2. Reference numeral 15 denotes a buffer amplifier that outputs the modulated signal output from the input section 2-1 to sample and hold circuits 16 and 17. 16.17 is the output from the buffer amplifier 15 (
eo) and holds the control signal T5.eo from the controller 5. The above operation is performed at T6. 18 is a sample hold circuit 16
．． This is a summing amplifier that adds the outputs of 17 and outputs the result to an analog-to-digital converter 19, and 19 is an analog-to-digital converter that converts the output result of the summing amplifier into a digital signal.

Next, the operation of the conventional analog input device shown in FIGS. 3 and 4 will be explained with reference to the operation timing chart of FIG. 5. First, the CPU 6 outputs the address signal shown in FIG. 5(A) to the controller 1 to the roller 5, and the sensor 1
-1 to the controller 5 to input the input signal from the input unit 2-1 to the input section 2-1. In response to this, the controller 5 turns on the control signals Ti and T2 at the timings shown in FIGS. 5(B) and 5(C). As a result, the semiconductor switch Q3 is turned on, and the input section 2-1 is connected to the analog processing section 4, and at the same time, the control 1@Q T
2 is input to the drive signal generation circuit 14 via the primary side driver 13 and pulse transformer 12.

As a result, the drive signal generation circuit 14 operates as shown in FIG.
), (generates control signals T3 and T4 at the timing indicated by IN, and controls the semiconductor switches Q1 and Q2 with these control signals!
``Turn on and off in synchronization with iT3.T4.

As a result, the output signal e of the amplifier 10 shown in FIG. 5 <1> is modulated as shown in FIG.

Buffer amplification through: 15 to 15 manual inputs. Next, controllers 1 to 5 receive a single control signal T5. T6 is shown in Figure 5 (F
) and (G) are turned on to prevent the sample and hold circuits 16 and 17 from operating. As a result, the sample hold circuit 16 samples and holds the high level value (1/?·eo) of the modulation signal shown in FIG. 5(J), and the sample hold circuit 17 samples and holds the low level value (= -1/2・eo) Cover the sample hold.

Therefore, the output signal of the number hold circuit 16 is the fifth
As shown in figure (K), the sample hold circuit 17
The output value is as shown in FIG. 5(L). The sample-and-hold values of these sample-and-hold circuits 16 and 17 are added in a summing amplifier 18, and the result is a unidirectional voltage e with O volts as a reference, as shown in FIG. 5(M). bawl.

Next, the controller 1-roller 5 outputs the control signal T7 to the analog-to-digital converter 19 at the timing shown in FIG.
At this timing, the operation of converting the output value of 8 into a digital signal is started. After this conversion is completed, the control signal T5. T
6 is turned on, and the sample and hold circuits 16 and 17 are in the sample state.

[Problems with Ondo Technique] By the way, in a conventional analog input device having the above-described configuration and operation, the offsets 1 to 1 are corrected as follows. First, select the human power section 8 to which the 0 volt signal output from the reference voltage generator 7 is input to the multiplexer 3, and send the signal to this O small 1! ~
C as a value via the analog processing unit 4 and controller 5.
Import into PU6. Next, the CPU 6 controls each sensor 1-1 to
Offset correction is performed by performing software processing to subtract the offset value from the input value input from 1-n. For this reason, the amplitude and pole = t/I of the offset value differ depending on the amplifiers 10 installed in the input sections 2-1 to 2-n and 8, which deteriorates the accuracy of offset correction and Do not use an amplifier 10 with a high auto-set stability (it will be costly as it will have to be pulled).
It had the disadvantage of making two enemies. Further, since the offset correction is performed by software in the CPU 6, there is a drawback that the offset correction takes time and the load on the CPU increases. .

[Object of the Invention] An object of the present invention is to overcome the above drawbacks and provide an analog input device that can perform highly accurate offset correction in a short period of time without imposing a load on the CPU and at low cost. There is a particular thing.

[Summary of the Invention] The present invention, when inputting a signal from a necessary input point, temporarily disconnects the input signal and sets the human power point to the show 1~ state, and holds the offlet value j7 by 1 number,
After that, input the input signal, sample and hold the input signal, subtract the held offset value 1 to offset value from this held input 1 word value, and perform correction to offset correction 1. Highly accurate offset correction ), it is possible to achieve the purpose of performing the process at low cost and without imposing a load on the CPU.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings, in which the same parts as those of the conventional example are denoted by the same reference numerals. FIG. 1 is a block diagram showing an embodiment of an analog input device of the present invention. 1
-1 is a sensor that outputs an analog signal; 2-1 is an input section; 4 is an analog processing section; 5 is a controller that controls the operation timing of the input section 2-1 and the analog processing section 4; 10 is an amplifier that amplifies the human input signal to a predetermined level; 11.12.224 is a pulse transformer for insulation; 13 is a control signal T1 from the controller 5 which is inputted to the A primary side driver 14 outputs a control signal T3. to the primary side of the pulse 1 to lance 12. A control signal generation circuit 15 generates T4, and sample and hold circuits 16 and 17 amplify the modulation signal input from the input section 2-1.
．． Buffer amplifier outputting to 20.21, 16.17.
20.21 is the output of the buffer amplifier and the control signals QT5, T6 and 8.21 output from the controller 5. A sample and hold circuit 18 holds the sample and hold circuit 16. 17, 20. An add/stop amplifier 19 adds the hold value of 21, and 19 converts the output from the tempered amplifier 18 to
A blog digital converter converts the control signal T7 into a digital signal at the timing when it is input, and 23 is a control signal output from the controller 1 to the roller 5 by hand and converts it into a pulse transformer. 22 is a primary side driver outputting to the primary side of pulse transformer 22, and 24 is a control 11 signal generating circuit Ql that generates control signals T11 and ``12'' based on a signal input from the secondary side of pulse transformer 22.

Q. is the output e outputted by the amplifier 10 as the control signal T3.

A semiconductor switch element Q3, which modulates the output signal based on the output voltage, is a semiconductor switch constituting a multiplexer that selects the output signal of the input section 2-1, and is turned on and off by a control signal T1 given from the controller 5. Q4 and Q5 are
A semiconductor switching element that disconnects the sensor 1-1 side by control signals T11 and T12 and then shorts the input side of the amplifier 10 when inputting an input signal from the input section 2-1 to perform offset correction of the device. It is. The sensor and input section of this Asa[:1] input device are shown in Figure 3 (7).
(Is there a plurality of them as in the case of 'l'S formation? For example, in the example shown in Fig. 1, there are 1 tl. figure(
Cl)U (not shown) outputs the address 1) shown in A) to the controller 1-roller 5, and inputs the output signal of the input section 2-1 to input the output signal of the sensor 1-1. An instruction is sent to select J signal and manually input analog signal 4. As a result, the roller 5 to the second cylinder 1 receives the control signal T1 at the timing shown in FIG. 5(B)! The t-conductor switch element Q3 is turned on, and the input section 2-1 is connected to the analog processing section 4. At the same time, the controller 5 outputs a control signal @T10 to the primary driver 23 at the timing shown in FIG. 2(C).

The primary side driver 23 outputs this control signal qlO to the control signal generation circuit 24 via the pulse transformer 22.

Therefore, the control signal generation circuit 22 turns off the control signal T11 to turn off the semiconductor switch element Q4 at the timing shown in FIG. ;Prevent input to 10. On the other hand, the control signal generation circuit 24 generates the control signal T1
At the same time as 1 turns off, < i, as shown in Fig. 2 ([),
The control signal 8T12 is turned on, the semiconductor switching element Q5 is turned on, and the input side of the amplifier 10 is short-circuited. Further, simultaneously with the control signal, the controller 5 outputs a control signal T2 to the primary driver 13, as shown in FIG. 2(0). Therefore, the primary side driver 13 uses this control signal T2.
is output to the control signal generation circuit 14 via the pulse transformer 12.

As a result, the control signal generation circuit 14 turns off the control signal T3 and turns on the semiconductor switch element Q1 as shown in FIG. 2(G), and then sends the control signal T4 as shown in FIG. 2()-1). is turned on to turn on the semiconductor switching element Q2. By the way, the output value e of the amplifier 10 is the second
As shown in the figure (N>), the offset value e.tt is generated at the timing when the semiconductor switch element Q5 is turned on. is input to the buffer amplifier 15 via the semiconductor switch element Q3, and a modulated signal as shown by C in FIG. turns on the control signal T8 at the timing shown in FIG. 2(K) and puts the sample hold circuit 20 in the hold state.Therefore, this lean pull hold circuit 20 operates as shown in FIG. 2(0). The value of /2・eoff is held.Next, the controller 5
At the timing shown in , the control signal @T is turned on, and the sample and hold circuit 21 is placed in the hold state. Therefore, the sample hold circuit 21 holds the value of 11/2·eoff shown in FIG. 2(0). Next, when the control signal TIO output from the controller 5 is turned off at the timing shown in FIG. 2(C), the control signal generating circuit 24 generates the control signal "12" at the timing shown in FIG. 2(F). is turned off, and the control signal T11 is turned on as shown in FIG. input signal e
i is input to amplifier 10. Therefore, the output of the amplifier 10 becomes e again as shown in FIG. 2 (N). Next, the controller 5 turns on the control signal T2 again as shown in FIG.
4, the control signal T3 is turned on again as shown in FIG. 2(G), and then the control signal @T4 is turned on again as shown in FIG. 2(H). In this case, semiconductor switch element Q1
．． 02 or control signal T3. It turns on in synchronization with the off state of -1-4 and modulates the output signal e of the amplifier 10. This modulation signal (Yubal transformer 11, semiconductor switch element Q3
The output of the buffer amplifier 15 is 1/2 as shown in Figure 2 (0)-2.
2・eo to −172・e.

It fluctuates. At this time, the controller 5 turns on the control signal T5, as shown in FIG. 2 (J), and puts the sample and hold circuit 16 into a hold state.

Therefore, the sample hold circuit 16 holds the value of 1/2·eo shown in FIG. 2 (0). Next, con l-
The roller 5 turns on the control signal @T6 at the timing shown in FIG. Therefore, the 1 number hold circuit 17 is -1/2-e in FIG. 2(0).

Hold the value. Therefore, sample hold circuit 2
0 output is as shown in Figure 2 (R>), the output of the sample hold circuit 21 is as shown in Figure 2 (P), and the output of the length pull hold circuit 16 is as shown in Figure 2 (Q). As shown, the output of the lean pull hold circuit 17 becomes as shown in FIG. 2 (S).At the same time, the output of the sample hold circuit 16. The output of the circuit 17.21 is input to the positive input terminal of the add amplifier 18. Therefore, the output of the add amplifier 18 becomes as shown in FIG. 5(T). That is, the output of the add amplifier 18 is The offset value e.ff is obtained during the period A in FIG. The signal is (eo-
eoff), which is the value without offset correction. Next, the controller 5 transmits the control signal T7 to the ablog digital converter FA 1 at the timing shown in FIG. 5(M).
9 and perform the above (e.

-e. ff) starts digital conversion of the input analog signal. This conversion completed number hold circuit 16,
17.20.21 will be in a rimple state.

According to this embodiment, offset correction is performed in hardware at each input section (same for each input point) by once disconnecting the input signal from the sensor within the input period and short-circuiting the input section. The load on the CPU can be reduced, and offset correction can be performed in a short time and with high precision. Therefore, A offset 1 ~ r for correction; Li
Since the voltage generator and the input section can be omitted and adjustment of the amplifier 10 can be made unnecessary, the amplifier 310
As a result, it is possible to use off-cuts with poor stability, and the manufacturing cost of the device can be reduced.

[Effects of the Invention] As described above, according to the analog input device of the present invention, when inputting a signal from an input point, the input signal can be disconnected for one day to short-circuit the input point. To turn off the IJ, hold the value by f numbers, then input the input signal, reduce the value by 1 number, and subtract the held offset value from this held input signal value to obtain the offset. By making corrections, 8g
This has the effect of performing the offset correction of i in a short time without imposing a load on the CPU and at low cost17.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the analog input device of the present invention, FIG. 2 is an operation timing flowchart of FIG. 1, and FIG. 3 is a block diagram showing an example of a schematic configuration of a conventional analog input device. , FIG. 4 is a block diagram showing a detailed example of the input section and analog processing section shown in FIG. 3, and FIG. 5 is an operation timing chart of the circuit shown in FIG. 4. 1-1... Hinry" 2-1... Input section 4.
...Analog processing section 5...Controller 10...
・Amplifiers 11, 12.22...Pulse transformers 13, 23...
・Primary side driver 1/I, 24...Control signal generation circuit 1! )... Buffer amplifier 16, 17.20.21... Sample hold circuit 18... Shaping amplifier

Claims (1)

[Claims] An analog input device comprising a modulating means for modulating an analog signal input from a sensor, a sample hold means for sampling and holding the modulated signal, and an arithmetic means for adding and subtracting a hold value. a switch means for disconnecting from the modulation means and short-circuiting the input end of the modulation means; and after sampling and holding an offset value obtained when the input end is short-circuited, the signal value inputted from the sensor by opening the input end; 1. An analog input device comprising: control means for performing control to sample and hold a signal, and subtract the hold offset value from the hold input signal value.