JPS62141699A - 半導体メモリ装置の検査方法 - Google Patents
半導体メモリ装置の検査方法Info
- Publication number
- JPS62141699A JPS62141699A JP60283321A JP28332185A JPS62141699A JP S62141699 A JPS62141699 A JP S62141699A JP 60283321 A JP60283321 A JP 60283321A JP 28332185 A JP28332185 A JP 28332185A JP S62141699 A JPS62141699 A JP S62141699A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor memory
- memory device
- data
- current
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Semiconductor Memories (AREA)
- Tests Of Electronic Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60283321A JPS62141699A (ja) | 1985-12-16 | 1985-12-16 | 半導体メモリ装置の検査方法 |
| US06/941,626 US4820974A (en) | 1985-12-16 | 1986-12-11 | Method for measuring a characteristic of semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60283321A JPS62141699A (ja) | 1985-12-16 | 1985-12-16 | 半導体メモリ装置の検査方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62141699A true JPS62141699A (ja) | 1987-06-25 |
| JPH0427640B2 JPH0427640B2 (https=) | 1992-05-12 |
Family
ID=17663950
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60283321A Granted JPS62141699A (ja) | 1985-12-16 | 1985-12-16 | 半導体メモリ装置の検査方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4820974A (https=) |
| JP (1) | JPS62141699A (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4985672A (en) * | 1989-12-11 | 1991-01-15 | Advantest Corporation | Test equipment for a low current IC |
| US5321354A (en) * | 1990-07-23 | 1994-06-14 | Seiko Epson Corporation | Method for inspecting semiconductor devices |
| US5097206A (en) * | 1990-10-05 | 1992-03-17 | Hewlett-Packard Company | Built-in test circuit for static CMOS circuits |
| US5289475A (en) * | 1990-11-29 | 1994-02-22 | Sgs-Thomson Microelectronics, Inc. | Semiconductor memory with inverted write-back capability and method of testing a memory using inverted write-back |
| US5132615A (en) * | 1990-12-19 | 1992-07-21 | Honeywell Bull Inc. | Detecting presence of N+ diffusion faults in a micropackage containing a plurality of integrated circuits by analyzing Vref current |
| US5325054A (en) * | 1992-07-07 | 1994-06-28 | Texas Instruments Incorporated | Method and system for screening reliability of semiconductor circuits |
| US5483170A (en) * | 1993-08-24 | 1996-01-09 | New Mexico State University Technology Transfer Corp. | Integrated circuit fault testing implementing voltage supply rail pulsing and corresponding instantaneous current response analysis |
| US5731700A (en) * | 1994-03-14 | 1998-03-24 | Lsi Logic Corporation | Quiescent power supply current test method and apparatus for integrated circuits |
| US5687382A (en) * | 1995-06-07 | 1997-11-11 | Hitachi America, Ltd. | High speed, reduced power memory system implemented according to access frequency |
| US6175244B1 (en) | 1997-04-25 | 2001-01-16 | Carnegie Mellon University | Current signatures for IDDQ testing |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3576982A (en) * | 1968-12-16 | 1971-05-04 | Ibm | Error tolerant read-only storage system |
| US4045779A (en) * | 1976-03-15 | 1977-08-30 | Xerox Corporation | Self-correcting memory circuit |
| US4271519A (en) * | 1979-07-26 | 1981-06-02 | Storage Technology Corporation | Address mark generation and decoding method |
| JPS5853775A (ja) * | 1981-09-26 | 1983-03-30 | Fujitsu Ltd | Icメモリ試験方法 |
| US4637020A (en) * | 1983-08-01 | 1987-01-13 | Fairchild Semiconductor Corporation | Method and apparatus for monitoring automated testing of electronic circuits |
| US4686456A (en) * | 1985-06-18 | 1987-08-11 | Kabushiki Kaisha Toshiba | Memory test circuit |
-
1985
- 1985-12-16 JP JP60283321A patent/JPS62141699A/ja active Granted
-
1986
- 1986-12-11 US US06/941,626 patent/US4820974A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4820974A (en) | 1989-04-11 |
| JPH0427640B2 (https=) | 1992-05-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |