JPS62141219U - - Google Patents
Info
- Publication number
- JPS62141219U JPS62141219U JP2786786U JP2786786U JPS62141219U JP S62141219 U JPS62141219 U JP S62141219U JP 2786786 U JP2786786 U JP 2786786U JP 2786786 U JP2786786 U JP 2786786U JP S62141219 U JPS62141219 U JP S62141219U
- Authority
- JP
- Japan
- Prior art keywords
- pulse signal
- signal
- reference pulse
- circuit
- threshold voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012935 Averaging Methods 0.000 claims description 2
- 238000007493 shaping process Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Description
第１図は本考案による波形整形回路の第１実施
例を示すブロツク図、第２図は本考案の第２実施
例を示すブロツク図、第３図は本考案の変形例を
示すブロツク図、第４図及び第５図は従来回路を
示すブロツク図である。
１１……比較回路、１２，１８……インバータ
回路、１３，１９……平均化回路、１６……制御
回路、１７……基準パルス発生回路、３０……Ｈ
レベル電圧発生器、３１……Ｌレベル電圧発生器
、３２，３３……スイツチ回路。
FIG. 1 is a block diagram showing a first embodiment of a waveform shaping circuit according to the present invention, FIG. 2 is a block diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing a modification of the present invention. FIGS. 4 and 5 are block diagrams showing conventional circuits. 11...Comparison circuit, 12, 18...Inverter circuit, 13, 19...Averaging circuit, 16...Control circuit, 17...Reference pulse generation circuit, 30...H
Level voltage generator, 31... L level voltage generator, 32, 33... switch circuit.
Claims (1)
信号を出力端に送出する比較回路と、 上記パルス信号に求められるデユーテイ比を有
する基準パルス信号を発生する基準パルス発生回
路と、 上記パルス信号と上記基準パルス信号の論理レ
ベルを一致させる論理レベル補償回路と、 論理レベルが補償された上記パルス信号及び上
記基準パルス信号の平均値に相当する直流レベル
信号をそれぞれ得る第１及び第２の平均化回路と
、 上記各直流レベル信号間の偏差に応じて上記閾
値電圧信号を制御する制御回路と を具えてなることを特徴とする波形整形回路。[Claims for Utility Model Registration] A comparison circuit that compares an AC input signal with a threshold voltage signal and sends a pulse signal to an output terminal, and a reference pulse generator that generates a reference pulse signal having a duty ratio required for the pulse signal. a logic level compensation circuit for matching the logic levels of the pulse signal and the reference pulse signal; and a logic level compensation circuit for obtaining a DC level signal corresponding to an average value of the pulse signal and the reference pulse signal whose logic levels have been compensated, respectively. 1. A waveform shaping circuit comprising: first and second averaging circuits; and a control circuit that controls the threshold voltage signal according to the deviation between the DC level signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2786786U JPH0430817Y2 (en) | 1986-02-27 | 1986-02-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2786786U JPH0430817Y2 (en) | 1986-02-27 | 1986-02-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62141219U true JPS62141219U (en) | 1987-09-05 |
| JPH0430817Y2 JPH0430817Y2 (en) | 1992-07-24 |
Family
ID=30830299
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2786786U Expired JPH0430817Y2 (en) | 1986-02-27 | 1986-02-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0430817Y2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012510238A (en) * | 2008-11-25 | 2012-04-26 | クゥアルコム・インコーポレイテッド | Duty cycle adjustment for local oscillator signals |
| US8847638B2 (en) | 2009-07-02 | 2014-09-30 | Qualcomm Incorporated | High speed divide-by-two circuit |
| US8854098B2 (en) | 2011-01-21 | 2014-10-07 | Qualcomm Incorporated | System for I-Q phase mismatch detection and correction |
| US8970272B2 (en) | 2008-05-15 | 2015-03-03 | Qualcomm Incorporated | High-speed low-power latches |
| US9154077B2 (en) | 2012-04-12 | 2015-10-06 | Qualcomm Incorporated | Compact high frequency divider |
-
1986
- 1986-02-27 JP JP2786786U patent/JPH0430817Y2/ja not_active Expired
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8970272B2 (en) | 2008-05-15 | 2015-03-03 | Qualcomm Incorporated | High-speed low-power latches |
| JP2012510238A (en) * | 2008-11-25 | 2012-04-26 | クゥアルコム・インコーポレイテッド | Duty cycle adjustment for local oscillator signals |
| US8847638B2 (en) | 2009-07-02 | 2014-09-30 | Qualcomm Incorporated | High speed divide-by-two circuit |
| US8854098B2 (en) | 2011-01-21 | 2014-10-07 | Qualcomm Incorporated | System for I-Q phase mismatch detection and correction |
| US9154077B2 (en) | 2012-04-12 | 2015-10-06 | Qualcomm Incorporated | Compact high frequency divider |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0430817Y2 (en) | 1992-07-24 |
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