JPS62139320A - Selective solid phase diffusing method for compound semiconductor - Google Patents

Abstract

PURPOSE:To perform a selective solid-phase diffusion at low temperature by a method wherein a diffusion preventing mask, having the thermal expansion coefficient approximate to that of GaAs, is provided on the GaAs, doped SiO2 is superposed thereon, and impurities are diffused from the window of the mask by performing a heat treatment. CONSTITUTION:When a diffusion mask 14 is formed using the mixture of Al2O3/SiO of 79/21-62/38 in volume ratio, Al2O3/AlN of 48/52, and Al2O3/Si3N4 of 71/29-50/50, the thermal expansion coefficient of said mask 14 is made approximate to that of GaAs, and the thermal stress to n-GaAs 11 can be alleviated substantially. Then, a sputtering is performed using a target whereon the mol concentration of ZnO is selected for SiO, and a Zn-doped SiO2 film 15 of desired density is deposited. Subsequently, an SiO2 cap 34 is superposed, a heat treatment is performed in N2 at 600 deg.C or thereabout, and a p-layer 17 is formed by performing a solid phase diffusion from a window 13. According to this constitution, the generation of defects on the surface of the substrate 11 can be prevented, films can be formed at a low temperature, because the deposition of the mask 14, the Zn-doped SiO2 15 and a cap 16 is accomplished by performing a sputtering, and the effect of heat the GaAs substrate can be suppressed substantially.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a method for selectively solidly diffusing p-type or n-type impurities into a compound semiconductor such as a ■-■ group compound semiconductor.

[Prior art]

As methods for selectively diffusing impurities into compound semiconductors such as (2)-V group compound semiconductors, gas phase diffusion and solid phase diffusion have been conventionally known.

That is, in the vapor phase diffusion method, first, as shown in FIG. 6, a GaAs substrate 3 on which a diffusion mask 2 made of SiO2 having a diffusion window 1 on its main surface is formed is prepared.

Subsequently, the substrate 3 is placed in an ampoule 4 as shown in FIG.
At the same time, a diffusion source 5 of ZnAs2, Zn3As2, etc. is installed in the ampoule 4, and after vacuum-sealing the ampoule 4, it is loaded into a diffusion furnace (not shown), and the ampoule 4 is
In this method, the diffusion source is vaporized by heating from the outside, and Zn or the like is selectively diffused onto the surface of the GaAs substrate 3 exposed through the diffusion window of the diffusion mask.

In the solid phase diffusion method, first a diffusion window 1 is placed on the main surface as shown in Figure 8.
G on which a diffusion mask 2 made of SiO2 is formed.
An aAs substrate 3 is prepared, and Zn-doped S, for example, is deposited on the entire surface of the diffusion mask 2 including the diffusion window 1 by plasma CVD.
An iO2 film 6 and a SiO2 cap 7 are deposited. Next, as shown in FIG. 9, this base number 3 is
A heater 9 placed outside the quartz glass tube 8 while supplying N2 and N2 gas into the quartz glass tube 8.
is heated to diffuse Zn in the Zn-doped SiO2 film 6 into the substrate 3 through the diffusion window 1 of the mask 2.

[Problem that the invention seeks to solve]

However, the above-mentioned vapor phase diffusion method requires vacuum sealing to ensure accurate weighing of the diffusion source and accurate ampoule volume, making the operation extremely complicated. In addition, since the surface of the GaAs substrate exposed through the diffusion window of the diffusion mask is in contact with the atmosphere, the surface layer may decompose in the vapor phase, and reactants from the vapor phase may accumulate on the surface, causing surface irregularities and contamination. Many problems arise when the virus spreads, such as severe damage.

On the other hand, in the solid phase diffusion method, the diffusion temperature is 10
It can be carried out at a low temperature of about 0 to 150°C, and there is no need to weigh the diffusion source or vacuum seal it, so it has advantages such as easy diffusion operation.

However, in this method, since Zn-doped SiO21i as a diffusion source is deposited by plasma CVD, it is necessary to use a gas source, which causes contamination of the chamber of the device, and requires a dedicated device for forming a specific impurity-doped SiO2 film. Furthermore, in order to obtain a high-quality film, it is necessary to form the film at a high temperature (usually 300° C. or higher), which poses a problem in that device characteristics are likely to deteriorate. In addition, in the case of solid-phase diffusivity, it is necessary to deposit a diffusion mask and a Zn-doped SiO2 film as a diffusion source on the GaAs substrate, and the thermal expansion coefficient of the SiO2 film is one order of magnitude smaller than that of the GaAs substrate. Compared to the vapor phase diffusion method,
Thermal stress on Z is large and distortion is likely to occur on the substrate surface. However, when a diffusion mask is formed by the plasma CVD method, the film composition is not SiO2 but a 5i-0-H-N system that incorporates hydrogen, nitrogen, etc., so the 5i-0-
There is a problem in that gas is released from the H--N diffusion mask, and the gas roughens the interface between the diffusion mask and the radix. Note that after forming a 5i-0-H-N film by plasma CVD, it is possible to form a SiO2 film by heat-treating and releasing gases such as N2 and N2.
Since such heat treatment involves a high temperature of 600'C or more, a problem arises in that the thermal effect on the substrate becomes large. As the diffusion mask material, plasma C was used instead of the SiO2.
Although Si3N4, which has a high impurity diffusion inhibiting effect, is used in the VD method, it has the problem that it is harder than SiO2 and is more likely to crack due to thermal shock.

The present invention has been made to solve two drawbacks: it can easily form a diffusion mask with a thermal expansion coefficient similar to that of a compound semiconductor, and it can be doped with n-type or n-type impurities with good controllability. The present invention aims to provide a selective solid-phase diffusion method that can easily form a silicon oxide film and can diffuse impurities into a compound semiconductor using a low-temperature process.

[Means and effects for solving the problems] The present invention provides a wave film made of a material having a coefficient of thermal expansion similar to that of the semiconductor and having a property of inhibiting the diffusion of impurities, by sputtering on the surface of a compound semiconductor. a step of depositing, a step of selectively etching and removing a predetermined portion of the wave film to form a diffusion mask having a diffusion window, and a step of sputtering an n-type or n-type impurity onto the diffusion mask including the diffusion window. a step of depositing a doped silicon oxide film; and a step of performing heat treatment to selectively solid-phase diffuse impurities into the semiconductor through a diffusion window of the diffusion mask using the impurity-doped silicon oxide film as a diffusion source. It is characterized by the fact that According to the present invention, since a wave film serving as a diffusion mask is deposited by sputtering, by using a target having a composition similar to the coefficient of thermal expansion of a compound semiconductor, a film having the same composition can be easily and reproducibly formed. As a result, by forming a diffusion mask by etching the film, it is possible to significantly suppress the generation of thermal stress on the semiconductor from the diffusion mask during solid phase diffusion, and it is possible to improve the device characteristics. In addition, since the n-type or n-type impurity-doped silicon oxide film is deposited by sputtering, it is possible to form a silicon oxide film doped with impurities with good controllability on the product, and this impurity-doped silicon oxide film can be used as a diffusion source. By doing so, it is possible to form a diffusion layer with a predetermined concentration in the compound semiconductor, and further, since it is possible to form a silicon oxide film at a low temperature, impurities can be diffused into the compound semiconductor by a low temperature process.

Examples of the bipedal compound semiconductor include GaAs, InP, etc., which are ■-V group compound semiconductors.

For example, when GaAs is used as the compound semiconductor, AJ! 203 and SiO
A, a mixture with a ratio of l'203 /SiO2 of 79/21 to 62/38 by volume, Al2O3/S
With the composition of iO203 and Al2O3/SiON, cut A,
f? 203/A, 17+'J(7) mixture with a volume ratio of 48152 to 10/90, Al2O3/Si
With the composition of O2o3 and Si3N4, and AI! 203
/Si3N4 ratio is 71/29 to 50150 by volume
Examples include mixtures of the following. In addition, when the compound semiconductor is InP, the same material may be Al2O3/
With the composition of SiO203 and SiO2, AI! 203/Si
A mixture with an O2 ratio of 66/34 to 47153 by volume, A, l? 203 and Si3N4, and Al10
The ratio of 3/S f3 N4 is 45155 to 28 in volume proportion
/72 mixtures, etc. can be mentioned. By forming the diffusion mask with such materials, the thermal expansion coefficient of the mask is less than 10% of that of GaAs or InP. Thermal stress on the semiconductor can be sufficiently alleviated.

2. Examples of p-type impurities include Zn and Mg.

For example, Te may be used as an n-type impurity such as Cd.

Examples include Se.

-1- When depositing an impurity-doped silicon oxide film, for example, a Zn-doped silicon oxide film which is an n-type impurity, by sputtering, it is possible to easily form a diffusion layer with a predetermined concentration by changing the composition ratio of the target used for sputtering. Can be formed on the surface. Specifically, in the case of low concentration diffusion (surface concentration; pl 0" to 10" cIll-3), the molar concentration ratio of ZnO to SiO2 is 1 to 80.
% target and in the case of 1':1 concentration diffusion (surface concentration: p 1Q191:111' or later), Si
A target having a molar concentration ratio of ZnO to O2 of 80 to 99% may be used. In addition, the thickness of the n-type or silicon oxide film doped with n-type impurities is 200 mm from the viewpoint of forming a uniform film and preventing cracks during solid phase diffusion.
It is desirable that the number be in the range of ~2,000 people.

When performing solid-phase diffusion using the n-type or n-type impurity-doped silicon oxide film as a diffusion source, SiO2 is deposited on the silicon oxide film to prevent impurities from escaping to the outside atmosphere by sputtering. It is desirable to perform the heat treatment while the cap is deposited.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

Example 1 First, a GaAs substrate 11 (n”=IX1018C,
-3) Af203-5i○ with a thickness of 600 people was applied to -1 by RF sputtering using a target consisting of a mixture of Ar203/S i 02 with a volume ratio of 70/30.
After depositing the 2-mixed film 12, 200 ~
The distortion of the corrugated film 12 was removed by annealing at 400° C. for 2H (as shown in FIG. 1(a)). Subsequently, the corrugated film 12 was patterned using a photoetching technique to form a diffusion mask 14 having stripe-shaped diffusion windows 13 with a width of 1 μm (as shown in FIG. 4B).

Then, after removing the photoresist, ZnO/S
i R using a target with an O2 molar ratio of 90/10
Zn-doped S with a thickness of 500 mm by F sputtering
An iO2 film 15 was deposited on a diffusion mask 14 including a diffusion window 13, and then a cap 16 made of SiO2 with a thickness of 500 nm was continuously formed by sputtering (
Figure (c) shown). After this, 550°C in N2 atmosphere
, 1 hour of heat treatment, and the diffusion window 13 of the diffusion mask 14
Zn was diffused onto the surface of the substrate 11 from the Zn-doped SiO2 film 15 as a diffusion source in contact with the n-type GaAs substrate 11 through the substrate 11 to selectively form a p-type diffusion layer 17 (FIG. 1(d)).
(Illustrated).

After the diffusion, the substrate is opened on both sides and etched to reduce the diffusion depth (d) and the lateral diffusion length (w) of the diffusion layer 17.
) was measured and found to be 0.7 μm. Also,
When the diffusion depth was measured by changing the diffusion temperature, the characteristic diagram shown in FIG. 2 was obtained. Note that A in FIG. 2 is a characteristic line showing the relationship between diffusion temperature and diffusion depth according to the present invention, and B is a characteristic line according to the conventional vapor phase diffusion method. As is clear from FIG. 2, in the solid phase diffusion method of the present invention, a diffusion layer with a diffusion depth of, for example, 1 μm can be formed by heat treatment at 550°C for about 1 hour, whereas in the vapor phase diffusion method, a diffusion layer with a diffusion depth of 1 μm can be formed. It can be seen that the temperature of the diffusion layer can be reduced by about 100°C by requiring a heat treatment temperature of 650 to 700°C for about 1 hour. Moreover, when the surface condition of the GaAsjJ plate 11 was examined after removing the cap 16 and the Zn-doped 5102 film 15, it was found that the surface condition was good and the front surface of the diffusion layer was smooth.

Moreover, 1 diffusion mask 14 is A, 71'2o3 and SiO2
It consists of a mixed wave film formed by Tarkent sputtering, and the thermal expansion coefficient of Af203 is 8', 0X.
The same coefficient of IO-6/'C1SiO2 is 5.0X10-7
/'C, and its mixed composition is Al2O3/SiOA0
Since the volume ratio of 3/S i Q 2 is 70/30, is it normal for GaAs to be used as the binding plate 11? It approximates the coefficient of thermal expansion near EA (5,8×10-''/'C).

As a result, it is possible to suppress the generation of thermal stress on the substrate 11 due to the difference in thermal expansion coefficient between the diffusion mask 14 and the substrate 11 during the heat treatment for diffusion, etc., and it is possible to prevent the generation of defects on the surface of the substrate 11.

Furthermore, AJ 203 for forming the diffusion mask 14
Deposition of Si02 mixed wave film 12, Zn doped Si
Since the O□ film 15 and cap 16 are deposited by sputtering, it is possible to form the film at a low temperature.
The thermal influence on the substrate 11 can be effectively suppressed.

Example 2 A, &zO:+/SiO on the n-type InP substrate 21
A thickness of 600 nm was obtained by RF sputtering using a target consisting of a volume ratio of 2 or a 54/46 mixture.
After depositing the 203 S i 02 mixed membrane 22, the N
The distortion of the wave film 22 was removed by annealing in a 15L IEE at 200 to 400°C in a 2 atmosphere (see Fig. 3).
, a) As shown). Subsequently, the corrugated film 22 was patterned using a first etching technique to form a diffusion mask 24 having stripe-shaped diffusion windows 23 with a width of 1 μm (as shown in FIG. 2B).

Then, after removing the photoresist pattern, ZnO
A Znn Dorbut SiO film 25 with a thickness of 500 nm is deposited on the diffusion mask 24 including the diffusion window 23 by RF sputtering using a target with a molar ratio of /SiO2 of 10/90, followed by a Znn drbut SiO film 25 with a thickness of 500 nm by sputtering. 26 camps were formed in succession consisting of (
Figure (c) shown). After this, 550℃ in N2 atmosphere,
Heat treatment is performed for one hour, and Zn as a diffusion source contacts the n-type 1nP substrate 21 through the diffusion window 23 of the diffusion mask 24.
Zn was diffused from the doped SiO2 film 25 onto the surface of the substrate 21 to selectively form a p-type diffusion layer 27 (as shown in FIG. 2(d)).

After the diffusion, the substrate was folded and stainless steel etched, and the diffusion depth and lateral diffusion length of the diffusion layer 27 were measured and found to be 4.5 μm.

Furthermore, when the surface condition of the InP substrate 21 was examined after removing the cap 26 and the Zn-doped SiO2 film 25, it was found that
It had good specularity and the front surface of the diffusion layer was smooth.

In contrast, the diffusion mask 24 consists of a mixed wave film formed by sputtering a target consisting of AJ2O3 and SiO2, and the thermal expansion coefficient of Al2O3/SiO203 is 8.
．． The same coefficient of OXI O-6/'C,S +02 is 5.0
XIO-7/'(, and the mixed composition is Aj220
Since the volume ratio of 3/S i 02 is 54/46,
The thermal expansion coefficient (4
, 5X10-6/'C).

As a result, during heat treatment for selectively forming the diffusion layer 27, generation of thermal stress on the substrate 21 due to the difference in thermal expansion coefficient between the diffusion mask 24 and the substrate 21 can be suppressed;
The occurrence of defects on the surface of the substrate 21 can be prevented.

Example 3 First, Al2O3/Si was deposited on the n-type GaAs substrate 11.
An AI of 600 thick was produced by RF sputtering using a target consisting of a mixture of O203/SiO2 with a volume ratio of 70/30! After the 203 5+02 mixed coating was deposited, it was annealed at a temperature of 200-400° C. in a N2 atmosphere to remove distortion of the coating.

Subsequently, the wave film is patterned using a photoetching technique to form a diffusion mask 14 that forms a striped diffusion window 13 with a width of 1 μm, and then the surface of the substrate 11 exposed from the mask 14 is etched to remove side surfaces. A vertical groove 18 was formed. Subsequently, after removing the photoresist pattern, RF sputtering was performed using a target with a ZnO/Si02 molar ratio of 90/10. At this time, since sputtering has directionality, a thickness of 5 mm is applied only to the bottom of the groove 18 and on the mask 14.
A Zn-doped SiO2 film 15' was deposited.

Thereafter, a cap 16 made of SiO2 having a thickness of 500 mm was continuously formed by P-CVD (as shown in FIG. 4(a)). Next, heat treatment was performed at 550° C. for 11 hours in a N2 atmosphere. At this time, Zn was diffused from the Zn-doped SiO2 film 15' as a diffusion source deposited on the bottom surface of the trench 18 into the substrate 11 at the bottom of the trench 18, and a p-type diffusion layer 17' was selectively formed. Thereafter, the cap 16, the Zn-doped SiO2 film 16, and the diffusion mask 14 were removed (as shown in FIG. 3(b)).

According to the third embodiment described above, the p-type diffusion layer 17' can be formed on the bottom surface of the groove 18 of the substrate 11 by an extremely simple process.

Next, an example in which the present invention is applied to the manufacture of a semiconductor laser will be described with reference to FIGS. 5(a) to 5(g).

First, l+22 is placed on the n'MGaAs substrate 31.
Thickness 6 by RF sputtering using a target consisting of a mixture with a volume ratio of 03/SiO2 of 70/30
00 AIs! 203-S i 02 mixed membrane deposition,
After annealing at a temperature of 200 to 400'C in an N2 atmosphere, patterning was performed to form a stripe-shaped diffusion mask 32 covering the vicinity of the current path on the substrates 3 and 1 (see Fig. 5(a)). ).

Next, the molar ratio of Z n O / S i 02 was 90.
A Zn-doped SiO2 film 33 with a thickness of 500 nm is deposited on the substrate 31 including the diffusion mask 32 by RF sputtering using a target of /10, and a cap 34 made of SiO2 with a thickness of 500 nm is successively deposited by sputtering. Formed. Continuing in the N2 atmosphere,
Heat treated at 600°C for 1 hour and exposed n-type GaA
A p-type diffusion layer 35 was selectively formed on the surface of the substrate 31 using the Zn-doped 5102 film 33 in contact with the surface of the s-substrate 31 as a diffusion source (as shown in FIG. 3(b)). After this, cap 34, Z
The n-doped 5102 film 33 and the diffusion mask 32 were removed (as shown in the same figure (c)). After removing the diffusion mask 32 and the like, the surface of the substrate 31 was in a mirror-like state.

Next, n' is deposited on the GaAs substrate 31 by vapor phase growth.
JA Ga Al2O3/SiOAs cladding layer 3
6. Non-doped GaAs active layer 37 and p-type GaA,
A cladding layer 38 of 17As was formed (as shown in FIG. 3(d)).

Then n! ! 2 Ga Al2O3/SiOAs
Al2O3/SiO co0:+/S on the cladding layer 38 of
A thickness of 600 mm was obtained by RF sputtering using a target consisting of a mixture with a volume ratio of iO2 of 70/30.
After depositing 1f7203-5f02 mixed arytenoid and annealing at a temperature of 200-400'C in N2 atmosphere, it is buttered to form a striped diffusion window 39.
A diffusion mask 40 was formed for what purpose (as shown in FIG.
. Subsequently, a film with a thickness of 50 mm was formed by RF sputtering using a target with a ZnO/SiO2 molar ratio of 10/90.
A Zn-doped SiO2 film 41 having a thickness of 500 nm was deposited on a diffusion mask 40 including a diffusion window 39, and a cap 42 of 500 nm thick SiO2 was subsequently formed by sputtering.

Subsequently, heat treatment is performed at 1.550'C for about 30 minutes in a N2 atmosphere, and the Z in contact with the surface of the n-type GaA, ffAs cladding layer 38 exposed through the diffusion window 39 of the mask 40 is heated.
The cladding layer 3 uses the n-doped SiO2 film 41 as a diffusion source.
A p-type diffusion layer 43 was selectively formed on the surface of 8 (see figure (f)
).

Next, the cap 42 and the Zn-doped SiO2 film 41
is removed, an Au-Zn film is deposited by sputtering on the diffusion mask 40 including the diffusion window 39 (contact hole), and then buttered to form the diffusion mask 40 (interlayer insulating film).
A striped positive electrode 44 connected to the p-type diffusion layer 43 through the diffusion window 39 was formed thereon. Subsequently, a negative electrode 45 of Au-Ge-Ni was deposited on the back surface of the substrate 31 by sputtering. Thereafter, the entire structure was cut in the depth direction to manufacture the semiconductor laser shown in FIG. 3(g).

According to the embodiment described above, etching the surface of the substrate 31;
A p-type layer is used to form a striped current path on the surface of the substrate 31 without embedding a p-type GaA1As layer.
The type diffusion layer 35 can be selectively formed. Further, the substrate surface after the formation of the p-type diffusion layer 35 has good flatness, and the generation of thermal stress and distortion due to the difference in thermal expansion coefficient between the diffusion mask 32 and the bracket 31 can be prevented. A rad layer 36, an active layer 37, and a cladding layer 38 can be grown in vapor phase on the surface of the substrate 31 in good condition. Further, the Zn-doped SiO2 film 41 deposited on the diffusion mask 40.1- is formed by sputtering, and the composition ratio of the target (ZnO:
By adjusting the Zn doped Si02), the Zn concentration can be easily changed.
By solid-phase diffusion of high concentration Zn of 1020c11-3 or more into the p-type GaAl2O3/SiOAs cladding layer 38 from the O2 film 41, the p-type diffusion is well ohmically connected to the striped positive electrode 44 made of Au-Zn. Layer 43 can be formed. Historically, low-temperature processes have created a diffused layer 3.
5.43, it is possible to obtain a semiconductor laser having good characteristics with less thermal influence.

〔Effect of the invention〕

As described in detail below, according to the present invention, it is possible to significantly suppress the generation of thermal stress on a compound semiconductor from a diffusion mask during solid phase diffusion, and it is possible to easily form a silicon oxide film doped with impurities with good controllability. By being able to form compound semiconductors, it is possible to form a diffusion layer with a predetermined concentration in a conductor, and it is also possible to form a silicon oxide film at a low temperature, and it is possible to diffuse impurities into a compound semiconductor using a low-temperature process, improving device characteristics and mass production. A method for selective solid phase diffusion of Zn into a compound semiconductor with excellent properties can be provided.

[Brief Description of the Drawings] Figures 1 (a) to (d) show Zn in Example 1 of the present invention.
Figure 2 is a characteristic diagram showing the relationship between diffusion temperature and diffusion depth; Figures 3 (a,) to (d)
) is a cross-sectional view showing the process of selective solid phase diffusion of Zn into the InP substrate in Example 2 of the present invention, and FIGS.
Cross-sectional views showing the selective solid phase diffusion process, FIGS. 5(a) to (g)
6 is a sectional view showing the manufacturing process of a semiconductor laser according to another embodiment of the present invention, FIG. 6 is a sectional view showing the state of the substrate before selective vapor phase diffusion in the conventional method, and FIG. 7 is a diagram showing the state of the substrate used for vapor phase diffusion. FIG. 8 is a cross-sectional view showing the state of a conventional substrate before solid-phase diffusion having a Zn-doped SiO2 film formed by plasma CVD, and FIG. 9 is a schematic diagram of an apparatus for expanding the number of solid-states. FIG. 11.31-n-type GaAs substrate, 13.23.39...
・Diffusion window, 14.24.32.40...Diffusion mask,
15.15', 25.33.41--Z n-doped SiO2 film, 16.26.34.42... Cap,
17.17', 27.35.43...p type diffusion layer, 1
8...Groove portion, 21...n-type 1nP substrate, 36.38
... Cladding layer, 37 ... Active layer, 44 ... Positive electrode, 45 ... Negative electrode. Applicant's agent Patent attorney Takehiko Suzue 1wI Figure 3 Nyokai Onsho (6C) Figure 2 Figure 4 Figure 5

Claims (5)

[Claims] (1) A step of depositing a film made of a material having a coefficient of thermal expansion similar to that of the semiconductor and having a property of inhibiting diffusion of impurities by sputtering on the surface of a compound semiconductor, and selectively depositing a predetermined portion of this film. a step of removing by etching to form a diffusion mask having a diffusion window; a step of depositing a silicon oxide film doped with p-type or n-type impurities by sputtering on the diffusion mask including the diffusion window; and a step of performing heat treatment. selective solid-phase diffusion of impurities into the semiconductor through the diffusion window of the diffusion mask using the impurity-doped silicon oxide film as a diffusion source. . (2) The compound semiconductor is formed from GaAs, and the material that has a coefficient of thermal expansion similar to that of the semiconductor and has the property of blocking the diffusion of impurities has a composition of Al_2O_3 and SiO_2, and the ratio of Al_2O_3/SiO_2 is the volume percentage. So 79
The selective solid phase diffusion method for compound semiconductors according to claim 1, characterized in that the method comprises a mixture of: /21 to 62/38. (3) The compound semiconductor is formed from GaAs, and the material has a thermal expansion coefficient similar to that of the semiconductor and has the property of blocking impurity diffusion, and has a composition of Al_2O_3 and AlN, and a volume ratio of Al_2O_3/AlN. So 48/52~
The selective solid phase diffusion method for compound semiconductors according to claim 1, characterized in that the method comprises a 10/90 mixture. (4) The compound semiconductor is formed from GaAs, and the material has a coefficient of thermal expansion similar to that of the semiconductor and has the property of blocking the diffusion of impurities, and has a composition of Al_2O_3 and Si_3N_4, and a volume ratio of Al_2O_3/Si_3N_4. The selective solid phase diffusion method for compound semiconductors according to claim 1, characterized in that the method comprises a mixture of 71/29 to 50/50. (5) SiO_
5. A method for selective solid phase diffusion into a compound semiconductor according to any one of claims 1 to 4, characterized in that a heat treatment is performed after depositing a cap consisting of a compound semiconductor.