JPS6213759B2 - - Google Patents

Info

Publication number
JPS6213759B2
JPS6213759B2 JP55063062A JP6306280A JPS6213759B2 JP S6213759 B2 JPS6213759 B2 JP S6213759B2 JP 55063062 A JP55063062 A JP 55063062A JP 6306280 A JP6306280 A JP 6306280A JP S6213759 B2 JPS6213759 B2 JP S6213759B2
Authority
JP
Japan
Prior art keywords
transistor
bias
circuit
self
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55063062A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56159891A (en
Inventor
Fujio Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP6306280A priority Critical patent/JPS56159891A/ja
Priority to US06/260,994 priority patent/US4460835A/en
Priority to DE8181103606T priority patent/DE3162416D1/de
Priority to EP81103606A priority patent/EP0039946B1/en
Priority to CA000377457A priority patent/CA1185665A/en
Publication of JPS56159891A publication Critical patent/JPS56159891A/ja
Publication of JPS6213759B2 publication Critical patent/JPS6213759B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00

Landscapes

  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP6306280A 1980-05-13 1980-05-13 Semiconductor integrated circuit device Granted JPS56159891A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP6306280A JPS56159891A (en) 1980-05-13 1980-05-13 Semiconductor integrated circuit device
US06/260,994 US4460835A (en) 1980-05-13 1981-05-06 Semiconductor integrated circuit device with low power consumption in a standby mode using an on-chip substrate bias generator
DE8181103606T DE3162416D1 (en) 1980-05-13 1981-05-11 Semiconductor integrated circuit device
EP81103606A EP0039946B1 (en) 1980-05-13 1981-05-11 Semiconductor integrated circuit device
CA000377457A CA1185665A (en) 1980-05-13 1981-05-13 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6306280A JPS56159891A (en) 1980-05-13 1980-05-13 Semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS56159891A JPS56159891A (en) 1981-12-09
JPS6213759B2 true JPS6213759B2 (enrdf_load_stackoverflow) 1987-03-28

Family

ID=13218469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6306280A Granted JPS56159891A (en) 1980-05-13 1980-05-13 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS56159891A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2783138B2 (ja) * 1993-12-03 1998-08-06 株式会社日立製作所 半導体装置
JP2011254305A (ja) * 2010-06-02 2011-12-15 Asahi Kasei Electronics Co Ltd クロック負昇圧回路

Also Published As

Publication number Publication date
JPS56159891A (en) 1981-12-09

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