JPS62136051A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS62136051A
JPS62136051A JP27606785A JP27606785A JPS62136051A JP S62136051 A JPS62136051 A JP S62136051A JP 27606785 A JP27606785 A JP 27606785A JP 27606785 A JP27606785 A JP 27606785A JP S62136051 A JPS62136051 A JP S62136051A
Authority
JP
Japan
Prior art keywords
chip
resin
cavity
window
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27606785A
Other languages
Japanese (ja)
Inventor
Masao Takehiro
武広 正雄
Eiji Yokota
横田 栄二
Yoshihiro Utouyama
宇藤山 純弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP27606785A priority Critical patent/JPS62136051A/en
Publication of JPS62136051A publication Critical patent/JPS62136051A/en
Pending legal-status Critical Current

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To contrive to be low in cost and improve damp-proof property, by sealing an IC chip with resin and installing a transmitting window with the upper part of the IC chip serving as a cavity. CONSTITUTION:Above an IC chip 11 formed of ROM die-mounted on the stage 12 of a lead frame, a cavity 17 having a sectional area larger than the size of a cell part in the IC chip is formed and covered with a window which is made of transmitting material SiO2 or alumina and has larger expansion than the cavity. The window is made to adhere with epoxy resin which is strong in adhesiveness and high in damp-proof property. A transmitting thin film 15 for protecting the IC chip 11, when resinous sealing being performed, is formed of silicone resin on the surface of the IC chip 11. Thus, a large decrease in cost is available, and the package sealed with resin becomes superior in damp- proof property.

Description

【発明の詳細な説明】 〔概要〕 !?OM部上を空洞にし、ガラス窓付けした構造を特徴
とするプラスチック形EFROMである。
[Detailed description of the invention] [Summary]! ? This is a plastic type EFROM characterized by a structure in which the OM part is hollow and a glass window is attached.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置に関するもので、さらに詳しく言え
ば、従来のセラミックEFROM  (消去・書込み可
能な読出し専用メモリ)に代り、EFROMを樹脂封止
するがROM部の上方を空洞にし、その空洞の上方に紫
外線を通すガラス窓を設けたEFROMパッケージに関
するものである。
The present invention relates to a semiconductor device, and more specifically, in place of a conventional ceramic EFROM (erasable/programmable read-only memory), the EFROM is sealed with resin, but the upper part of the ROM part is made hollow, and the upper part of the cavity is This relates to an EFROM package that has a glass window that allows ultraviolet rays to pass through.

〔従来の技術〕[Conventional technology]

第7図の断面図に示されるセラミ゛ツク形EPROMパ
ッケージは知られたものであり、同図において31はR
OMが形成されたICチップ、32はセラミック本体、
33はセラミック製のキャップ、34はキャップ33に
設けたガラス窓、35はガラスシール、36はメタライ
ズ層、37はリードを示し、ICチップ31にガラス窓
34を通して光38を照射しICチップ31に形成され
たメモリを消去し、かつ、書込みをなす。
The ceramic EPROM package shown in the sectional view of FIG. 7 is a known one, and in the same figure 31 is R.
An IC chip with an OM formed thereon, 32 is a ceramic body,
33 is a ceramic cap, 34 is a glass window provided in the cap 33, 35 is a glass seal, 36 is a metallized layer, 37 is a lead, and a light 38 is irradiated onto the IC chip 31 through the glass window 34. The formed memory is erased and written to.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

セラミック本体32はセラミックのグリーンシ−トを積
層し焼結して形成するものであり、工程数が多くコスト
が著しく高くなる問題がある。
The ceramic body 32 is formed by laminating and sintering ceramic green sheets, which has the problem of requiring a large number of steps and significantly increasing costs.

そこでEFROMのパッケージを樹脂封止によって形成
することが提案され、第8図の断面図に示される構造の
ものが提案された。なお第8図において、41はROM
が形成されたICチップ、42は封止樹脂例えばエポキ
シレジン、43はセラミック窓材、44はリードを示し
、セラミック窓材43を通して光45を照射しROMの
消去・書込みを行う。
Therefore, it was proposed to form an EFROM package by resin sealing, and a structure shown in the cross-sectional view of FIG. 8 was proposed. In addition, in FIG. 8, 41 is a ROM
42 is a sealing resin such as epoxy resin, 43 is a ceramic window material, and 44 is a lead. Light 45 is irradiated through the ceramic window material 43 to erase and write in the ROM.

かかる構造においては、セラミック窓材43と封止樹脂
(例えばエポキシレジン)42の密着性が悪く、かつ、
両者の熱膨張係数が異なるために、セラミック窓材43
とエポキシレジン42の接触面に隙間ができ、そこから
水分、湿気が入ってくる、すなわち耐湿性に劣るという
問題がある。
In such a structure, the adhesion between the ceramic window material 43 and the sealing resin (for example, epoxy resin) 42 is poor, and
The ceramic window material 43 has a different coefficient of thermal expansion.
There is a problem that a gap is formed between the contact surface of the epoxy resin 42 and the epoxy resin 42, and water and moisture enter from the gap, that is, the moisture resistance is poor.

本発明はこのような点に鑑みて創作されたもので、低コ
ストでかつ耐湿性に優れたHFROMを提供することを
目的とする。
The present invention was created in view of these points, and an object of the present invention is to provide an HFROM that is low in cost and has excellent moisture resistance.

C問題点を解決するための手段〕 第1図は本発明実施例の断面図で、同図において、11
はROMが形成されたICチップ、12はICチップ1
1がダイ付けされたリードフレームのステージ、13は
リード、14はICチップ11の電極とリード13とを
接続するワイヤ、15はICチップ11上に塗布された
例えばシリコン樹脂の如き弾性をもった紫外線を通す性
質(以下透光性という)材料の薄膜、16はエポキシ樹
脂の如き封止用の樹脂、17はICチップのセル部より
も大なる断面をもち、ICチップのセル部分(11a 
)とICチップの電極に接着されたワイヤの接着部分(
14a)とのほぼ中間で封止樹脂に接する空洞、18は
空洞17の断面より大なる拡がりをもって空洞を覆う二
酸化シリコン(5i02)または アルミナで作った透
光性の窓、19はキャップ18をエポキシ樹脂に接着す
る接着材である。
Means for Solving Problem C] FIG. 1 is a sectional view of an embodiment of the present invention, and in the same figure, 11
12 is an IC chip on which ROM is formed, and 12 is an IC chip 1.
1 is a die-attached lead frame stage, 13 is a lead, 14 is a wire connecting the electrode of the IC chip 11 and the lead 13, and 15 is an elastic material such as silicone resin coated on the IC chip 11. A thin film of a material that transmits ultraviolet light (hereinafter referred to as translucent); 16 is a sealing resin such as epoxy resin; 17 has a cross section larger than the cell part of the IC chip;
) and the bonded part of the wire bonded to the electrode of the IC chip (
14a), 18 is a transparent window made of silicon dioxide (5i02) or alumina that covers the cavity with a larger spread than the cross section of cavity 17, and 19 is a cap 18 made of epoxy resin. It is an adhesive that adheres to resin.

第1図の実施例において、ICチップ11が樹脂封止さ
れたEPI?OMパッケージが提供されるが、ICチッ
プ11の上部は空洞17となっており、透光性窓18を
通して照射される光がICチップ11に照射する構造と
なっており、透光性薄膜15は樹脂封止の際にICチッ
プ11を保護する機能を果す。
In the embodiment shown in FIG. 1, the IC chip 11 is an EPI? Although an OM package is provided, the upper part of the IC chip 11 is a cavity 17, and the structure is such that light irradiated through a translucent window 18 irradiates the IC chip 11, and the translucent thin film 15 is It functions to protect the IC chip 11 during resin sealing.

〔作用〕[Effect]

上記した構造のEPROMパッケージにおいて、窓18
は接着材19によってエポキシ樹脂16に接着されてい
るので、ICチ・ノブ11は外部の水分、湿気に対して
十分に保護され、またROMの消去・書込みのための光
は透光性の窓18、空洞17、透光性をもつ程度に薄く
塗布したシリコン樹脂の透光性薄膜15を通ってICチ
ップ11に照射されるので、ROMの消去・書込みはな
んら支障なくなされるものである。
In the EPROM package having the above structure, the window 18
is bonded to the epoxy resin 16 with an adhesive 19, so the IC chip knob 11 is sufficiently protected from external water and humidity, and the light for erasing and writing in the ROM is transmitted through a translucent window. Since the light is irradiated onto the IC chip 11 through the cavity 17 and the light-transmitting thin film 15 of silicone resin coated thinly enough to have light-transmitting properties, the ROM can be erased and written without any problem.

〔実施例〕〔Example〕

以下、本発明実施例を図面によって詳細に説明する。 Embodiments of the present invention will be described in detail below with reference to the drawings.

(実施例1) 再び第1図を参照すると、リードフレームのステージ1
2にグイ付けされたROMの形成されたICチップ11
は例えばエポキシ樹脂16で樹脂封止されるのであるが
、ICチップ11を完全に樹脂封止する型の従来のプラ
スチックタイプのパッケージとは異なり、ICチップ1
1の上方にはICチップのセル部11aの寸法より大な
る断面積をもった空洞17が形成され、この空洞17を
空洞よりも大なる拡がりをもつ透光性材料例えばSiO
2またはアルミナで作った窓18で覆う。窓18の材料
は前記のものに限定されるものではなく、また封止用の
樹脂はエポキシ樹脂に限定されるものでなく、封正に通
したその他の材料でもよい。
(Example 1) Referring again to FIG. 1, stage 1 of the lead frame
IC chip 11 with ROM formed on it
For example, the IC chip 11 is resin-sealed with epoxy resin 16, but unlike conventional plastic-type packages in which the IC chip 11 is completely sealed with resin, the IC chip 11 is sealed with resin.
A cavity 17 having a cross-sectional area larger than the dimensions of the cell portion 11a of the IC chip is formed above the IC chip.
2 or covered with a window 18 made of alumina. The material for the window 18 is not limited to those mentioned above, and the sealing resin is not limited to epoxy resin, but may be any other material that has been sealed.

窓18は接着性の強い、従って耐湿性の高い接着材19
でエポキシ樹脂に接着する。そのためには、エポキシ樹
脂の上方部分にICチップ11の寸法に対応した凹部を
形成し、この凹部に窓18を接着する。
The window 18 is made of an adhesive 19 that has strong adhesive properties and is therefore highly moisture resistant.
Glue to epoxy resin. To do this, a recess corresponding to the dimensions of the IC chip 11 is formed in the upper part of the epoxy resin, and the window 18 is bonded to this recess.

ICチップ11の表面には、樹脂封止の際にICチップ
11を保護するための透光性情11115を例えばシリ
コーン樹脂で形成する。この薄膜15はICチップ11
の表面を完全に覆う如くに塗布する。
On the surface of the IC chip 11, a transparent material 11115 is formed of silicone resin, for example, to protect the IC chip 11 during resin sealing. This thin film 15 is the IC chip 11
Apply to completely cover the surface.

第2図は透光性薄膜15が塗布された状態を詳細に示す
断面図で、同図で11aはICチップのセル部分を示す
。ワイヤ14は既にICチップの電極に接着され終って
いるから、シリコーン樹脂でワイヤの接着部分を覆って
もなんら支障はない。図示の例でワイヤのボール状の接
着部分14aの高さは50p m −、ICチップ11
の厚さは400〜500μmであり、シリコーン樹脂の
厚さは100〜200μm程度にした。透光性薄膜15
はシリコーン樹脂以外の弾性をもった透光性のゲル状の
レジンで形成してもよい。
FIG. 2 is a cross-sectional view showing in detail the state in which the transparent thin film 15 is coated, and in this figure, 11a indicates the cell portion of the IC chip. Since the wire 14 has already been bonded to the electrode of the IC chip, there is no problem in covering the bonded portion of the wire with silicone resin. In the illustrated example, the height of the ball-shaped adhesive portion 14a of the wire is 50 p m −, and the IC chip 11
The thickness of the silicone resin was about 400 to 500 μm, and the thickness of the silicone resin was about 100 to 200 μm. Transparent thin film 15
may be made of an elastic, translucent gel-like resin other than silicone resin.

第1図に示したパッケージは、 ICチップ付け/ワイヤ付は シリコン樹脂塗布/キュアー モールド成形 窓付け の工程によって作ることありできる。The package shown in Figure 1 is IC chip attachment/wire attachment Silicone resin coating/cure mold forming window installation It can be made by the following process.

透光性薄膜は前記したモールド成形においてICチップ
11を保護する機能を果す。そしてモールド成形におい
ては、モールド樹脂の内壁16a(空洞17とモールド
樹脂の境界)が、ICチップのセル部分11aとワイヤ
の接着部分14aのほぼ中間に位置する如くに金型を設
計する。
The light-transmitting thin film functions to protect the IC chip 11 during the above-described molding. In molding, the mold is designed so that the inner wall 16a of the molding resin (the boundary between the cavity 17 and the molding resin) is located approximately midway between the cell portion 11a of the IC chip and the bonding portion 14a of the wire.

前記した金型は第3図の断面図に部分的に示され、同図
において、21a、 21bはそれぞれ下型と上型、2
2はリードフレームを示す。上型21bには空洞17が
作られるよう突起部23が形成されている。
The mold described above is partially shown in the cross-sectional view of FIG.
2 indicates a lead frame. A protrusion 23 is formed on the upper mold 21b so that a cavity 17 is formed.

上型と下型が図示の如く閉じた状態で樹脂封止されるが
、上型と下型が型締めされたときに薄膜15を上型21
bの突起部23が押し付け、封止用のエポキシ樹脂が侵
入することのないようにする。そして、突起部23がI
Cチップ11に与える衝撃は、リードフレーム22のス
テージ12が下方にたわむことと薄膜15とによって緩
和される。
The upper mold and the lower mold are sealed with resin in the closed state as shown in the figure, but when the upper mold and the lower mold are clamped, the thin film 15 is removed from the upper mold 21
The protrusion 23 of b presses against it to prevent the sealing epoxy resin from entering. Then, the protrusion 23 is
The impact on the C-chip 11 is alleviated by the downward deflection of the stage 12 of the lead frame 22 and by the thin film 15.

第4図はリードフレーム22の一部の模式的な平面図で
、同図の空洞17以外の部分にエポキシ樹脂が封止され
る。なお同図において、ICチップ11の下方はすべて
樹脂封止されていて、ICチップの上方にのみ空洞17
が形成されている。
FIG. 4 is a schematic plan view of a portion of the lead frame 22, and the portion other than the cavity 17 in the figure is sealed with epoxy resin. In the figure, the entire lower part of the IC chip 11 is sealed with resin, and a cavity 17 is formed only above the IC chip.
is formed.

(実施例2) 第2図に詳細に示した(実施例1)の如(モールド樹脂
の内壁16aがICチップセル部分11aとワイヤ14
の接着部分14aの中間に位置することが困難な場合に
は、本発明の実施例2の断面図である第5図と第5図の
装置の一部の詳細断面図である第6図に示される如く、
透光性薄膜15をワイヤ14の最高部まで覆い、モール
ド樹脂の内壁16aがワイヤ接着部分14aよりも外側
に(第6図にAで示す範囲)に出るようにすることがで
きる。この実施例も実施例1と同様の工程で作ることが
できる。
(Example 2) As (Example 1) shown in detail in FIG.
If it is difficult to locate the bonded portion 14a in the middle of the bonded portion 14a, please refer to FIG. 5, which is a sectional view of Embodiment 2 of the present invention, and FIG. As shown,
It is possible to cover the wire 14 with the transparent thin film 15 up to the highest part so that the inner wall 16a of the molded resin protrudes outside the wire bonding portion 14a (the range indicated by A in FIG. 6). This example can also be made using the same steps as Example 1.

〔発明の効果〕〔Effect of the invention〕

以上述べてきたように、本発明によれば、EFROMパ
ッケージを従来の高価なセラミックパッケージに代えて
樹脂封止によって形成して、コストを1720〜1/1
0程度大幅に減少することが可能になり、しかも樹脂封
止したパッケージは優れた耐湿性をもつものである。
As described above, according to the present invention, the EFROM package is formed by resin sealing instead of the conventional expensive ceramic package, and the cost is reduced to 1/1/1720.
In addition, the resin-sealed package has excellent moisture resistance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例1の断面図、 第2図は第1図の装置の一部を詳細に示す断面図、 第3図は第1図の装置の成形に用いる金型の部分的断面
図、 第4図は第1図の装置に用いるリードフレームの部分的
平面図、 第5図は本発明実施例2の断面図、 第6図は第5図の装置の一部を詳細に示す断面図、 第7図は従来例の断面図、 第8図は他の従来例の断面図である。 第1図ないし第6図において、 11はICチップ、 11aはICチップのセル部分、 12はリードフレームのステージ、 13はリード、 14はワイヤ、 14aはワイヤの接着部分、 15は透光性薄膜、 16はエポキシ樹脂(封止樹脂)、 16aは内壁、 17は空洞、 18は窓、 19は接着材、 21aは下型、 21bは上型、 22はリードフレーム、 23は上型の突起部である。 代理人  弁理士  久木元   彰 復代理人 弁理士  大 菅 義 之 (23°2°。 ’に+I!Iのダニの威゛り用金鬼名曖鈷1咋面圀第3
図 ’;、、z+7 \ リード13 リードツー−への壱ア舎的ぞ面図 第4図 F− 楢  や
Fig. 1 is a cross-sectional view of Embodiment 1 of the present invention, Fig. 2 is a cross-sectional view showing a part of the apparatus shown in Fig. 1 in detail, and Fig. 3 is a partial view of a mold used for molding the apparatus shown in Fig. 1. 4 is a partial plan view of a lead frame used in the device shown in FIG. 1, FIG. 5 is a sectional view of Embodiment 2 of the present invention, and FIG. 6 is a detailed view of a part of the device shown in FIG. 5. FIG. 7 is a sectional view of a conventional example, and FIG. 8 is a sectional view of another conventional example. 1 to 6, 11 is an IC chip, 11a is a cell part of the IC chip, 12 is a stage of a lead frame, 13 is a lead, 14 is a wire, 14a is a bonded part of the wire, 15 is a transparent thin film , 16 is an epoxy resin (sealing resin), 16a is an inner wall, 17 is a cavity, 18 is a window, 19 is an adhesive, 21a is a lower mold, 21b is an upper mold, 22 is a lead frame, 23 is a protrusion of the upper mold It is. Agent Patent Attorney Akifuku Agent Patent Attorney Yoshiyuki Osuga (23°2°. 'ni + I!
Figure';,,z+7 \ Lead 13 A view of the first building to the lead two Figure 4 F- Oak ya

Claims (1)

【特許請求の範囲】 消去・書込み可能な読出し専用メモリが形成されたIC
チップ(11)を樹脂(16)封止してなるプラスチッ
クタイプパッケージにして、 ICチップ(11)の表面には紫外線透過性の弾性薄膜
(15)が設けられ、 ICチップ(11)のセル部(11a)の上方にはその
面積より大なる断面積の空洞(17)が形成され、空洞
(17)はその断面積よりも大なる拡がりをもち封止樹
脂(16)に接着された紫外線透過性窓(18)によっ
て覆われた構造を特徴とする半導体装置。
[Claims] An IC in which an erasable/writable read-only memory is formed.
A plastic type package is formed by sealing the chip (11) with a resin (16), and the surface of the IC chip (11) is provided with an ultraviolet-transparent elastic thin film (15), and the cell portion of the IC chip (11) is A cavity (17) with a cross-sectional area larger than that area is formed above (11a), and the cavity (17) has an extension larger than the cross-sectional area and is glued to the sealing resin (16) and transmits ultraviolet rays. A semiconductor device characterized by a structure covered by a magnetic window (18).
JP27606785A 1985-12-10 1985-12-10 Semiconductor device Pending JPS62136051A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27606785A JPS62136051A (en) 1985-12-10 1985-12-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27606785A JPS62136051A (en) 1985-12-10 1985-12-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS62136051A true JPS62136051A (en) 1987-06-19

Family

ID=17564339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27606785A Pending JPS62136051A (en) 1985-12-10 1985-12-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS62136051A (en)

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